JP2578754B2 - Digital data recording method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to magnetic recording of digital data.

2. Description of the Related Art Conventionally, in directly recording digital data in a helical scan type magnetic recording device, there has been a problem that digital data cannot be correctly reproduced if a recording signal contains a DC component. For this reason, various DC-free modulation schemes have been devised to achieve the elimination of the DC component. For example, it is disclosed in JP-A-57-48848.

Problems to be Solved by the Invention However, in the recording method as described above, the value of the digital sum variation (hereinafter, referred to as DSV) is set to a certain width to make it DC-free. Does not return to 0.

Here, the DSV is obtained by NRZI-modulating the modulation code and increasing the positive side by +
1, the integral value of the waveform when the negative side is -1. Also
The polarity at the start of the NRZI conversion is on the negative side.

Means for Solving the Problems The present invention is a digital data recording method for recording a bit pattern such that DSV becomes 0 in one track unit in a postamble section.

Function The present invention provides a method in which the last modulation code of a modulation code sequence obtained by modulating digital data to be recorded on one track has a DS.
According to the value of V, a bit pattern is generated such that the value of DSV becomes 0, and the pattern is recorded in a postamble section following the last modulation code, thereby obtaining 1
DSV can be set to 0 for each track.

Embodiment A modulation algorithm of a modulation method used in an embodiment of the present invention will be described.

The modulation system converts 8-bit data into a 14-bit modulation code.

In all modulation codes, the last bit is “0”, and bit “0” is 1 between bit “1” and bit “1” in the modulation code.
Are included. Also, bit “0” in the modulation code
Are limited to a maximum of eight, and at both ends of the modulation code, the number of consecutive bits “0” is limited to four or less. Therefore,
One or more bits “0” are always included between bit “1” and bit “1” in the modulation code sequence.

How to assign the modulation code to data,
Find the CDS (Codeword Digital Sum) of all modulation codes,
DS = 0 modulation code is assigned one-to-one with data, and CDS =
+2 and CDS = -4, CDS = -2 and CDS = +4, CDS = +2 and CD
Modulation codes of S = −6, CDS = −2 and CDS = + 6 are respectively assigned to data as a set. Here, the CDS is a DSV from the beginning to the end in each modulation code.

Of the set of modulation codes, a modulation code having a small absolute value of CDS, that is, a modulation code of CDS = ± 2 is defined as an A group modulation code, and a modulation code of CDS = ± 4 and CDS = ± 6 is defined as a B group. The modulation code is used. The modulation code of CDS = 0 belongs to both groups.

The modulation is performed when the DSV value at the end of the modulation code immediately before the data to be modulated and the NRZI modulation are performed, and when the modulation code ends at the H level of the positive side and the L level at the negative side. With reference to the polarity of Here, the DSV is from the start point of the modulation, and the polarity of the start point is on the negative electrode side.

FIG. 2 shows changes in the values of the polarity and DSV. As shown in FIG. 2, the polarity is inverted by bit "1" in the modulation code sequence.

FIG. 3 shows a method of selecting a modulation code. A modulation code with a CDS value that increases the DSV when the polarity is negative and decreases the DSV when the polarity is positive. A modulation code with a negative CDS value decreases the DSV when the polarity is negative and decreases the DSV when the polarity is positive.
Increase. A modulation code having a CDS value of 0 keeps DSV constant regardless of the polarity.

Therefore, as shown in FIG. 3, at the end of the modulation code obtained by converting the data immediately preceding the data to be modulated with the positive polarity.
When the value of DSV is positive, out of two modulation codes of A group and B group corresponding to the data to be modulated,
The CDS assigns a positive or zero modulation code.

When the polarity is positive and the value of DSV at the end of the modulation code obtained by converting the data immediately before the data to be modulated is negative, two groups A and B corresponding to the data to be modulated are obtained.
One of the modulation codes is assigned a modulation code with a negative or zero CDS.

When the value of the DSV at the end of the modulation code obtained by converting the data immediately before the data to be modulated with the negative polarity is positive, two groups A and B corresponding to the data to be modulated are provided.
One of the modulation codes is assigned a modulation code with a negative or zero CDS.

When the value of DSV at the end of the modulation code obtained by converting the data immediately preceding the data to be modulated with the negative polarity is negative, two groups A and B corresponding to the data to be modulated are provided.
One of the two modulation codes is assigned a modulation code having a positive or zero CDS.

That is, assuming that the DSV value at the end of the modulated code immediately preceding the data to be modulated is 1 when the value is negative, 0 when the value is positive, 1 when the polarity is also positive and 0 when the polarity is negative,
When taking the exclusive logical sum of the two, when 1 the CDS is negative or 0
When the value is 0, the CDS is assigned a positive or zero modulation code.

When the DSV value at the end of the modulation code obtained by converting the data immediately before the data to be modulated is 0, the modulation code of the A group having a small absolute value of the CDS is assigned irrespective of whether the polarity is positive or negative, and the DSV Is ± 2 or 0.

As a result, the DSV of the modulation code sequence falls within a certain range of values. In this embodiment, the DSV is within ± 8, and at the end of each modulation code, it is one of 0, ± 2, ± 4.

FIG. 1 shows a block diagram of the pattern generation circuit of the present embodiment.

In FIG. 1, 1 is a reset signal, 2 is data, 3
Is an encoder, 4 is a DSV change amount generator, 5 is a polarity generator, 6 is
Is a latch, 7 is a latch, 8 is a DSV = 0 determination section, 9 is a shift register, 10 is a DSV calculation section, 11 is a synchronization signal addition section, 12
Is a switch, 13 is a pattern generator, 14 is a switching signal,
Reference numeral 15 denotes an amble addition unit, 16 denotes an NRZI modulation unit, and 17 denotes a recording unit.

The operation of the pattern generating circuit of the present embodiment configured as described above will be described below.

In performing the modulation, the value of DSV is set to 0 and the polarity is set to negative by the reset signal 1 for the initial setting.

Data 2 is input to an encoder 3, a DSV variation generator 4, and a polarity generator 5. At the same time, the polarity (initial setting is negative) at the end of the modulation code obtained by converting data immediately before data 2 to be modulated, which is output from the latch 6, and the data 2 to be modulated, which is output from the latch 7. The output of the exclusive logical sum with the DSV flag bit (0 when positive, 1 when negative) at the end of the modulation code converted from the previous data, and the data before the data 2 to be modulated Departure from the DSV = 0 determination unit 8 for determining whether the value of the DSV at the end of the modulation code obtained by converting is 0 (0 when DSV = 0, 1 when DSV ≠ 0)
With the encoder 3, the DSV change amount generator 4, and the positivity generator 5
Enter

 The output of the latch 6 is input to the polarity generator 5.

The encoder 3 outputs one of the two modulation codes corresponding to the input data to the shift register 9 based on the selection shown in FIG.

The DSV change amount generator 4 outputs the DSV change amount to the DSV calculator 10 due to the modulation code selected by the encoder.

The DSV calculator 10 adds the amount of change of the DSV to the output of the latch 7 and the DSV at the end of the modulation code obtained by converting the immediately preceding data of the data 2 to be modulated. The DSV at the end of the modulation code obtained by converting
The data is output to the latch 7 and temporarily stored in the latch 7.

The polarity generator modulates the data preceding the data 2 to be modulated input from the latch 6 depending on whether the bit “1” of the modulation code selected by the encoder is odd or even. It is determined whether the polarity at the end of the code is inverted or output as it is, and the polarity at the end of the modulation code obtained by converting the data 2 to be modulated is output to the latch 6 and temporarily stored in the latch 7. .

The shift register 9 performs parallel-serial conversion of the output from the encoder and outputs the result to the synchronization signal adding unit 11.

A sync signal is added by a sync signal adding unit 11 and the switch 12
Output to

In the pattern generator 13, the DSV value at the end of each modulation code output from the latch 7 and the polarity are input, and the pattern shown in FIG. Output to switch 12.

The switch 12 adds the pattern from the pattern generator 13 after the last modulation code of the modulation code sequence to be recorded on one track by the switching signal 14 and outputs it to the amble adding unit 15.

The amble adding unit 15 adds a repetition pattern of bit “10” as a preamble and a postamble before and after the modulation code sequence to be recorded on the one track and the pattern added thereafter, and outputs the result to the NRZI modulation unit 16.

After the NRZI modulation is performed by the NRZI modulation unit 16, the NRZI modulation unit 16 outputs the NRZI modulation to the recording unit 17 and records it on a recording medium such as a magnetic tape.

As described above, according to the present embodiment, the bit pattern shown in FIG. 4 follows the last modulation code according to the value and polarity of the last DSV of the last modulation code in the modulation code sequence in one track. By recording the data in the postamble portion, the DSV can be set to 0 for each track.

Effect of the Invention As described above, according to the present invention, the DSV value can be set to 0 without increasing the redundancy for each track.

[Brief description of the drawings]

FIG. 1 is a block diagram of a pattern generating circuit according to an embodiment of the present invention, and FIG.
FIG. 3 is a diagram showing an example of a change in V, FIG. 3 is a diagram showing a method of selecting a modulation code according to an embodiment of the present invention, and FIG. 4 is a pattern recorded in a postamble section according to an embodiment of the present invention. FIG.

Claims (1)

(57) [Claims] When recording digital data on a helical scan type magnetic recording device, the digital data is modulated using a DC-free modulation method, and before and after the modulated digital data for each recording track. In the digital data recording method in which a preamble section and a postamble section are provided and recorded, a bit pattern in which the value of a digital sum variation at the end of the modulated digital data is 0 is recorded in the postamble section. A digital data recording method, characterized in that: