CN100347853C - Lead frame and its manufacturing method and semiconductor device - Google Patents
Lead frame and its manufacturing method and semiconductor device Download PDFInfo
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- CN100347853C CN100347853C CNB031275575A CN03127557A CN100347853C CN 100347853 C CN100347853 C CN 100347853C CN B031275575 A CNB031275575 A CN B031275575A CN 03127557 A CN03127557 A CN 03127557A CN 100347853 C CN100347853 C CN 100347853C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
In a semiconductor device, a lead frame made of copper alloy prevents the delamination near the surface of the lead frame. By immersing a base material into strong oxidizer solution, a cupric oxide layer is formed on the base material. The cupric oxide layer is used as an outermost layer and is composed of cupric oxide in a non-acicular crystal form.
Description
Technical field
Relate generally to semiconductor device of the present invention more particularly, the present invention relates to by utilizing the sealing resin encapsulation to be installed in the semiconductor device that the semiconductor element on the lead frame forms.
Background technology
Fig. 1 is the cutaway view that adopts the semiconductor device of conventional lead frame.Semiconductor device 1 shown in Figure 1 has so-called wire type encapsulation, and this wire type encapsulation is provided with many lead terminals of drawing from the resin sealing portion that is used for packaged semiconductor.
In Fig. 1, utilize small pieces binding material 5, semiconductor chip 2 is fixed on the small pieces platform (die stage) 4 of lead frame 3.Each electrode of semiconductor chip 2 is connected to inner lead 7 by closing line 6, and utilizes sealing resin 8 packaged semiconductor 2, small pieces platform 4, closing line 6 and inner lead 7.Outside lead 9 stretches out as external connection terminals from sealing resin 8.
Usually, by utilizing process for stamping, engraving method etc. to handle and graphical copper alloy plate the formed lead framework.Behind graphical copper alloy plate,, engage thereby be convenient to carry out lead to the end of each inner lead silver-plated (Ag).When needed, whole lead frame is sprayed organic anti-blushing agent.In copper (Cu) alloy of formed lead framework, contain the zinc (Zn) as additive, plumbous (Pb), chromium (Cr) etc.
In the manufacture process of above-mentioned semiconductor device 1, in the heating process such as the lead joining process, the surface of lead frame 3 is by thermal oxidation.That is to say that heating lead frame 3 can form CuO film from the teeth outwards.In this case, this phenomenon can occur, promptly can separate with boundary vicinity between the basis material, the very a small amount of additive element in the copper alloy that freeze-outs at copper oxide.The part of additive element of freeze-outing has fragile characteristic.That is to say that the thermal oxidation process of copper alloy matrix material forms brittle layer (brittle layer) between this lip-deep copper oxide and inner base material.
In addition, when in such as the heating process of wire bond process, forming heat oxide film, the surface spraying anti-blushing agent of lead frame 3 is also formed brittle layer.That is to say that the part element that is included in the anti-blushing agent can form brittle layer at the boundary vicinity between copper matrix and the CuO film.
Be installed under the situation of installing in the substrate etc. at the semiconductor device that the lead frame 3 that will form above-mentioned brittle layer by encapsulation forms, if heat semiconductor device in the solder reflows processing procedure, the crack may take place in brittle layer.If the moisture in the sealing resin becomes steam and enters this crack, as shown in Figure 2, then between lead frame 3 (as the copper alloy of the material of small pieces platform 4) and sealing resin 8 (small pieces platform 4 lip-deep copper oxides), leafing (exfoliation) may occur, and may occur encapsulating and slight crack or the inner problem that slight crack occurs occur.If improve the installation temperature because adopt lead-free solder, then this problem will become more obvious.
In addition, in the melanism processing procedure that on copper alloy surface, forms cupric (CuO) acicular crystals, can obtain and effect similar effects of the present invention.Yet, when the semiconductor device of finishing being carried out the solder reflows processing, depend on the state that forms copper dioxide, may between cupric oxide and copper alloy matrix material, produce leafing, and have no idea to distinguish them according to its appearance.
Summary of the invention
Overall purpose of the present invention provides a kind of modified model that overcomes the problems referred to above, useful semiconductor device.
More specifically purpose of the present invention provide a kind of that constitute by copper alloy, can prevent in lead frame surface and adopt near the lead frame that produces leafing the semiconductor device of this lead frame.
To achieve these goals, according to an aspect of the present invention, provide a kind of lead frame, this lead frame comprises: the basis material that is made of copper alloy; And copper oxide by lead frame contact strong oxidant solution is formed on the surface of described basis material, this copper oxide is as outermost layer, and constitute by monovalence copper and cupric, wherein monovalence copper is as main component, and the thickness of this copper oxide is 10 to 1000 dusts.
According to the invention described above, because prior moulding copper oxide on the basis material of lead frame, so the basis material of lead frame not by thermal oxidation, and in the manufacture process of semiconductor device, does not form brittle layer on basis material.Therefore, even after carrying out resin-encapsulated, the heating semiconductor device can prevent that still the encapsulation of semiconductor device from expanding or producing slight crack.In addition, only, just copper oxide can be formed, the increase of semiconductor device manufacturing cost can be reduced like this by lead frame is immersed in the strong oxidant solution.
Because copper oxide is extremely thin, so this copper oxide does not become the acicular crystals layer.Therefore, on substrate material surface, this copper oxide can be shaped to one deck stabilized zone.
In addition, according to another aspect of the present invention, provide a kind of lead frame manufacturing method, this method comprises: the basis material that copper alloy is constituted is patterned into predetermined pattern; The part basis material is electroplated; And by basis material is immersed in the strong oxidant solution, on substrate material surface, form copper oxide as outermost layer, this copper oxide is made of monovalence copper and cupric, and wherein monovalence copper is as main component, and the thickness of this copper oxide is 10 to 1000 dusts.
In manufacturing method according to the invention, the time that can regulate in the basis material immersion strong oxidant solution is taken out basis material to become at cupric oxide from strong oxidant solution between the acicular crystal attitude.
In addition, according to another aspect of the present invention, provide a kind of semiconductor device, this semiconductor device comprises: lead frame comprises: the basis material that copper alloy constitutes; And copper oxide by lead frame contact strong oxidant solution is formed on the surface of described basis material, this copper oxide is as outermost layer, and constitute by monovalence copper and cupric, wherein monovalence copper is as main component, and the thickness of this copper oxide is 10 to 1000 dusts; Semiconductor element, it is installed in the predetermined portions of lead frame; And sealing resin, be used for encapsulated semiconductor device.
When describing in detail below reading in conjunction with the accompanying drawings, other purposes of the present invention, feature and advantage will become more obvious.
Description of drawings
Fig. 1 is the cutaway view that adopts the semiconductor device of conventional lead frame;
Fig. 2 is the cutaway view of semiconductor device shown in Figure 1, and it is illustrated in the leafing that produces between small pieces platform and the sealing resin;
Fig. 3 is the plane graph that is used for the lead frame of semiconductor device according to the embodiment of the invention;
Fig. 4 is the amplification view of the small pieces platform of lead frame shown in Figure 3;
Fig. 5 be illustrated in be installed to semiconductor chip 2 on the small pieces platform after, carry out the plane graph of the lead frame of the state that lead engages;
Fig. 6 illustrates the enlarged side view that is installed in the semiconductor chip on the small pieces platform; And
Fig. 7 A is to be used for explaining comparing the schematic diagram of the processing procedure of copper oxide formed according to the present invention with traditional melanism processing procedure with 7B.
Embodiment
Now, the embodiment of the invention will be described with reference to the accompanying drawings.
Fig. 3 is the plane graph that is used for the lead frame 10 of semiconductor device according to the embodiment of the invention.Fig. 4 is the amplification view of the small pieces platform 11 of lead frame 10 shown in Figure 3.By to handling as the copper alloy plate of matrix and graphical, form and be similar to lead frame 10 conventional lead frame, be used for semiconductor device according to the present invention.Usually, the copper alloy that is used for lead frame contains as zinc additive element, very small amount of (Zn), plumbous (Pb), chromium (Cr) etc.Usually utilize known technology, graphical copper alloy plate such as process for stamping and engraving method.Behind graphical copper alloy plate, to the end of each inner lead 12 silver-plated (Ag) for the structure that forms lead frame 10.So far, the processing of being carried out is identical with the processing that conventional lead frame is done.
Although in conventional lead frame, can after silver-plated, spray organic anti-blushing agent, lead frame 10 according to the present invention has omitted lip-deep anti-blushing agent, and forms copper oxide lamina on the surface of lead frame 10.That is to say, after spraying to anti-blushing agent on the copper alloy plate, just finished conventional lead frame, and in lead frame 10 according to the present invention, utilize specific process as described below that copper alloy as basis material is carried out oxidation, on the surface of lead frame 10, to form as outermost copper oxide 14 (please refer to Fig. 4).
As mentioned above, copper oxide 14 is being molded on the surface of lead frame 10, particularly on the surface of small pieces platform 11 after, just finished lead frame 10.Then, utilize lead frame 10 to make semiconductor device.
The copper oxide 14 on being molded over lead frame 10, identical with semiconductor device shown in Figure 1 according to the basic composition of the semiconductor device of the embodiment of the invention.Fig. 5 be illustrated in be installed to semiconductor chip 2 on the small pieces platform 11 after, carry out the plane graph of the lead frame 10 of the state that lead engages.Fig. 6 is the enlarged side view that the semiconductor chip 2 that is installed on the small pieces platform 11 is shown.
In the manufacture process of this semiconductor device, at first, utilize the small pieces binding material 5 that is arranged between them, semiconductor chip 2 is installed on the small pieces platform 11 of lead frame 10.Then, utilize closing line 6, each electrode of semiconductor chip 2 and the silver-plated part of inner lead 12 are linked together.After this, utilize sealing resin 8, encapsulation small pieces platform 11, semiconductor chip 2, closing line 6 and inner lead 12.
According to the semiconductor device of the present embodiment lead frame 10 of copper oxide 14 that adopted on the surface of basis material moulding.Because this reason, even in lead joining process process, heating lead frame 10, the copper in the basis material of lead frame 10 can be by thermal oxidation yet.Therefore, do not have brittle layer, thereby prevent that encapsulation from expanding or producing slight crack because of brittle layer, brittle layer may form between as the copper alloy of basis material and copper oxide because of the condensation of additive element during the thermal oxidation.
Now, will be with reference to the forming process of figure 7A and 7B explanation according to the copper oxide 14 of present embodiment.Fig. 7 A and 7B are used to explain that the situation with not moulding copper oxide 14 compares the schematic diagram of the processing procedure of moulding copper oxide 14.Fig. 7 A is illustrated near the variation of the state lead frame surface under the situation of not moulding copper oxide, and Fig. 7 B is illustrated in the variation of moulding according near the state lead frame surface under copper oxide 14 situations of the present invention.
At first, graphically constitute the basis material 21 of copper alloy plate so that this plate has the structure of lead frame.In this case, shown in Fig. 7 A-(a) and Fig. 7 B-(a), the copper alloy of basis material 21 is exposed on the surface of lead frame.
Then, according to present embodiment, lead frame 10 is carried out oxidation processes, shown in Fig. 7 B-(b).For situation shown in Fig. 7 A, that do not form copper oxide, do not carry out this oxidation processes.By lead frame 10 is immersed in the strong oxidant solution, carry out oxidation processes.Therefore, the copper in the basis material 21 is by the strong oxidizer oxidation, and formation copper oxide 14.Although copper oxide 14 mainly comprises monovalence copper (Cu
2O), but copper oxide 14 also can comprise cupric (CuO).
In the oxidizing process of utilizing strong oxidizer to carry out, between the copper alloy of copper oxide 14 and matrix 21, do not isolate additive element, and, therefore, do not form the brittle layer that forms because of the condensation of additive element.In addition, even spray anti-blushing agent on the surface of basis material, the composition of anti-blushing agent can not be included in the basis material yet, because this composition is dissolved in the strong oxidant solution, therefore, does not form brittle layer.
At this, be exactly so-called melanism processing procedure by copper alloy being immersed the process that forms copper oxide in the strong oxidant solution.The melanism processing procedure is the process that forms cupric (CuO) acicular crystals layer on copper alloy surface, is because the color of cupric (CuO) acicular crystals layer is a black and be referred to as the melanism processing.Usually, it is to be needle-like shape by the surface configuration with lead frame that melanism is handled, and improves the process of the bonding force between sealing resin and the lead frame.
Be used to carry out strong oxidant solution that melanism handles and be for example mixed solution of sodium chloride, NaOH and potassium persulfate.By under about 100 ℃, copper alloy was immersed in this mixed solution 3 to 10 minutes, form cupric (CuO) acicular crystals layer.
Although the copper oxide 14 that can also utilize the mixed solution moulding of the strong oxidizer that carries out above-mentioned melanism processing to form on basis material 21 in the present embodiment, copper oxide 14 is not the acicular crystals layer.That is to say, in traditional melanism processing procedure, proceed chemical reaction, become cupric (CuO) acicular crystals layer up to lip-deep copper oxide.On the contrary, the copper oxide 14 according to present embodiment mainly comprises monovalence copper (Cu
2O), this is to form cupric (CuO), promptly becoming before the acicular crystals layer, and the taking-up lead frame forms from the strong oxidizer mixed solution.
Therefore, must handle the required time much shorter than traditional melanism according to the oxidation treatment time of present embodiment.In addition, be cupric (CuO) acicular crystals layer although be carried out the outermost layer of the lead frame that melanism handles, having according to the lead frame 10 of present embodiment as outermost layer, is not the copper oxide 14 of acicular crystals layer.In addition,, still be enough in about 10 to 1000 scopes obviously than the thin thickness of handling the acicular crystals layer that forms by melanism according to the thickness of the copper oxide 14 of present embodiment.
As mentioned above, because, just can form copper oxide according to present embodiment only by lead frame being immersed the time very short in the strong oxidant solution, thus can easily form copper oxide 14, and do not increase the manufacturing cost of lead frame.In addition, copper oxide 14 can be extremely thin, and can be shaped to and stablize monovalence copper (Cu
2O) layer.
Then, when utilizing lead frame to form semiconductor device, in lead joining process process, the heating lead frame.At this moment, shown in Fig. 7 A-(c), because the thermal oxidation of the copper in the basis material 21 that exposes under not moulding copper oxide 14 situations shown in Figure 7 forms the copper oxide 22 shown in Fig. 7 A-(c).On the contrary, under moulding copper oxide 14 situations in above-mentioned oxidation processes, not new another copper oxide of moulding is because the oxidized copper layer 14 in the surface of basis material 21 covers.
At this, the copper in basis material 21 shown in Fig. 7 A, that expose is by thermal oxidation and form under the situation of copper oxide 22, between copper oxide 22 and basis material 21, separate and the basis material 21 that freeze-outs in additive element, thereby form condensed layer 23.Condensed layer 23 is equivalent to above-mentioned brittle layer.On the contrary, under situation shown in Fig. 7 B, moulding copper oxide 14, or not therefore, do not form condensed layer 23 because thermal oxidation produces copper oxide.
After carrying out wire bond process, utilize sealing resin 8 packaged semiconductor 2.Semiconductor chip 2 is installed and is fixed on the small pieces platform 11 of lead frame 10, but also utilize sealing resin to encapsulate small pieces platform 11 together.Therefore, in the process shown in Fig. 7 A, copper oxide 22 sealed resins 8 cover, shown in Fig. 7 A-(d).On the other hand, in the process shown in Fig. 7 B, utilize the copper oxide 14 sealed resins 8 of oxidizing process forced shaping to cover, shown in Fig. 7 B-(d).
After finishing resin-encapsulated, just finished the moulding semiconductor device.At this moment, semiconductor device is under the situation shown in Fig. 7 A and all working properly under the situation shown in Fig. 7 B.Therefore, preserve semiconductor device, up to using it.During preservation, the sealing resin of semiconductor device can absorb moisture from surrounding environment.
Therefore, when utilizing semiconductor device to manufacture a product, semiconductor device is installed to installs in the substrate etc.In many cases, utilize the welded and installed method that semiconductor device is installed.Particularly, by outside lead being welded on the electrode pad that substrate is installed, lead terminal N-type semiconductor N device is installed.In this installation method, semiconductor device carries out the heating of solder reflows.Because the fusing point height of lead-free solder is so heating-up temperature reaches about 230 to 240 ℃.
When heating semiconductor device with such temperature, the thermal stress that produces in the semiconductor device (sealing resin) raises, and may cause producing in the condensed layer 23 of fragility little slight crack like this.If the moisture that sealing resin absorbs enters this slight crack and becomes steam, then may in condensed layer 23, produce leafing, shown in Fig. 7 A-(e), and can produce the problem that sealing resin expanded or produced slight crack.
On the other hand, shown in Fig. 7 B, semiconductor device is provided with copper oxide 14 to prevent to form under the situation of condensed layer 23, boundary vicinity between lead frame 10 and sealing resin 8 does not produce slight crack or breaks, therefore because there is not brittle layer, and do not exist such as encapsulation and expand or the problem of slight crack.
Inventor's present embodiment of giving chapter and verse has the basis material (situation shown in Fig. 7 B) of copper oxide 14 but also proposes to have the basis material 21 (situation shown in Fig. 7 A) that utilizes the copper oxide 22 that thermal oxidation process forms, and copper oxide 14 and 22 is with discrete testing (tape pealing test).Lead frame is placed on the heater,, then, copper oxide 14 and 22 is installed to is with and begins to separate (pealing) from interpretation framework (read frame) with 250 ℃ temperature heating 3 minutes.Therefore, in all 5 test blocks, as the CuO film 22 and basis material 21 leafing of heat oxide film.On the contrary, in all 5 test blocks, do not produce leafing in the copper oxide 14 according to present embodiment.Therefore, can prove, compare, be bonded together more firmly according to the copper oxide 14 of present embodiment and the basis material 21 of lead frame with the copper oxide 22 that utilizes thermal oxidation process to form.
As mentioned above, utilize the lead frame 10 that has formed according to the copper oxide 14 of present embodiment, can prevent because the heating semiconductor device causes encapsulation to expand or produce slight crack in installation process.Particularly, even, can prevent that still semiconductor device from expanding or producing slight crack to carry out solder reflows with utilizing lead-free solder to install to handle 230 ℃ to 240 ℃ identical temperature.
The present invention is not limited to the concrete embodiment that discloses, and can change within the scope of the present invention and revise.The 2002-166898 Japan patent application formerly that present patent application was submitted to based on June 7th, 2002, it is for reference to quote its full content at this.
Claims (3)
1. lead frame, this lead frame comprises:
The basis material that constitutes by copper alloy; And
By the copper oxide that lead frame contact strong oxidant solution is formed on the surface of described basis material, this copper oxide is as outermost layer, and constitute by monovalence copper and cupric, wherein monovalence copper is as main component, and the thickness of this copper oxide is 10 to 1000 dusts.
2. lead frame manufacturing method, this method comprises:
The basis material that copper alloy is constituted is patterned into predetermined pattern;
The part basis material is electroplated; And
By basis material is immersed in the strong oxidant solution, on substrate material surface, form copper oxide as outermost layer, this copper oxide is made of monovalence copper and cupric, and wherein monovalence copper is as main component, and the thickness of this copper oxide is 10 to 1000 dusts.
3. semiconductor device, this semiconductor device comprises:
Lead frame comprises: the basis material that copper alloy constitutes; And copper oxide by lead frame contact strong oxidant solution is formed on the surface of described basis material, this copper oxide is as outermost layer, and constitute by monovalence copper and cupric, wherein monovalence copper is as main component, and the thickness of this copper oxide is 10 to 1000 dusts;
Semiconductor element, it is installed in the predetermined portions of lead frame; And
Sealing resin is used for encapsulated semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031275575A CN100347853C (en) | 2003-08-07 | 2003-08-07 | Lead frame and its manufacturing method and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031275575A CN100347853C (en) | 2003-08-07 | 2003-08-07 | Lead frame and its manufacturing method and semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1581473A CN1581473A (en) | 2005-02-16 |
| CN100347853C true CN100347853C (en) | 2007-11-07 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB031275575A Expired - Lifetime CN100347853C (en) | 2003-08-07 | 2003-08-07 | Lead frame and its manufacturing method and semiconductor device |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2175049B1 (en) * | 2008-10-13 | 2011-06-15 | ATOTECH Deutschland GmbH | Method for improving the adhesion between silver surfaces and resin materials |
| JP5863174B2 (en) * | 2012-03-01 | 2016-02-16 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
| CN106653725A (en) * | 2015-11-03 | 2017-05-10 | 无锡麟力科技有限公司 | Lead frame |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4891333A (en) * | 1984-10-09 | 1990-01-02 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
| JP2000068303A (en) * | 1998-08-24 | 2000-03-03 | Sony Corp | Manufacture of semiconductor device |
| JP2002060967A (en) * | 2000-08-23 | 2002-02-28 | Mec Kk | Surface treating method for copper or copper alloy |
-
2003
- 2003-08-07 CN CNB031275575A patent/CN100347853C/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4891333A (en) * | 1984-10-09 | 1990-01-02 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
| JP2000068303A (en) * | 1998-08-24 | 2000-03-03 | Sony Corp | Manufacture of semiconductor device |
| JP2002060967A (en) * | 2000-08-23 | 2002-02-28 | Mec Kk | Surface treating method for copper or copper alloy |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1581473A (en) | 2005-02-16 |
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