CN100347837C - Semiconductor substrate structure and process method thereof - Google Patents
Semiconductor substrate structure and process method thereof Download PDFInfo
- Publication number
- CN100347837C CN100347837C CNB2004100707061A CN200410070706A CN100347837C CN 100347837 C CN100347837 C CN 100347837C CN B2004100707061 A CNB2004100707061 A CN B2004100707061A CN 200410070706 A CN200410070706 A CN 200410070706A CN 100347837 C CN100347837 C CN 100347837C
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- base material
- semiconductor substrate
- hole groove
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 238000000034 method Methods 0.000 title claims abstract description 23
- 239000000758 substrate Substances 0.000 title claims description 48
- 230000008569 process Effects 0.000 title description 5
- 239000000463 material Substances 0.000 claims abstract description 69
- 239000002131 composite material Substances 0.000 claims abstract description 21
- 238000003672 processing method Methods 0.000 claims abstract description 16
- 238000011282 treatment Methods 0.000 claims abstract description 8
- 229920000642 polymer Polymers 0.000 claims description 18
- 229920002521 macromolecule Polymers 0.000 claims description 16
- 238000012545 processing Methods 0.000 claims description 8
- 239000004743 Polypropylene Substances 0.000 claims description 6
- 229920001155 polypropylene Polymers 0.000 claims description 6
- 239000011265 semifinished product Substances 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims description 5
- 229910000831 Steel Inorganic materials 0.000 claims description 4
- -1 polypropylene Polymers 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 4
- 239000010959 steel Substances 0.000 claims description 4
- 238000003486 chemical etching Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
- 238000007650 screen-printing Methods 0.000 claims description 3
- 238000004806 packaging method and process Methods 0.000 abstract description 7
- 230000008901 benefit Effects 0.000 abstract description 5
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000005538 encapsulation Methods 0.000 description 21
- 238000005520 cutting process Methods 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 13
- 238000010586 diagram Methods 0.000 description 8
- 238000004100 electronic packaging Methods 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000004033 plastic Substances 0.000 description 4
- 229920003023 plastic Polymers 0.000 description 4
- 239000011469 building brick Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000000047 product Substances 0.000 description 3
- 238000009826 distribution Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 101100028951 Homo sapiens PDIA2 gene Proteins 0.000 description 1
- 102100036351 Protein disulfide-isomerase A2 Human genes 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 239000002861 polymer material Substances 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Images
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- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The present invention discloses a base material structure and a processing method of a semiconductor. The method comprises the procedures: a through hole slot is processed on the base material; the hole slot is filled with high molecule composite material; an abrading treatment or a sandblast treatment are carried out on the surface of the base material; a surface coating material treatment is carried out on the surface of the base material. The base material structure of the semiconductor comprises base material, a through hole and a slot, wherein the through hole and the slot are filled with high molecule material and composite material. The present invention has the advantages that the planeness is high, and the base material can not easily generate coarse edges when be cut. The present invention is not easy to deform, and the packaging rate and the packaging quality are improved. When the present invention uses a chip of a light-emitting diode or a chip of a general integrated circuit to package, the packaging requirements required by an electronic chip can be easily achieved, and the cost of the present invention is lower than that of the existing base material structure.
Description
Technical field
The present invention relates to the Electronic Packaging field, particularly relate to a kind of semiconductor substrate structure and processing method thereof that is used for Electronic Packaging.
Background technology
In electronics industry, except the semi-conductor industry that attracts most attention, Electronic Packaging industry (Electronic Packaging Industry) also is accompanied by light, thin, short, the little and H.D requirement of electronic product and more shows important, and the situation that has half share with semi-conductor industry is more arranged.The encapsulation technology of Electronic Packaging industry is more weeded out the old and bring forth the new, as ball bar array encapsulation (Ball Gate Array Package), the encapsulation of plastics pin row (Plastic Pingrid Array Package), TQFP (four limit flat packaging), TSOP (Thin Small Outline Package, thin-type small-size encapsulation) etc.
As use popular cognitively, after the Electronic Packaging technology is meant and completes from semiconductor integrated circuit, be loaded among the on line structure with other electronic building brick mutual group, become an electronic product, to reach all technologies of a particular design function.The Electronic Packaging major function has four, is respectively that electric energy transmits (Power Distribution), signal transmits (Signal Distribution), heat abstraction (HeatDissipation) and protection support (Protection and Support).As be usually used in IC integrated circuit (IC) chip encapsulation and LED encapsulation.
Electronic Packaging can be complied with the distance with integrated circuit again, be divided into several different levels: as the encapsulation (First Level Packaging) of first level, be called the encapsulation (Chip LevelPackaging) of brilliant first level again, combine the technology that forms electronic building brick (ElectronicModule) for integrated circuit (IC) chip with encapsulating structure; (Plastic Dual-in-linePackage, PDIP), the encapsulation of its first level has been forgiven brilliant unit's adhesion (Die Attach), routing in conjunction with (Wire Bond) and sealing technologies such as (Encapsulation) in general plastics double-row type encapsulation.The encapsulation of second level (SecondLevel Packaging) then is meant being combined on the circuit board through the electronic building brick of first level encapsulation with other, forms circuit card or circuit board; In encapsulation for the second time, modal is the making of printed circuit board (PCB) and the interconnection technique of assembly and circuit board, as pin through-hole type technology (Pin Through Hole, PTH) and surface mount technology (Surface Mount Technology, SMT).The 3rd layer of encapsulation (Third LevelPackaging) and the 4th level encapsulation (Fourth Level Packaging) are meant circuit board and combination of circuit cards, form subsystem and the technology that reaches system's generation effect.
Please refer to as shown in Figure 1, situation when it is known base material 1a in the face of cutter 12a cutting, especially when cutting, traditional metal base 1a has the structural strength problem and the cutting precision problem of difficulty, as cut the distortion of burr or structural deformation, when practical application, can influence cutting speed and cutting precision, and the encapsulation qualification rate is also had negative effect.Therefore be necessary to develop a kind of be beneficial to cutting and construct tough matrix structure adapt to requirement of actual application.
Therefore, for now on the market major part need the semiconductor chip of base material, easily cut and have an important need that structural strength is an encapsulation process.
Summary of the invention
Technical problem to be solved by this invention provides a kind of semiconductor substrate structure and processing method thereof, solves the problem that existing base material can not reach easy cutting and stronger structural strength simultaneously.
For achieving the above object, the invention provides a kind of processing method of semiconductor substrate, its characteristics are, comprise the steps: step 1, process a through hole groove on base material; Step 2, in this through hole groove filled high polymer composite material; Step 3, this substrate surface is ground or sandblasts; Step 4, this substrate surface carried out the processing of surface-coated material.
The processing method of above-mentioned semiconductor substrate, its characteristics are that the method for processing this through hole groove at this base material is chemical etching.
The processing method of above-mentioned semiconductor substrate, its characteristics are, further comprise a substrate surface alligatoring step before described step 1, with the chemical treatment or the mode that sandblasts this base material are carried out surface coarsening.
The processing method of above-mentioned semiconductor substrate, its characteristics are, should the method for filled high polymer composite material be screen printing or steel plate printing in this through hole groove.
The processing method of above-mentioned semiconductor substrate, its characteristics be, this surface-coated material be treated to electroplated conductive layer.
The processing method of above-mentioned semiconductor substrate, its characteristics are, the method of filled high polymer composite material is earlier with two plate substrate semi-finished product clampings, one macromolecule thin plate up and down in this through hole groove, pass through high-temperature pressurizing again, the macromolecule light sheet material is in a liquid state injects in the through hole groove of this base material.
In order better to realize purpose of the present invention, the present invention also provides a kind of semiconductor substrate structure, and its characteristics are, comprise: base material has the through hole groove; Polymer composite is filled in this through hole groove; Conductive material layer,, be coated on the outer surface of this base material and this polymer composite.
Above-mentioned semiconductor substrate structure, its characteristics be, this substrate structure is two plate substrate semi-finished product clampings, one a macromolecule thin plate up and down, through high-temperature pressurizing the macromolecule light sheet material is in the through hole groove that liquid injects this base material again.
Above-mentioned semiconductor substrate structure, its characteristics are that this macromolecule light sheet material is a polypropylene.
Technique effect of the present invention is:
Semiconductor substrate structure of the present invention, there are high-flatness and cutting to be difficult for producing the advantage of burr, and it is not yielding, the yield and the quality of encapsulation have been increased, when chip that uses light-emitting diode or general IC integrated circuit (IC) chip encapsulation, can reach the required package requirements of electronic chip easily, and lower than known substrate structure cost; Substrate property improves when utilizing polymer composite in conjunction with the method for traditional base material, and more known traditional base material has the advantage that cutting accuracy improves and structure is strengthened.
Method advantage of the present invention is as follows: (1) manufacturing process is provided with easily, requiredly adds newly that fully price and specification requirement are neither big; (2) the base material mechanical strength is good; (3) cutting easily; (4) conventional package equipment is still available, can cooperate conventional package technology.
Further describe specific embodiments of the invention below in conjunction with accompanying drawing.
Description of drawings
Fig. 1 is known base material cutting schematic diagram;
Fig. 2 A is the first embodiment first step schematic diagram;
Fig. 2 B is first embodiment, the second step schematic diagram;
Fig. 2 C is the first embodiment third step schematic diagram;
Fig. 2 D is first embodiment the 4th a step schematic diagram;
Fig. 3 A is the second embodiment first step schematic diagram;
Fig. 3 B is second embodiment, the second step schematic diagram;
Fig. 3 C is the second embodiment third step schematic diagram;
Fig. 4 is the stereogram after the base material etching of the present invention;
Fig. 5 is the situation of base material perfusion macromolecular material of the present invention.
Wherein, description of reference numerals is as follows:
Base material 1a cutter 12a
Base material 1 polymer composite 12
Surface-coated material 13 through hole grooves 14
Embodiment
Please refer to Fig. 2 A is two embodiment of the present invention to Fig. 2 D and Fig. 3 A to Fig. 3 C, does a narration in this manufacture method to the present invention's structure; The manufacture method of the present invention's structure comprises: (1) generally can be etching (can be exposure imaging) and finishes base material 1 processing one through hole groove 14; (2) this substrate surface being made it surface coarsening and composite material with chemical treatment (acid activation) or the mode of sandblasting can (can be polyethylene-PE) generally can be wire mark or steel plate printing and reach the purpose of filling the specific region these through hole groove 14 filled high polymer composite materials 12 in conjunction with (3); (4) this substrate surface is ground or sandblast, this is to overflow macromolecular material 12 in order to grind off this substrate surface; And (5) are chemical treatments such as electroplating surface to the in addition processing of surface-coated material 13 of this substrate surface.
The thin portion of embodiments of the invention below will be described in detail in detail change, wherein this base material method of processing this through hole groove generally can be chemical etching; And further comprising a step and be the substrate surface alligatoring before (1) step, is to combine with polymer composite is more efficient for making the surface with the chemical treatment mode or the mode that sandblasts; Wherein should can be screen printing or steel plate printing to the method for this through hole trench fill polymer composite; Be earlier with two plate substrates, 2 semi-finished product clampings, one macromolecule thin plates 22 (as polypropylene (PP) thin plate) up and down wherein again to the method for this through hole trench fill macromolecular material, pass through high-temperature pressurizing again, the macromolecule light sheet material is in a liquid state inject in the through hole groove of this base material (as Fig. 3 A to shown in Fig. 3 C), this is firmer base material, and is different to Fig. 2 D with Fig. 2 A.
Substrate structure of the present invention comprises: metal base has the through hole groove; Wherein be filled with polymer composite in this through hole groove; The polymer composite in this through hole groove wherein, the height of its outstanding this base material is lower than the height of this conductive material layer.
Semiconductor substrate structure of the present invention can be firmer structure, as Fig. 3 A to (not containing last surface-coated step shown in Fig. 3 C, it is for being same as Fig. 2 D), wherein this substrate structure is two plate substrates, 2 semi-finished product clampings, one a macromolecule thin plate 22 up and down, and this hole slot 24 is irritated and macromolecular material 23 is arranged and linked to each other with this macromolecule thin plate 22; Wherein the constituent material of this macromolecule thin plate can be polypropylene (PP).
Please refer to Fig. 4 of the present invention and be the stereogram (as three-chip type base material 2 among the figure) after a slice or several pieces base material etching hole slots, again with reference to figure 5 for pouring into the finished product behind the polymer composite 12, be a kenel of the invention process.
The convenience of feature of the present invention is, traditional base material and macromolecular material are packaged together, and makes the base material material character that is improved, and it is low and little to the influence of traditional die packing producing line that cost is set.
Must know that filled high polymer material of the present invention is not high price or the equipment that is difficult for obtaining in the plant equipment of base material through hole groove, and base material is ground leveling also can be the plant equipment that obtains easily, therefore of the present invention the setting easily; And substrate structure of the present invention take into account cutting easily and structure tough and tensile; The present invention is little to the process sequence influence of conventional package program again, can dissolve in fully in the middle of the old canned program, and old encapsulation board does not need significantly to revise, and is real in adapting to the useful invention of manufacturing actual state.
The present invention has following advantage: (1) new technology is provided with easily, requiredly newly adds fully price and neither big (2) base material mechanical strength good (3) cutting of specification requirement (4) conventional package equipment is still available easily, can cooperate conventional package technology.
The above is preferred embodiment of the present invention only, is not to be used for limiting practical range of the present invention; Every according to equivalence variation and modification that the present invention did, all contained by claim of the present invention.
Claims (9)
1, a kind of processing method of semiconductor substrate is characterized in that, comprises the steps:
Step 1, on base material processing one through hole groove;
Step 2, in this through hole groove filled high polymer composite material;
Step 3, this substrate surface is ground or sandblasts; And
Step 4, this substrate surface carried out the processing of surface-coated material.
2, the processing method of semiconductor substrate according to claim 1 is characterized in that, the method for processing this through hole groove at this base material is chemical etching.
3, the processing method of semiconductor substrate according to claim 1 is characterized in that, further comprises a substrate surface alligatoring step before described step 1, with the chemical treatment or the mode that sandblasts this base material is carried out surface coarsening.
4, the processing method of semiconductor substrate according to claim 1 is characterized in that, should the method for filled high polymer composite material be screen printing or steel plate printing in this through hole groove.
5, the processing method of semiconductor substrate according to claim 1 is characterized in that, this surface-coated material be treated to electroplated conductive layer.
6, the processing method of semiconductor substrate according to claim 1, it is characterized in that, the method of filled high polymer composite material is earlier with two plate substrate semi-finished product clampings, one macromolecule thin plate up and down in this through hole groove, pass through high-temperature pressurizing again, the macromolecule light sheet material is in a liquid state injects in the through hole groove of this base material.
7, a kind of semiconductor substrate structure is characterized in that, comprises:
Base material has the through hole groove;
Polymer composite is filled in this through hole groove;
Conductive material layer,
Be coated on the outer surface of this base material and this polymer composite.
8, semiconductor substrate structure according to claim 7 is characterized in that, this substrate structure is two plate substrate semi-finished product clampings, one a macromolecule thin plate up and down, through high-temperature pressurizing the macromolecule light sheet material is in the through hole groove that liquid injects this base material again.
9, semiconductor substrate structure according to claim 8 is characterized in that, this macromolecule light sheet material is a polypropylene.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100707061A CN100347837C (en) | 2004-07-21 | 2004-07-21 | Semiconductor substrate structure and process method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100707061A CN100347837C (en) | 2004-07-21 | 2004-07-21 | Semiconductor substrate structure and process method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1725459A CN1725459A (en) | 2006-01-25 |
| CN100347837C true CN100347837C (en) | 2007-11-07 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2004100707061A Expired - Fee Related CN100347837C (en) | 2004-07-21 | 2004-07-21 | Semiconductor substrate structure and process method thereof |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109291471B (en) * | 2018-09-18 | 2021-05-07 | 株洲时代新材料科技股份有限公司 | Cutting and polishing processing method for thick workpiece glass fiber reinforced plastic laminated plate |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1213265A (en) * | 1997-09-26 | 1999-04-07 | 华通电脑股份有限公司 | Method for manufacturing grain dimensional packaged circuit board |
| CN1278656A (en) * | 1999-06-17 | 2001-01-03 | 佳能株式会社 | Method for producing semiconductor substrate material and solar cells |
| JP2001044588A (en) * | 1999-07-29 | 2001-02-16 | Ngk Spark Plug Co Ltd | Filter foe through-hole, printed wiring board using the same, and manufacture thereof |
| CN2718778Y (en) * | 2004-07-21 | 2005-08-17 | 宏齐科技股份有限公司 | Semiconductor base material structure |
-
2004
- 2004-07-21 CN CNB2004100707061A patent/CN100347837C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1213265A (en) * | 1997-09-26 | 1999-04-07 | 华通电脑股份有限公司 | Method for manufacturing grain dimensional packaged circuit board |
| CN1278656A (en) * | 1999-06-17 | 2001-01-03 | 佳能株式会社 | Method for producing semiconductor substrate material and solar cells |
| JP2001044588A (en) * | 1999-07-29 | 2001-02-16 | Ngk Spark Plug Co Ltd | Filter foe through-hole, printed wiring board using the same, and manufacture thereof |
| CN2718778Y (en) * | 2004-07-21 | 2005-08-17 | 宏齐科技股份有限公司 | Semiconductor base material structure |
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| Publication number | Publication date |
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| CN1725459A (en) | 2006-01-25 |
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