CN100336218C - High-frequency IC multi-bus knot tying structure and method - Google Patents

High-frequency IC multi-bus knot tying structure and method Download PDF

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Publication number
CN100336218C
CN100336218C CNB031538452A CN03153845A CN100336218C CN 100336218 C CN100336218 C CN 100336218C CN B031538452 A CNB031538452 A CN B031538452A CN 03153845 A CN03153845 A CN 03153845A CN 100336218 C CN100336218 C CN 100336218C
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wire
wire pad
pad
routing
coplane
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CN1591852A (en
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李胜源
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Via Technologies Inc
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Via Technologies Inc
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  • Engineering & Computer Science (AREA)
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  • Semiconductor Integrated Circuits (AREA)

Abstract

The present invention relates to a high-frequency integrated circuit multi-in-line throwing structure and a method thereof. The high-frequency integrated circuit multi-in-line throwing structure is provided with a first electronic assembly, a second electronic assembly, a chip pad and a plurality of metal wires, wherein the first electronic assembly is attached on the second electronic assembly by the chip pad; the periphery of the surface, corresponding to the other side of the chip pad, is provided with throwing pads and coplane throwing pads which surround the throwing pads; the part of the chip pad, which faces to and bares outside the first electronic assembly by a complete circle, forms a line-shaped throwing pad; the second electronic assembly faces to the chip pad and bares at the periphery of the outer side of the chip pad by the complete circle; the positions, corresponding to the throwing pads and the coplane throwing pads, are provided with a plurality of pins; the metal wires can be divided into signal wires and grounding wires; the metal wires can be at least divided into a first line and a second line according to the positions of the throwing pads and the coplane throwing pads; the first line approaches to the line-shaped throwing pads; the second column does not approach to the line-shaped throwing pads. The signal wires are electrically connected with the throwing pads and one of the pins, and the pin corresponds to the throwing pads; the grounding wires on the first line are electrically connected with the line-shaped throwing pads.

Description

A kind of high-frequency integrated circuit multi-in-line wire bond structure and method
Technical field
The present invention relates to a kind of high-frequency integrated circuit wire bond structure and method, particularly relate to a kind of high-frequency integrated circuit multi-in-line wire bond structure and method that makes electrical connection between electronic building brick can have best electrical characteristic.
Background technology
At present be the more cheap and firm circuit connection method of a kind of cost because routing engages, so routing to engage be circuit connection the most a kind of method of normal use between IC chip and circuit component in the electronic product.And at electronic product under the situation that its operating frequency increases day by day, routing engages stray inductance, the parasitic capacitance regular meeting produced and directly impacts the electrical characteristic between IC chip and circuit, can not be ignored.So, how to reduce these ghost effects to avoid the decline of electrical characteristic between IC chip and circuit in the electronic product, be worth noting.
Usually, the routing between IC chip and circuit component (yet comprising other IC chip) is not directly to beat on the surface of IC chip and circuit component, but beats on IC chip and the lip-deep wire pad of circuit component.By wire pad the circuit of IC chip and circuit component inside is drawn, the signal transmission between IC chip and circuit component can be finished by wire pad and routing.
In order to increase the electrical characteristic between IC chip and circuit component, wire bond structure can have a lot of variations, for example known technology under the assembling structure between routing the reduction of stray inductance, electric capacity take the holding wire both sides is provided with parallel earth connection, and the mode of earth connection coplane is implemented.
As shown in Figure 1, this figure is known reduction routing stray inductance, the protective circuit schematic diagram of electric capacity.In the assembling structure 100, chip 110 coincides on chip mat 125, chip mat 125 coincides on substrate 120, and has signal end wire pad 190, earth terminal coplane wire pad 195 and pin 160,170,180 (also can be considered wire pad) respectively on chip 110 and the substrate 120.Chip 110 then passes through metal wire 140,130,150 is distinguished routings in signal end wire pad 190, earth terminal coplane wire pad 195 with being electrically connected of 120 of substrates, and blocks respectively in pin 170,160,180.Chip 110 is connected with the signal of 120 of substrates, for the signal end wire pad 190 of signal from the chip 110 transfers to pin (lead) 170 on the substrate 120 via metal wire 140, and the earth terminal coplane wire pad 195 of signal ground from the chip 110 transfers to pin 160,180 on the substrate 120 respectively via metal wire 130,150.Wherein, by earth terminal and coplane wire pad 195 coplanes, signal forms loops at earth terminal coplane wire pad 195 and signal end wire pad 190 at the signal ground metal wire 130,150 of chip 110 ends.And the stray inductance that metal wire 130,140,150 is produced under this configuration is when only having single metal wire 140 to compare, and its stray inductance has reduced effectively.And the reason that stray inductance effectively reduces is, the signal metal line 140 other two bars grounded metal lines 130,150 that are provided with, therefore those skilled in the art as can be known, after the ground connection of signal needn't transfer to substrate 120 by signal metal line 140 again, the via (via hole) that is connected via circuit in the substrate 120 is connected to the ground plate in the substrate 120, and can directly pull out by chip 110, by being connected to the pin 160,180 that directly is considered as ground connection on the substrate 120 via signal ground metal wire 130,150 from earth terminal coplane wire pad 195.So it is shorter that signal ground becomes, stray inductance effectively reduces, and because the loop that ground connection coplane wire pad end 195 designing institutes produce can help to reduce the magnetic field between metal wire.
From the above, wire bond structure in Fig. 1 exposes following shortcoming: owing to have certain degree spacing (usually greater than 0.5mm) between the pin of pin 160-180 and pin, therefore holding from chip 110 ends to pin 160-180, the spacing between metal wire 130-150 (pitch) obviously increases.And the spacing between metal wire 130-150 for maximum, therefore, all has certain distance apart at the metal wire 130-150 of pin 160-180 end at pin 160-180 end each other.This result causes the formed track of these metal wires 130-150 loop to be limited and loop length is excessive.In addition, though the feedback that known wire bond structure produced is lost in operating frequency 5GHz, because its loop inductance is less, the return loss that therefore known wire bond structure produced can be lower than 15dB usually, still is not very big.
Excessive in order to improve the wire bond structure loop, known technology also provides a kind of wire bond structure that has than short circuit ground distance.As shown in Figure 2, this figure is the generalized section of known high frequency structure arrangement.This structure arrangement 200 mainly comprises substrate 210 and chip 240.Have chip mat (die pad) 220 on the substrate 210 with carries chips 240.Chip 240 has routing face 241, then has wire pad 243-249 on the routing face 241.And has pin (lead frame) 250,255 on the substrate 210.Chip 240 then relies on the wire pad 243,249 of metal wire 273,277 elder generation's difference routings on chip 240 routing faces 241 with being electrically connected of 210 of substrates, block the part outside chip mat 220 is exposed to chip 240 more respectively, and with metal wire 270,275 respectively routings block respectively again in pin 250,255 and reach in wire pad 245,247.Because radio circuit or high speed circuit are to there being great demand on operating frequency and the usefulness, signal ground be except connecting pin 250,255 respectively by metal wire 270,275 on the chip 240, more respectively by via 283,285 to the substrate 210 ground plates 280 and ground connection.Also can connect chip mats and be exposed to the outer part of chip 240, connect by via 287,289 respectively again and direct ground connection by metal wire 273,277.Therefore signal ground might not pass through metal wire 270,275 ground connection on the chip 240, and when by metal wire 273,277 ground connection, can have short grounding path.
But, be exposed to chip 240 part outward though Fig. 2 is arranged at chip mat 220 with earth point, can reduce grounding path, the tactic design between metal wire 270-277 still can produce bigger electromagnetic interference, and the whole circuit characteristic of influence.
Summary of the invention
Because the defective of above-mentioned known technology, the present invention proposes a kind of high-frequency integrated circuit multi-in-line wire bond structure and method, can increase return loss, reduce insert loss, reduce the structure dress to the impedance that chip the caused effect that do not match, to improve the high frequency response of its integrated circuit.
Specifically, the invention provides a kind of high-frequency integrated circuit multi-in-line wire bond structure, it comprises: first electronic building brick, and it comprises: the routing face; First loading end is with respect to the opposite side surface of described routing face; Wire pad is positioned at described routing face surrounding; The coplane wire pad is positioned on the described routing face and is surrounded on described wire pad; Second electronic building brick, it comprises: second loading end, paste with described first loading end is mutually adjacent, and the whole circle of described second loading end peripheral part is exposed and be surrounded on around described first loading end; A plurality of pins are positioned at around described second loading end and corresponding to described wire pad and described coplane wire pad; And many metal line, can divide into holding wire and many earth connections at least according to the signal that is transmitted; Wherein, one end of described holding wire is electrically connected on described wire pad, the other end of described holding wire be electrically connected in the described pin with described wire pad corresponding one of them, and an end of described earth connection is electrically connected on described coplane wire pad, and with respect to an end of described earth connection, the described earth connection other end then is electrically connected on described second loading end tightly around the wire wire pad and the described pin of first loading end.
High-frequency integrated circuit multi-in-line wire bond structure of the present invention, it has first electronic building brick, second electronic building brick, chip mat and metal wire.Wherein, first electronic building brick also has the routing face and with respect to first loading end of routing face another side, has wire pad around the routing face and around the coplane wire pad of this wire pad; Chip mat then has second loading end and the 3rd loading end, second loading end is to paste with first loading end is adjacent mutually, and the whole on every side circle of second loading end exposes and is surrounded on first loading end part on every side is the wire wire pad, and the 3rd loading end then is positioned at the another side with respect to second loading end; Second electronic building brick has pin around also having the 4th loading end and loading end, and the 4th loading end and the 3rd loading end are adjacent mutually to be pasted, the whole circle of the 4th loading end peripheral part exposes and is surrounded on around first loading end, and the pin around the 4th loading end then is positioned at the position corresponding to wire pad and coplane wire pad; In addition, metal wire can be divided into holding wire and earth connection at least according to the signal that is transmitted, and wherein, holding wire be electrically connected in wire pad and these pins with wire pad corresponding one of them, and these earth connections be electrically connected on the coplane wire pad and with the corresponding wire wire pad in these earth connections position on the coplane wire pad and these pins, and holding wire and these earth connections can be divided into first row and the secondary series at least according to the position that lays respectively on wire pad and the coplane wire pad, first row are near the wire wire pad, secondary series then is listed as away from the wire wire pad than first, and first these earth connections that list are electrically connected on the wire wire pad.
The present invention also provides a kind of high-frequency integrated circuit to arrange wire bond structure more, and it comprises: the wire pad of a high-frequency signal is in die terminals; The wire pad of one ground connection is in die terminals, and the wire pad of wherein said ground connection surrounds the wire pad of described high-frequency signal; One ground plane is below die terminals; The routing pin of one high-frequency signal is at the packaging body end; The routing pin of a plurality of ground connection is at the packaging body end; The routing of one high-frequency signal, the routing of wherein said high-frequency signal are connected to the routing pin of described high-frequency signal from the wire pad of described high-frequency signal; And the routing of a plurality of ground connection, the routing of wherein said ground connection is connected to the routing pin of described ground plane and described a plurality of ground connection respectively from the wire pad of described ground connection; Wherein, the routing of described ground connection surrounds the routing of described high-frequency signal.
High-frequency integrated circuit multi-in-line routing method of the present invention, applicable to above-mentioned high-frequency integrated circuit multi-in-line wire bond structure, described method comprises that step is as follows: earlier holding wire is originated in above-mentioned wire pad in positive routing mode, and block in the above-mentioned pin therewith wire pad corresponding one of them; Again the partial earthing line is originated on the above-mentioned coplane wire pad in positive routing mode and belong to first column position, and block, with the corresponding wire wire pad in its position; At last, the described earth connection of part originated on this coplane wire pad in positive routing mode belong to the secondary series position, and block and corresponding pin in its position and wire wire pad.
Comprehensively above-mentioned, a kind of high-frequency integrated circuit multi-in-line wire bond structure and method that the present invention proposes, by around holding wire, increasing earth connection, and the partial earthing line is connected on the chip mat, can increase return loss, reduce to insert loss, reduce the structure dress to the impedance that chip the caused effect that do not match, to improve the high frequency response of its integrated circuit.
Description of drawings
Fig. 1 is the protective circuit schematic diagram of known reduction routing stray inductance, electric capacity;
Fig. 2 is the generalized section of known high frequency structure arrangement;
Fig. 3 A and Fig. 3 B are respectively a kind of high-frequency integrated circuit multi-in-line wire bond structure of the preferred embodiment situation A according to the present invention and overlook and the 3D schematic diagram;
Fig. 4 A and Fig. 4 B are respectively a kind of high-frequency integrated circuit multi-in-line wire bond structure of the preferred embodiment situation B according to the present invention and overlook and the 3D schematic diagram;
Fig. 5 A and Fig. 5 B are respectively a kind of high-frequency integrated circuit multi-in-line wire bond structure of the preferred embodiment situation C according to the present invention and overlook and the 3D schematic diagram;
Figure six is the equivalent circuit diagram between the assembling structure routing;
Fig. 7 A and Fig. 7 B figure are respectively the curve chart of return loss-operating frequency and insertion loss; And
Fig. 8 A be between known metal wire the field of magnetic forece distribution map;
Fig. 8 B, 8C and 8D are respectively the field of magnetic forece distribution map between preferred embodiment situation A of the present invention, B, C metal wire.
Embodiment
For making feature of the present invention, purpose and function are had further cognitive and understanding, existing conjunction with figs. is described in detail below:
Because known wire bond structure can produce bigger parasitic capacitance, inductance and bigger defectives such as electromagnetic interference, the present invention uses the coplane wire pad on the IC chip except considering, also consider the earth connection routing on the coplane wire pad on the chip mat of chip below, so that the distance of signal ground shortens on the chip.The present invention is also special consider to increase grounded metal line on the coplane wire pad with routing to chip mat, and the arranged distribution of grounded metal line is made more perfect planning, with the insertion loss and the increase return loss of effective reduction inter-module, and the piece electrical characteristic is improved.
The invention provides a kind of high-frequency integrated circuit multi-in-line wire bond structure and method that on chip, has earth terminal coplane wire pad, except the grounded metal line on the coplane wire pad partly is connected to chip mat, part is connected to the pin, and in addition considers to increase the distribution of grounded metal line.
Shown in Fig. 3 A and Fig. 3 B, its a kind of high-frequency integrated circuit multi-in-line wire bond structure that is respectively the preferred embodiment situation A according to the present invention is overlooked and the 3D schematic diagram.This assembling structure 300 mainly has first electronic building brick 310 (for example being chip), second electronic building brick 320 (for example being substrate) and chip mat 330.Its chips 310 is affixed on the substrate 320 with chip mat 330 pads, chip 310, chip mat 330 and substrate 320 places of coinciding form the shape (chip 310, chip mat 330 and substrate 320 formed similar are in Fig. 2 chips 240, chip mat 220 and substrate 210 formed structures) of ladder, and on the chip 310 with respect to being provided with wire pad 360 around the chip mat 330 opposite side surfaces and around the coplane wire pad 370 of wire pad 360, chip mat 330 in the face of and the whole circle part that is exposed to chip 310 outsides form the wire wire pad.Simultaneously substrate 320 in the face of this chip mat and whole circle be exposed to chip mat 330 outsides around, and be provided with a plurality of pins 353,355,357 with respect to the position of wire pad 360 and coplane wire pad 370.
The signal transmission that chip 310 and substrate are 320 then is electrically connected by many metal line 371-383.Wherein, these metal wires 371-383 can divide into holding wire 377 and earth connection 371-375,379-383 according to the kind of transmission signals.And these earth connections 371-375,379-383 are crisscross arranged around holding wire 377.In this preferred embodiment, coplane wire pad 370 is to fall into jagged shape in the type base, and coplane wire pad 370 can equidistantly be divided into following six position 341-351, collocation wire pad 360, the routing that forms two row combinations altogether is provided with the position, one row are near wire wire pad 330, and another row are then away from wire wire pad 330.
Wherein, holding wire 377 is electrically connected on wire pad 360 and pin 355 respectively.Earth connection 373,375,379,381 be electrically connected on respectively on the coplane wire pad 370 position 343,345,347,349 and with the corresponding wire wire pad 330 in its position on the position.371,383 of earth connections be electrically connected on respectively on the coplane wire pad 370 position 341,349 and with the corresponding pin 353,357 in its position.
In assembling structure 300, compare with the known assembling structure 100 among Fig. 1, increased by 4 staggered earth connection 373-381 around holding wire 377.These 4 increases and staggered earth connection 373-381 are disposed near the holding wire, and the other end of these 4 earth connection 373-381 is connected on the wire wire pad, simultaneously, the other end of these earth connections 373-381 is configured in the edge of wire wire pad 330 as far as possible.Therefore, in this assembling structure 300, the path of signal circuit is shortened, and the parasitic loop inductance that is produced between holding wire 377 and earth connection 371-375,379-383 reduces.And the signal trajectory in this assembling structure 300 above chip 310 can tieline shape wire pad 330.Therefore, the parasitic capacitance between holding wire 377 and earth connection 371-375,379-383 can be coupled at signal trajectory and 330 of wire wire pads, and reduced.
For the arranged distribution that makes the grounded metal line is made more perfect planning, the present invention considers the grounded metal line is arranged with interlace mode.Therefore, the present invention proposes a preferred embodiment in addition, and shown in Fig. 4 A and Fig. 4 B, it is respectively that a kind of high-frequency integrated circuit multi-in-line wire bond structure of the preferred embodiment situation B according to the present invention is overlooked and the 3D schematic diagram.This assembling structure 400 mainly has chip 410, substrate 420 and chip mat 430.Its chips 410 is affixed on the substrate 420 with chip mat 430 pads, and chip 410, chip mat 430 and substrate 420 places of coinciding also form the shape of ladder, and on the chip 410 with respect to being provided with wire pad 460 around the chip mat 430 opposite side surfaces and around the coplane wire pad 470 of wire pad 460, simultaneously chip mat 430 in the face of and the whole circle part that is exposed to chip 410 outsides form the wire wire pad.Simultaneously, substrate 420 in the face of chip mat 430 and whole circle be exposed to chip mat 430 outsides around, and be provided with a plurality of pins 453,455,457 with respect to the position of wire pad 460 and coplane wire pad 470.
The signal transmission that chip 410 and substrate are 420 is by being electrically connected with metal wire 471-483.Wherein, among the metal wire 471-483, metal wire 477 is a holding wire, and metal wire 471-475,479-483 are earth connection.And these earth connections 471-475,479-483 are arranged at around the holding wire 477.In this preferred embodiment, coplane wire pad 470 is the character cut in bas-relief shape, and coplane wire pad 470 can equidistantly be divided into following six position 441-451, collocation wire pad 460, the routing that forms two row combinations altogether is provided with the position, one row are near wire wire pad 430, and another row are then away from wire wire pad 430.
Wherein, holding wire 477 is electrically connected on wire pad 460 and pin 455 respectively.Earth connection 473,475,479,481 be electrically connected on respectively on the coplane wire pad 470 position 443,445,447,449 and with the corresponding wire wire pad 430 in its position on the position.Earth connection 473,475,479,481 except and 447 of holding wires present be staggered, 473,475 of earth connections also present right-angled intersection to be arranged, 479,481 of earth connections also are.471,483 of earth connections be electrically connected on respectively on the coplane wire pad 370 position 441,449 and with the corresponding pin 453,457 in its position.
In this assembling structure 400, chip 410 uses 2 staggered earth connections 471,483 to be electrically connected on pin 453,457 respectively, and uses 4 crosses earth connection 473,475,479,481 wire bond structures to chip mat that interlock.
A compares with situation, because the holding wire initiating terminal is moved on to than the first row center near the wire wire pad by the secondary series center away from the wire wire pad among the situation B, the length of holding wire shortens more, therefore more can reduce the stray inductance between the loop.And have 4 staggered earth connections that increase than known technology to center on around the holding wire equally, and the earth connection of these 4 increases also provides less signal circuit path.
The present invention also proposes a preferred embodiment in addition, and shown in Fig. 5 A and Fig. 5 B, its a kind of high-frequency integrated circuit multi-in-line wire bond structure that is respectively the preferred embodiment situation C according to the present invention is overlooked and the 3D schematic diagram.Assembling structure 500 is similar with the assembling structure 400 among the situation B.Assembling structure 500 has chip 510, substrate 520 and chip mat 530.Its chips 510 is affixed on the substrate 520 with chip mat 530 pads, and chip 510, chip mat 530 and substrate 520 places of coinciding form the shape of ladder, and on the chip 510 with respect to being provided with wire pad 560 around the chip mat 530 opposite side surfaces and around the coplane wire pad 570 of wire pad 560, simultaneously chip mat 530 in the face of and the whole circle part that is exposed to chip 510 outsides form the wire wire pad.Simultaneously, substrate 520 in the face of chip mat 430 and whole circle be exposed to chip mat 530 outsides around, and be provided with a plurality of pins 553,555,557 with respect to the position of wire pad 460 and coplane wire pad 570.
The signal transmission that chip 510 and substrate are 520 only is electrically connected by metal wire 573-581.Wherein, among the metal wire 573-581, metal wire 577 is a holding wire, and metal wire 573,575,579,581 is an earth connection.And these earth connections 573,575,579,581 are arranged at around the holding wire 577.In this preferred embodiment, the shape of the coplane wire pad 470 among coplane wire pad 570 and the situation B is identical, be the character cut in bas-relief shape, coplane wire pad 570 can equidistantly be divided into following four position 543-549, collocation wire pad 560, the routing that forms two row combinations is provided with the position, and row are near wire wire pad 530, and another row are then away from wire wire pad 530.
Wherein, holding wire 577 is electrically connected on wire pad 560 and pin 555 respectively.Earth connection 573,581 be electrically connected on respectively on the coplane wire pad 570 position 543,549 and with the corresponding wire wire pad 530 in its position on the position.Earth connection 575,579 is electrically connected on respectively and the corresponding pin 553,557 in its position.
Assembling structure 500 is derived by situation B, wherein coplane wire pad 570 concave shape bases are removed near the earth connection of recess two side positions, only stay coplane wire pad 570 concave shape bases and be provided with earth connection near recess center 545,547, and B compares with situation, and the earth connection 575,579 on the position 545,547 changes the difference routing into to pin 553,557.
Because these assembling structure 500 required routing numbers are less among the situation C, so expending of structure come lowly than situation A and B, and the advantage of this structure is also many than situation A and B.But the electrical characteristic of this assembling structure 500 does not have therefore decline too many, and its reason is that the earth connection 573,575,579,581 that is connected to pin 553-557 and chip mat 530 still is centered around around the holding wire 577.
In all preferred embodiment situations of the present invention, be connected to chip mat with the whole inductance of obvious minimizing by increasing ground wire, slightly increase whole electric capacity.Therefore, return loss of the present invention all is better than known technology.Especially with situation B and C, whole inductance is reduced and the impedance matching situation is come well than situation A.Its reason is suitably to be provided with earth connection around holding wire.Also therefore, in the preferred embodiment of three kinds of situations of the present invention,, also can cause its magnetic interference lower owing to earth connection provides shielding around holding wire.
Can clearlyer learn preferred embodiment of the present invention and the known technology difference on effect by experimental data.Between chip and substrate, with in the above-mentioned structure that connects wire pad, coplane wire pad and chip mat, pin with metal wire (being the assembling structure among Fig. 1,3A, 3B, 4A, 4B, 5A, the 5B), loop between metal wire can be represented with equivalent circuit diagram, see also figure six, this figure is the equivalent circuit diagram between the assembling structure routing.
By each inductance, electric capacity and resistance among the figure six are quantized, can know and learn its good and bad place.Please refer to table 1, table 1 is for listing under each situation the equivalence value of each inductance, electric capacity and resistance in Fig. 6 equivalent electric circuit.Known technology has maximum induction value and position of minimum capacitance as can be known from Table 1, so those skilled in the art as can be known, and the impedance matching situation of known technology worst.In the table 1, can obviously observe out among preferred embodiment situation A of the present invention, B, the C, all equivalent inductances descend significantly, and all equivalent capacitys slightly increase.Therefore return loss good than known technology all.Especially situation C and D, B compares with situation, and except equivalent inductance obviously descended, impedance matching improved once more.
Please refer to table 2, what table 2 illustrated is known technology and return loss and the insertion loss of preferred embodiment of the present invention under the different operating frequency.Be familiar with those skilled in the art and can be learnt by table 2, only under the operating frequency of 2.5GHz, its return loss and insertion loss performance can be said to be normal to known technology.But when the known technology operating frequency surpasses 2.5GHz, the situation that return loss is too small, insertion loss is excessive appears.And in each situation of preferred embodiment of the present invention, the operating frequency that return loss and insertion loss value are acted normally may extend to 5GHz even 5GHz above (return loss be less than-15dB just calculate enough big).The operating frequency that the return loss of situation B and C and insertion loss value are acted normally also may extend to 10GHz, and (return loss is less than-15dB, insertion loss is greater than-0.3dB is just enough), the return loss and the insertion loss of known technology then be about respectively-7dB and-1.2dB about.In comparison, situation C has respectively improved 10dB and 1dB than known technology at return loss with D aspect insertion loss.The curve chart that table 2 contrasted illustrates at Fig. 7 A and Fig. 7 B.What Fig. 7 A illustrated is the curve chart of return loss-operating frequency.What figure seven B illustrated is the curve chart of insertion loss-operating frequency.Among Fig. 7 A, can know and understand all big than known technology of preferred embodiment situation A of the present invention, its return loss of B, C.Among Fig. 7 B, situation A, B, its insertion loss of C be little than known technology obviously, and the big more gap of operating frequency is obvious more.
At last, preferred embodiment of the present invention except in return loss, insertion loss and impedance matching than known technology optimization, also between the metal routing, can have lower magnetic interference.Please consult Fig. 8 A, 8B, 8C and 8D simultaneously, it illustrates respectively is field of magnetic forece distribution map between known technology and preferred embodiment situation A of the present invention, B, C metal wire.By among Fig. 8 A, 8B, 8C and the 8D as can be known, the field of magnetic forece distribution area between preferred embodiment situation A of the present invention, B, C metal wire is little than known technology obviously, therefore, the present invention has really and has less magnetic force than known technology and disturb.
Comprehensively above-mentioned, the present invention is provided with earth connection by increasing between holding wire, and with the staggered pattern layout, therefore return loss, insertion loss and the impedance matching that has be than known technology optimization, and has less magnetic force and disturb.
In sum; though the present invention discloses as above with aforesaid preferred embodiment; yet be not in order to limit the present invention; protection scope of the present invention should be as the criterion with the scope that claims define; those skilled in the art; a little change of being done without departing from the spirit and scope of the present invention all should be included within protection scope of the present invention.
The equivalence value of each element among Fig. 6 Approximation L total≈C total
Known technology C 1＝0.114pF，C 3＝0.257pF，C 5＝0.036pF， L 2＝1.325nH，L 4＝0.385nH，R 2＝0.400 Ω， R 3＝13.239KΩ C total≈0.407pF， L total≈1.710nH
Situation A C 1＝0.122pF，C 3＝0.240pF，C 5＝0.078pF， L 2＝0.919nH，L 4＝0.551nH，R 2＝0.445 Ω. R 3＝10.213KΩ C total≈0.440pF， L total≈1.470nH
Situation B C 1＝0.115pF，C 3＝0.245pF，C 5＝0.077pF， L 2＝0.757nH，L 4＝0.529nH，R 2＝0.333 Ω， R 3＝17.998KΩ C total≈0.437pF， L total≈1.286nH
Situation C C 1＝0.115pF，C 3＝0.243pF，C 5＝0.076pF， L 2＝0.788nH，L 4＝0.524nH，R 2＝0.372 Ω， R 3＝14.614KΩ C total≈0.434pF， L total≈1.312nH
Table 1
2.5GHz 5GHz 10GHz
Return loss (dB) Insertion loss (dB) Return loss (dB) Insertion loss (dB) Return loss (dB) Insertion loss (dB)
Known technology -19.37 -0.12 -13.42 -0.32 -6.86 -1.23
Situation A One 24.71 -0.08 -18.80 -0.16 -12.29 -0.45
Situation B -30.10 -0.07 -24.17 -0.12 -17.01 -0.26
Situation C -28.79 -0.07 -22.85 -0.12 -15.78 -0.29
Table 2

Claims (12)

1. a high-frequency integrated circuit multi-in-line wire bond structure is characterized in that, comprising:
First electronic building brick, it comprises:
The routing face;
First loading end is with respect to the opposite side surface of described routing face;
Wire pad is positioned at described routing face surrounding;
The coplane wire pad is positioned on the described routing face and is surrounded on described wire pad;
Second electronic building brick, it comprises:
Second loading end pastes with described first loading end is mutually adjacent, and the whole circle of described second loading end peripheral part is exposed and be surrounded on around described first loading end;
A plurality of pins are positioned at around described second loading end and corresponding to described wire pad and described coplane wire pad; And
Many metal line are divided into holding wire and many earth connections at least according to the signal that is transmitted;
Wherein, one end of described holding wire is electrically connected on described wire pad, the other end of described holding wire be electrically connected in the described pin with described wire pad corresponding one of them, and an end of described earth connection is electrically connected on described coplane wire pad, and with respect to an end of described earth connection, the described earth connection other end then is electrically connected on described second loading end tightly around the wire wire pad and the described pin of first loading end.
2. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 1, it is characterized in that, described holding wire and described earth connection are divided into first row and the secondary series at least according to the position that it lays respectively on described wire pad and the described coplane wire pad, described first row are near described wire wire pad, and described secondary series then is listed as away from described wire wire pad than first.
3. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 2 is characterized in that, the described first described earth connection that lists is electrically connected on described wire wire pad.
4. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 1 is characterized in that described holding wire and described earth connection are for being staggered.
5. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 1 is characterized in that, described coplane wire pad is to fall into jagged shape in the type base, and described recess is back in described wire wire pad, and described notch ring is around described wire pad.
6. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 5 is characterized in that, described coplane wire pad elevated regions equidistantly is provided with two earth connections.
7. a high-frequency integrated circuit multi-in-line wire bond structure is characterized in that, comprising:
First electronic building brick, it comprises:
The routing face;
First loading end is with respect to the opposite side surface of described routing face;
Wire pad is positioned at described routing face surrounding;
The coplane wire pad is positioned on the described routing face and is surrounded on described wire pad;
Chip mat, it comprises:
Second loading end pastes with described first loading end is mutually adjacent, and the exposed and part that be surrounded on around described first loading end of whole circle is the wire wire pad around described second loading end;
The 3rd loading end is with respect to the another side of described second loading end;
Second electronic building brick, it comprises:
The 4th loading end pastes with described the 3rd loading end is mutually adjacent, and the whole circle of described the 4th loading end peripheral part is exposed and be surrounded on around described first loading end;
A plurality of pins are positioned at around described the 4th loading end and corresponding to described wire pad and described coplane wire pad; And
Many metal line are divided into holding wire and many earth connections at least according to the signal that is transmitted;
Wherein, described holding wire be electrically connected in described wire pad and the described pin with described wire pad corresponding one of them, described earth connection is electrically connected on described coplane wire pad and reaches and relative described wire wire pad and the described pin in described earth connection position on described coplane wire pad, described holding wire and described earth connection are divided into first row and the secondary series at least according to the position that it lays respectively on described wire pad and the described coplane wire pad, described first row are near described wire wire pad, described secondary series then is listed as away from described wire wire pad than first, and the described first described earth connection that lists is electrically connected on described wire wire pad.
8. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 7 is characterized in that described holding wire and described earth connection are for being staggered.
9. a high-frequency integrated circuit is arranged wire bond structure more, it is characterized in that, comprising:
The wire pad of a high-frequency signal is positioned at die terminals;
The wire pad of a ground connection is positioned at die terminals, and the wire pad of wherein said ground connection surrounds the wire pad of described high-frequency signal;
A ground plane is positioned at the die terminals below;
The routing pin of a high-frequency signal is positioned at the packaging body end;
The routing pin of a plurality of ground connection is positioned at the packaging body end;
The routing of a high-frequency signal, the routing of wherein said high-frequency signal are connected to the routing pin of described high-frequency signal from the wire pad of described high-frequency signal; And
The routing of a plurality of ground connection, the routing of wherein said ground connection are connected to the routing pin of described ground plane and described a plurality of ground connection respectively from the wire pad of described ground connection;
Wherein, the routing of described ground connection surrounds the routing of described high-frequency signal.
10. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 9 is characterized in that, the quantity of routing that is connected to the described ground connection of described ground plane from the wire pad of described ground connection is two.
11. high-frequency integrated circuit multi-in-line wire bond structure as claimed in claim 9 is characterized in that, the quantity of routing that is connected to the described ground connection of described ground plane from the wire pad of described ground connection is four.
12. a high-frequency integrated circuit multi-in-line routing method is characterized in that, comprises that step is as follows:
Earlier holding wire is originated in wire pad in positive routing mode and block in the pin with described wire pad corresponding one of them;
Again the partial earthing line is originated in positive routing mode and belong to first column position on the coplane wire pad, and block the wire wire pad relative with its position;
At last, the partial earthing line originated on the described coplane wire pad in positive routing mode belong to the secondary series position, and block pin relative and wire wire pad with its position.
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US11805686B2 (en) 2020-03-27 2023-10-31 Boe Technology Group Co., Ltd. Display panel and display device

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