CN100334551C

CN100334551C - Booting method for quick-speed activation of computer system

Info

Publication number: CN100334551C
Application number: CNB2005100804013A
Authority: CN
Inventors: 何宽瑞
Original assignee: Via Technologies Inc
Current assignee: Via Technologies Inc
Priority date: 2005-07-01
Filing date: 2005-07-01
Publication date: 2007-08-29
Anticipated expiration: 2025-07-01
Also published as: CN1702620A

Abstract

The present invention relates to a method for the start-up of a computer system, particularly relates to a start-up method for the fast activation of a computer system, which comprises the following implementation steps: after the system activates the power supply, when a central processing unit accesses a basic input-output system in a read only memory and executes the start-up self-test program, a cache memory is first enabled, and through the assist of the cache memory, the initialization actions of a chip set and a system memory can be fast executed; after the initialization action of the system memory, the cache memory is disabled, and the system is restored to the normal state; subsequently, the initialization actions of the cache memory and follow-up peripherals are executed so as to finish the start-up program, and thus, the goal of fast start-up under the condition of system stability can be ensured.

Description

Booting method for quick-speed activation of computer

Technical field

The present invention relates to a kind of starting-up method of computer system, relate in particular to a kind of booting method for quick-speed activation of computer, by enabling high-speed cache in advance, significantly shorten the required time of initialization chipset and Installed System Memory, and can effectively reach the purpose of computer system quick turn-on.

Background technology

In the information age of seizing every minute and second, the execution speed of computer equipment is the pointer that the consumer chooses, and also is one of price standard of selling price simultaneously, and therefore, information dealer is devoted to the lifting that computing machine is carried out speed invariably.Along with computer equipment maneuverability demand in the use, general user often wishes after one presses power key, computer equipment can be finished start process apace, and can just enter into operating system quickly, can begin the operational computations machine and carry out its required operation for the user.Therefore, how speed-up computation machine system boot speed has been many at present technology of being expected.

The primary clustering configuration mode of general computer system as shown in Figure 1.General computer system 10 consists predominantly of the chipset 15 that a CPU (central processing unit) (CPU) 11, includes north bridge chips 151 and South Bridge chip 153.Wherein, north bridge chips 151 connects CPU11 and South Bridge chip 153, and other is connected with an Installed System Memory 17 and AGP (AGP) 191.153 of South Bridge chips connect a ROM (read-only memory) (ROM) 13, Winchester disk drive 194 and other peripheral unit, as CD-ROM drive 195, audio device 196, universal serial bus 192 and input-output unit 193 etc.And in the general computer system 10, its CPU11 then still can connect at least one high-speed cache (cache) 18, and required data in the time of can be in order to temporary CPU11 computing are to improve the speed of System Operation.

Because the total system member is various, function is complicated, computer system 10 can correctly be operated, must utilize CPU11 to carry out a series of hardware detection, test and initialized program, be called Basic Input or Output System (BIOS) (Basic Input Output System and carry out the required program code of these programs; BIOS) 133, cause system to produce mistake for preventing to revise improperly or change, even can't activate, generally it is stored in the ROM (read-only memory) 13.

After system power supply activated, what at first be performed was start selftest (the Power On Self Test among the BIOS133; POST) program.This POST routine package contains a series of subroutine, each subroutine is docile and obedient preface and is carried out, respectively its corresponding computer hardware is tested and initialize routine, after treating that each computer hardware all is in the normal operation state, computer system 10 reloads an operating system, so that the user to be provided required operation-interface.

Because ROM (read-only memory) generally is connected in South Bridge chip 153 with isa bus 131 or lpc bus, under operable situation without any Installed System Memory, CPU11 is when carrying out the POST program, must read the BIOS133 data that are stored in this ROM (read-only memory) 13 back and forth by this isa bus 131 or lpc bus stroke by stroke, so that relevant computer hardware is tested and initialize routine, and the transfer rate of isa bus 131 can only reach 8.33Hz at the soonest, even if use lpc bus also can only rise to 33MHz, with respect to the operation rate of system now is too slow really, therefore, computer system 10 just must expend a lot of times and count reportedly defeated on isa bus 131 in start process.

See also Fig. 2, the start process flow diagram of known computer system; As shown in the figure, its main implementation step includes: the power supply 201 of being opened computer system by the user; After system power supply activates, go access by CPU again and carry out POST program 202 in the BIOS; The initialization chipset 203 immediately,, north bridge chips and South Bridge chip carried out initialized action that is; Then CPU detects Installed System Memory on this computer system by being electrically connected of this north bridge chips again, and carries out initialized action 204; And then this CPU just begins high-speed cache is carried out initialized program 205.

After finishing to this high-speed cache initialization, CPU just can be by Installed System Memory and high-speed cache auxiliary, and other peripherals are carried out initialized action 206, and as: AGP, universal serial bus, input-output unit, Winchester disk drive, CD-ROM drive and audio device or the like; And load an operating system at last and finish boot program 207.

Learn by above-mentioned known technology, this CPU is when carrying out initialization to this chipset and this Installed System Memory, this CPU only can read in the ROM (read-only memory) related data required in the BIOS back and forth by this isa bus stroke by stroke, thereby the initialization operation and the required time of system boot of prolongation computer hardware, in the society that seizes every minute and second now, real is very important time waste.

Summary of the invention

For this reason, how at the existing shortcoming of above-mentioned known computer system power-on work flow, to design a kind of starting-up method of computer system, relate in particular to a kind of booting method for quick-speed activation of computer, by enabling (enable) high-speed cache, make when initialization chipset and Installed System Memory, CPU can directly read desired data and deposit in the high-speed cache from ROM (read-only memory), at any time read for CPU, and then speed-up computation machine system boot speed, this is invention emphasis of the present invention.

Fundamental purpose of the present invention, be to provide a kind of booting method for quick-speed activation of computer, it mainly is before chipset and internal memory initialization, earlier with cache enabling, make CPU when chipset and Installed System Memory are carried out initialization, can obtain the auxiliary of high-speed cache, and then reach the purpose of speed-up computation machine system boot.

Secondary objective of the present invention, be to provide a kind of booting method for quick-speed activation of computer, it mainly is by with cache enabling, the desired data that makes CPU can will read in the BIOS is stored in the high-speed cache, and needn't be repeatedly read data in the BIOS by isa bus, and can reduce time of data transmission, and then shorten the spent time of computer booting.

Another purpose of the present invention, be to provide a kind of booting method for quick-speed activation of computer, it mainly is after finishing chipset and Installed System Memory, with the high-speed cache forbidden energy, carry out the initialized action of high-speed cache again, can make system return general normal boot-strap program, in case locking system makes a mistake.

For reaching above-mentioned purpose, the invention provides a kind of booting method for quick-speed activation of computer, wherein this computer system includes ROM (read-only memory) and a plurality of peripherals that a CPU (central processing unit), a high-speed cache, a chipset, an Installed System Memory, include Basic Input or Output System (BIOS), and the main implementation step of this starting-up method includes: power-on; Enable (enable) this high-speed cache; Carry out the initialization action of this chipset; Carry out the initialization action of this Installed System Memory of initialization; This high-speed cache of forbidden energy (disable); Carry out the initialization action of this high-speed cache; Carry out the initialization action of this peripherals; And loading one operating system.

Description of drawings

Fig. 1: the primary clustering block schematic diagram that is a computer system;

Fig. 2: be the start process flow diagram of the computer system of prior art;

Fig. 3: be the computer system power-on operation process chart of a preferred embodiment of the present invention; And

Fig. 4: be the process flow diagram of a preferred embodiment of the present invention initialization system internal memory.

Wherein, Reference numeral:

10 computer systems, 11 CPU

13 BIOS, 131 isa bus lines

15 chipsets, 151 north bridge chips

153 South Bridge chips, 17 Installed System Memories

18 high-speed caches, 191 AGP

192 universal serial bus, 193 input-output units

194 Winchester disk drive, 195 CD-ROM drives

196 audio devices

Embodiment

For making those skilled in the art further understanding and understanding be arranged to feature of the present invention, structure, method and the effect reached, existing with preferred embodiment and cooperate detailed explanation, be described as follows:

At first, see also Fig. 3, be the computer system power-on operation process chart of a preferred embodiment of the present invention; As shown in the figure, when the user opens the power switch 301 of a computer system, after the stable supply of electric current and voltage, it continues and the in-cycle work program of coming is to be gone access and carried out start selftest (POST) program 302 in the Basic Input or Output System (BIOS) (BIOS) that is stored in the ROM (read-only memory) (ROM) by CPU (central processing unit) (CPU).Wherein, this POST routine package contains a plurality of subroutines, and in the present invention, what it was at first carried out is that a high-speed cache (cache) is enabled (step 303), makes this high-speed cache be brought into play the function of its quick temporal data.

After step 303, CPU just can begin chipset is carried out initialization action 304 under high-speed cache auxiliary; After finishing this chipset initialization action, immediately Installed System Memory is carried out initialized program 305.So far, this computer system just can begin to use Installed System Memory, and its exercisable memory space significantly increases, and the execution speed that can benefit its follow-up instructions.

And then, the starting-up method of present embodiment is to carry out a step 306 with this high-speed cache forbidden energy, so that computer system revert to due state in the general boot program, can prevent that locking system produces unpredictable mistake; Afterwards, again this high-speed cache is carried out initialized action 307.So far, this CPU just can carry out the initialization action 308 of follow-up peripherals fast by the auxiliary of internal memory and high-speed cache, make this computer system be accomplished the test of computer hardware, and in the end an operating system is loaded 309, and finish the in-cycle work of computer system.

On the job design of general computer system, when CPU desires reading of data, at first can arrive in the high-speed cache and search, if these data not in the high-speed cache then can arrive in the Installed System Memory and seek; If in Installed System Memory, still can not find these data, at this moment just can arrive in the Storage Media (as hard disk, ROM (read-only memory) etc.) that this data store the place, address and read required data.So can be learnt by above-mentioned, after step 303 was with cache enabling, CPU just can obtain the auxiliary of this high-speed cache when this chipset of initialization and this internal memory.

When CPU arrives the ROM (read-only memory) reading of data, the data that read can be stored in the high-speed cache in the lump together with several follow-up data of these data.So, CPU is when carrying out the initialization action of chipset and Installed System Memory, can directly in high-speed cache, read required data, and needn't repeatedly go to seek in the ROM (read-only memory) required data by isa bus, therefore can effectively reduce data transmission institute must consumed time, and then the speed of speed-up computation machine system boot significantly.

Secondly, see also Fig. 4, be the process flow diagram of a preferred embodiment of the present invention initialization system internal memory.Employed Installed System Memory is random access memory (Random Access Memory in the general computer system; RAM), for example: DRAM (Dynamic Random Access Memory) (Dynamic RAM; DRAM), static random access memory (Static RAM; SRAM), SDRAM (Synchronous dynamic random access memory) (Synchronous DRAM; SDRAM), Double Date Rate (Double Date Rate; The random access memory of random access memory DDR), second generation Double Date Rate (DDR II) etc., and the random access memory of other type.

When the Installed System Memory of computer system is employing Double Date Rate random access memory (as DDR-SDRAM) or second generation Double Date Rate random access memory (as DDR II-SDRAM), then the initialization action of Installed System Memory also need comprise implementation step as shown in the figure, and it consists predominantly of: the hardware information 351 of detection system internal memory; The correlation parameter 353 of initialization system internal memory; And carry out bi-directional data excitation signal (Bi-directional data strobe; DQS) adjustment 355 that input and output postpone.

Wherein, set related parameter values and adjust the stage that the DQS input and output postpone at Installed System Memory, CPU must read the mass data that leaves in the BIOS, even must carry out the relative program that is stored among the BIOS, computing by this program is in the hope of the length of delay of input and the output of DQS, and then it is adjusted to required value.Under this situation, if also be to use traditional start flow process, to make CPU carry out between operational stage must be back and forth by bus at a slow speed such as isa bus, data or an instruction read data or program code among the BIOS, its spent time will be considerable.

Therefore, if adopt starting-up method of the present invention, this CPU just can effectively obtain this high-speed cache when carrying out this computing auxiliary, makes the on time of computer system obviously shorten.Show that according to present test data starting-up method of the present invention is during carrying out chipset and Installed System Memory, its operation speed can improve about about 6 to 40 times by more traditional starting-up method, is a quantum jump of computer system power-on technology in fact.

In starting-up method of the present invention, the high-speed cache that it used may be selected to be first order high-speed cache (L1 cache), second level high-speed cache (L2 cache), third level high-speed cache (L3 cache) and knockdown one of them, all can reach the effect of quickening activating computer system.

In sum, the present invention relates to a kind of starting-up method of computer system as can be known, relate in particular to a kind of booting method for quick-speed activation of computer, by enabling high-speed cache in advance, significantly shorten the required time of initialization chipset and Installed System Memory, and can effectively reach the purpose of computer system quick turn-on.

Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.

Claims

1, a kind of booting method for quick-speed activation of computer, described computer system includes ROM (read-only memory) and a plurality of peripherals that a CPU (central processing unit), a high-speed cache, a chipset, an Installed System Memory, include Basic Input or Output System (BIOS), it is characterized in that the implementation step of described starting-up method includes:

Power-on;

Described CPU (central processing unit) reads and carries out the subroutine that one in the described Basic Input or Output System (BIOS) is used to enable described high-speed cache, enables described high-speed cache;

Described CPU (central processing unit) is down auxiliary described high-speed cache, carries out the initialization action of described chipset;

Described CPU (central processing unit) is down auxiliary described high-speed cache, carries out the initialization action of described Installed System Memory;

The described high-speed cache of forbidden energy;

Carry out the initialization action of described high-speed cache;

Carry out the initialization action of described peripherals; And

Load an operating system.

2, starting-up method as claimed in claim 1 is characterized in that: described high-speed cache be first order high-speed cache, second level high-speed cache, third level high-speed cache and knockdown one of them.

3, starting-up method as claimed in claim 1 is characterized in that: described chipset is to include a north bridge chips and a South Bridge chip.

4, starting-up method as claimed in claim 1 is characterized in that: described Installed System Memory is one of them of static random access memory, DRAM (Dynamic Random Access Memory), SDRAM (Synchronous dynamic random access memory), Double Date Rate random access memory, second generation Double Date Rate random access memory and other random access memory.

5, starting-up method as claimed in claim 1 is characterized in that, the step of described initialization system internal memory includes the following step:

Detect described Installed System Memory;

Set the correlation parameter of described Installed System Memory; And

Carry out the adjustment that the input and output of bi-directional data excitation signal postpone.