CH653823A5 - CIRCUIT ARRANGEMENT FOR DETERMINING THE RESONANCE FREQUENCY OF LOAD-DRIVEN INVERTERS WITH VIBRATING CIRCUIT. - Google Patents

Description

The invention relates to a circuit arrangement for determining the resonance frequency of load-controlled inverters with a load resonant circuit, a start pulse being provided for triggering the load resonant circuit.

The load resonant circuits of load-controlled inverters often have highly variable resonance frequencies during operation.

Capacitor groups can be switched on or off, or in the case of inductive heating devices, the inductance of the load changes depending on the quantity, condition and temperature of the material to be heated. In practice, this causes fluctuations in the resonance frequency of the load resonant circuit up to a ratio of 1:20.

If, however, the control electronics of the converter does not receive a predefined approximate resonance frequency, the converter tilts during the start attempts.

So far, it was therefore necessary to estimate the approximate resonance frequency from experience values in the case of widely differing loads and then enter them manually. This often required several attempts, which was very time-consuming and also did not preclude the risk of damage to the converter thyristors.

The object of the circuit arrangement according to the invention is therefore to avoid the disadvantages listed in order to be able to carry out a start attempt in which the resonant frequency of the converter is automatically determined in order to impress it on the converter electronics as a default value for the successful subsequent start attempts of the converter.

The invention is characterized in that the sinusoidal voltage applied to the load can be connected to a discriminator for conversion into an in-phase square-wave voltage and this square-wave voltage can be converted into a voltage ramp by means of an integrator, which can either be connected to a sample-hold circuit, which is the am End of the positive half-wave of the square-wave voltage occurring triangular stores, or a peak detector can be fed, which stores the maximum value of the triangular voltage ramp, the stored triangular voltage or the maximum value of the triangular voltage ramp of the reverse

Proportionality corresponds to the natural frequency of the load resonant circuit.

This first automatic start attempt makes it possible to automatically determine the default value of the resonant frequency of the converter, which means that it can also be operated by untrained personnel. This enables the load-controlled converter to be started quickly and reliably, regardless of the properties of the load. The use of a peak value detector for storing the maximum value of the triangular voltage ramp is favorable, since these are commercially available as integrated or as hybrid modules, which reduces the number of solder joints on the printed circuit board, can advantageously reduce the assembly costs and increases reliability.

According to one embodiment of the invention, the triangular voltage to be stored or the maximum value of the triangular voltage ramp can be stored indefinitely by means of a digitally operating memory circuit.

All analog sample-hold circuits have a slow discharge of the storage capacitor, which causes the voltage to drop and the preset frequency value to be incorrect. Digital sample hold memories avoid these problems by converting the analog value into a digital signal, which can be stored for any length of time and therefore advantageously always stores the exact preset value of the frequency.

A further development of the invention is that the digitally operating memory circuit consists of a successively approximating analog-to-digital converter which receives the conversion pulse for conversion after the end of the positive half-wave. Analog-digital or digital-analog converters, which are successively approximating, are available as finished hybrid modules or as integrated circuits, which enables a particularly component-saving design. The increased reliability and monotonous conversion of these analog-digital converters prevent discontinuities in the converter characteristic.

The invention is explained in more detail in FIGS. 1 and 2 using the basic circuit diagram and in FIG. 3 by means of the time diagram. In Fig. 1, the voltage of the load of the converter - a -, optionally galvanically isolated and transformed via a voltage converter, is applied to the input of the discriminator -1 -. The discriminator -1 - switches each time the zero crossing - 0 - of the sinusoidal input voltage - a - and converts it into a phase-parallel square wave voltage - b - which can be connected to the integrator - 2 - and is converted into a triangular ramp - c - . The voltage value of the triangular ramp - c - at the moment of zero crossing - 0 - is stored either as in FIG. 1 by means of a sample hold circuit - 3 -, or in FIG. 2 by means of a peak value detector - 5 -. The sample hold circuit - 3 - can either charge the internal storage capacitor during the positive square flank - b - and store the voltage at the moment of zero crossing - 0 - or can be controlled by a short pulse from the high-low flank of the square wave voltage - b - .

The digital memory circuit - 4 - consists of an analog-to-digital converter, which converts the analog voltage into a digital value. The digital value can be easily saved over any period of time and can be converted back into an analog value. A simplification of the digitally operating memory circuit is possible by means of a successive analog-to-digital converter. Here the digital values of a counter are applied to the digital inputs of a digital-analog converter, whose analog outputs are compared by a comparator. A clock generator increases the value of the counter until the voltage to be stored - d - with the analog output voltage - e - of the digital-to-analog converter

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agrees. The conversion cycle is then ended and the output voltage of the digital-analog converter - e - can be stored for as long as desired and corresponds to the maximum value of the voltage to be stored - d - shortly after the zero crossing - 0 -. It is also possible to use the digital memory circuit

3,653,823

- 4 - with the sample hold circuit - 3 - or the peak value detector - 5 - to summarize. A prerequisite is a very rapid conversion during the ascent of the triangular ramp, so that the analog output voltage of the digital-to-analog converter 5 follows it practically without delay.

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1 sheet of drawings

Claims (3)

653 823 1. A circuit arrangement for determining the resonance frequency of load-controlled inverters with a load resonant circuit, a start pulse being provided for triggering the load resonant circuit, characterized in that the sinusoidal voltage applied to the load can be connected to a discriminator (1) for conversion into an in-phase square-wave voltage and this square-wave voltage can be converted into a voltage ramp by means of an integrator (2), which can either be connected to a sample-hold circuit (3) which stores the triangular voltage occurring at the end of the positive half-wave of the square-wave voltage, or can be supplied to a peak value detector (5) , which stores the maximum value of the triangular voltage ramp, the stored triangular voltage or the maximum value of the triangular voltage ramp corresponding to the inverse proportionality of the natural frequency of the load resonant circuit. 2. Circuit arrangement according to claim 1, characterized in that the triangular voltage to be stored or the maximum value of the triangular voltage ramp can be stored indefinitely by means of a digitally operating memory circuit (4). 2nd PATENT CLAIMS 3. Circuit arrangement according to claim 2, characterized in that the digitally operating memory circuit (4) consists of a successively approximating analog-to-digital converter which receives the conversion pulse for conversion after the end of the positive half-wave.