CH609195B - DEVICE FOR DIGITAL TIME DISPLAY. - Google Patents

DEVICE FOR DIGITAL TIME DISPLAY.

Info

Publication number
CH609195B
CH609195B CH934076A CH934076A CH609195B CH 609195 B CH609195 B CH 609195B CH 934076 A CH934076 A CH 934076A CH 934076 A CH934076 A CH 934076A CH 609195 B CH609195 B CH 609195B
Authority
CH
Switzerland
Prior art keywords
circuit
display
driving
frequency divider
time display
Prior art date
Application number
CH934076A
Other languages
German (de)
Other versions
CH609195GA3 (en
Inventor
Arihiko Ikeda
Original Assignee
Arihiko Ikeda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication of CH609195B publication Critical patent/CH609195B/en
Application filed by Arihiko Ikeda filed Critical Arihiko Ikeda
Priority to CH934076A priority Critical patent/CH609195GA3/en
Publication of CH609195GA3 publication Critical patent/CH609195GA3/en

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G3/00Producing timing pulses
    • G04G3/02Circuits for deriving low frequency timing pulses from pulses of higher frequency
    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G9/00Visual time or date indication means

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
  • Electric Clocks (AREA)

Abstract

The invention has a circuit arrangement for generating output signals for driving the display device (43, ... 48). The circuit arrangement comprises a quartz crystal (28), an oscillar circuit (29), and a frequency divider (30) having an output frequency of 10/36 Hz. Said frequency divider feeds a cascade of decimal counters (31, ... 34) and a counter (35) which counts up to 24. The decimal counters are connected via four coupled, bistable switches (36, ... 39) either directly or via a converting circuit (40) to a decoder circuit (41) for driving the display. The display, which has the hour as basic unit, is performed in the decimally subdivided centesimal system in the case of the direct circuit, but in the conventional sexagesimal system when the conversion circuit is used. <IMAGE>
CH934076A 1976-07-21 1976-07-21 Device for digital time display CH609195GA3 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CH934076A CH609195GA3 (en) 1976-07-21 1976-07-21 Device for digital time display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH934076A CH609195GA3 (en) 1976-07-21 1976-07-21 Device for digital time display

Publications (2)

Publication Number Publication Date
CH609195B true CH609195B (en)
CH609195GA3 CH609195GA3 (en) 1979-02-28

Family

ID=4350940

Family Applications (1)

Application Number Title Priority Date Filing Date
CH934076A CH609195GA3 (en) 1976-07-21 1976-07-21 Device for digital time display

Country Status (1)

Country Link
CH (1) CH609195GA3 (en)

Also Published As

Publication number Publication date
CH609195GA3 (en) 1979-02-28

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