CH601858A5 - - Google Patents
Info
- Publication number
- CH601858A5 CH601858A5 CH422676A CH422676A CH601858A5 CH 601858 A5 CH601858 A5 CH 601858A5 CH 422676 A CH422676 A CH 422676A CH 422676 A CH422676 A CH 422676A CH 601858 A5 CH601858 A5 CH 601858A5
- Authority
- CH
- Switzerland
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1072—Decentralised address translation, e.g. in distributed shared memory systems
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19752523686 DE2523686A1 (de) | 1975-05-28 | 1975-05-28 | Einrichtung und verfahren zur adressuebersetzung in einem multiprozessorsystem mit virtueller adressierung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH601858A5 true CH601858A5 (fr) | 1978-07-14 |
Family
ID=5947671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH422676A CH601858A5 (fr) | 1975-05-28 | 1976-04-05 |
Country Status (8)
| Country | Link |
|---|---|
| AT (1) | AT360254B (fr) |
| BE (1) | BE842320A (fr) |
| CH (1) | CH601858A5 (fr) |
| DE (1) | DE2523686A1 (fr) |
| FR (1) | FR2312820A1 (fr) |
| GB (1) | GB1567772A (fr) |
| IT (1) | IT1081081B (fr) |
| NL (1) | NL7605610A (fr) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4218741A (en) * | 1978-06-23 | 1980-08-19 | International Business Machines Corporation | Paging mechanism |
| US4170039A (en) * | 1978-07-17 | 1979-10-02 | International Business Machines Corporation | Virtual address translation speed up technique |
| US4710868A (en) * | 1984-06-29 | 1987-12-01 | International Business Machines Corporation | Interconnect scheme for shared memory local networks |
-
1975
- 1975-05-28 DE DE19752523686 patent/DE2523686A1/de not_active Withdrawn
-
1976
- 1976-04-05 CH CH422676A patent/CH601858A5/xx not_active IP Right Cessation
- 1976-05-06 AT AT332776A patent/AT360254B/de not_active IP Right Cessation
- 1976-05-20 GB GB2084076A patent/GB1567772A/en not_active Expired
- 1976-05-24 FR FR7615636A patent/FR2312820A1/fr active Granted
- 1976-05-25 NL NL7605610A patent/NL7605610A/xx not_active Application Discontinuation
- 1976-05-26 IT IT2366276A patent/IT1081081B/it active
- 1976-05-28 BE BE167414A patent/BE842320A/fr unknown
Also Published As
| Publication number | Publication date |
|---|---|
| AT360254B (de) | 1980-12-29 |
| GB1567772A (en) | 1980-05-21 |
| BE842320A (fr) | 1976-11-29 |
| IT1081081B (it) | 1985-05-16 |
| FR2312820A1 (fr) | 1976-12-24 |
| FR2312820B3 (fr) | 1979-02-16 |
| DE2523686A1 (de) | 1976-12-02 |
| ATA332776A (de) | 1980-05-15 |
| NL7605610A (nl) | 1976-11-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |