CH580364A5CH1390373ACH1390373ACH580364A5CH 580364 A5CH580364 A5CH 580364A5CH 1390373 ACH1390373 ACH 1390373ACH 1390373 ACH1390373 ACH 1390373ACH 580364 A5CH580364 A5CH 580364A5
Authority
CH
Switzerland
Application number
CH1390373A
Original Assignee
Tokyo Shibaura Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP9768272Aexternal-prioritypatent/JPS5333017B2/ja
Priority claimed from JP47112557Aexternal-prioritypatent/JPS4971859A/ja
Application filed by Tokyo Shibaura Electric CofiledCriticalTokyo Shibaura Electric Co
Publication of CH580364A5publicationCriticalpatent/CH580364A5/xx
H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
H03K19/096—Synchronous circuits, i.e. using clock signals
H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type