CH569393A5 - - Google Patents

Info

Publication number
CH569393A5
CH569393A5 CH1248173A CH1248173A CH569393A5 CH 569393 A5 CH569393 A5 CH 569393A5 CH 1248173 A CH1248173 A CH 1248173A CH 1248173 A CH1248173 A CH 1248173A CH 569393 A5 CH569393 A5 CH 569393A5
Authority
CH
Switzerland
Application number
CH1248173A
Original Assignee
Tokyo Shibaura Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP47086893A external-priority patent/JPS5242502B2/ja
Priority claimed from JP47086892A external-priority patent/JPS5242501B2/ja
Priority claimed from JP47086894A external-priority patent/JPS5246667B2/ja
Application filed by Tokyo Shibaura Electric Co filed Critical Tokyo Shibaura Electric Co
Publication of CH569393A5 publication Critical patent/CH569393A5/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
CH1248173A 1972-08-30 1973-08-30 CH569393A5 (fi)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP47086893A JPS5242502B2 (fi) 1972-08-30 1972-08-30
JP47086892A JPS5242501B2 (fi) 1972-08-30 1972-08-30
JP47086894A JPS5246667B2 (fi) 1972-08-30 1972-08-30

Publications (1)

Publication Number Publication Date
CH569393A5 true CH569393A5 (fi) 1975-11-14

Family

ID=27305289

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1248173A CH569393A5 (fi) 1972-08-30 1973-08-30

Country Status (6)

Country Link
US (1) US3829710A (fi)
CA (1) CA979080A (fi)
CH (1) CH569393A5 (fi)
FR (1) FR2198325B1 (fi)
GB (1) GB1418083A (fi)
IT (1) IT994173B (fi)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040015A (en) * 1974-04-16 1977-08-02 Hitachi, Ltd. Complementary mos logic circuit
US3999081A (en) * 1974-08-09 1976-12-21 Nippon Electric Company, Ltd. Clock-controlled gate circuit
US3986041A (en) * 1974-12-20 1976-10-12 International Business Machines Corporation CMOS digital circuits with resistive shunt feedback amplifier
US3986042A (en) * 1974-12-23 1976-10-12 Rockwell International Corporation CMOS Boolean logic mechanization
JPS52115637A (en) * 1976-03-24 1977-09-28 Sharp Corp Mos transistor circuit
US4103182A (en) * 1976-09-01 1978-07-25 Hewlett-Packard Company Programmable transfer gate array
US4169233A (en) * 1978-02-24 1979-09-25 Rockwell International Corporation High performance CMOS sense amplifier
US4318015A (en) * 1979-06-29 1982-03-02 Rca Corporation Level shift circuit
US4345170A (en) * 1980-08-18 1982-08-17 Bell Telephone Laboratories, Incorporated Clocked IGFET logic circuit
US4449224A (en) * 1980-12-29 1984-05-15 Eliyahou Harari Dynamic merged load logic (MLL) and merged load memory (MLM)
WO1983004149A1 (en) * 1982-05-10 1983-11-24 Western Electric Company, Inc. Cmos integrated circuit
GB2131242A (en) * 1982-11-10 1984-06-13 Philips Electronic Associated Logic circuit array
CA1204171A (en) * 1983-07-15 1986-05-06 Stephen K. Sunter Programmable logic array

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1127687A (en) * 1965-12-13 1968-09-18 Rca Corp Logic circuitry
FR2087271A5 (fi) * 1970-05-13 1971-12-31 Trt Telecom Radio Electr
US3720841A (en) * 1970-12-29 1973-03-13 Tokyo Shibaura Electric Co Logical circuit arrangement

Also Published As

Publication number Publication date
US3829710A (en) 1974-08-13
IT994173B (it) 1975-10-20
DE2343805A1 (de) 1974-03-21
AU5952773A (en) 1975-02-27
CA979080A (en) 1975-12-02
DE2343805B2 (de) 1976-01-15
FR2198325B1 (fi) 1976-11-19
FR2198325A1 (fi) 1974-03-29
GB1418083A (en) 1975-12-17

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Legal Events

Date Code Title Description
PL Patent ceased