CH549870A - SEMI-CONDUCTOR ARRANGEMENT AND METHOD FOR MANUFACTURING THEREOF. - Google Patents

SEMI-CONDUCTOR ARRANGEMENT AND METHOD FOR MANUFACTURING THEREOF.

Info

Publication number
CH549870A
CH549870A CH1450672A CH1450672A CH549870A CH 549870 A CH549870 A CH 549870A CH 1450672 A CH1450672 A CH 1450672A CH 1450672 A CH1450672 A CH 1450672A CH 549870 A CH549870 A CH 549870A
Authority
CH
Switzerland
Prior art keywords
semi
manufacturing
conductor arrangement
conductor
arrangement
Prior art date
Application number
CH1450672A
Other languages
German (de)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH549870A publication Critical patent/CH549870A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/40—Transit-time diodes, e.g. IMPATT or TRAPATT diodes 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N80/00—Bulk negative-resistance effect devices
    • H10N80/10—Gunn-effect devices
    • H10N80/107—Gunn diodes
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    • H01L2924/1025—Semiconducting materials
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    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
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    • H01L2924/12034—Varactor
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    • H01L2924/12—Passive devices, e.g. 2 terminal devices
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    • H01L2924/12036—PN diode
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    • H01L2924/30107—Inductance
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    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Wire Bonding (AREA)
  • Drying Of Semiconductors (AREA)
CH1450672A 1971-10-07 1972-10-04 SEMI-CONDUCTOR ARRANGEMENT AND METHOD FOR MANUFACTURING THEREOF. CH549870A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7113746A NL7113746A (en) 1971-10-07 1971-10-07

Publications (1)

Publication Number Publication Date
CH549870A true CH549870A (en) 1974-05-31

Family

ID=19814192

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1450672A CH549870A (en) 1971-10-07 1972-10-04 SEMI-CONDUCTOR ARRANGEMENT AND METHOD FOR MANUFACTURING THEREOF.

Country Status (9)

Country Link
JP (1) JPS5323990B2 (en)
AU (1) AU4728572A (en)
CA (1) CA973975A (en)
CH (1) CH549870A (en)
DE (1) DE2248089A1 (en)
FR (1) FR2156123B1 (en)
GB (1) GB1403239A (en)
IT (1) IT975162B (en)
NL (1) NL7113746A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5039473A (en) * 1973-08-10 1975-04-11
FR2420208A1 (en) * 1978-03-17 1979-10-12 Thomson Csf PROCESS FOR COLLECTIVE REALIZATION OF A SOURCE OF MILLIMETRIC WAVES OF PRE-ACCORDED TYPE AND SOURCE THUS REALIZED
DE2824027C2 (en) * 1978-06-01 1985-03-28 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Semiconductor component and method for its manufacture
DE102022004377A1 (en) * 2022-11-23 2024-05-23 Azur Space Solar Power Gmbh Diode arrangement
WO2025046878A1 (en) * 2023-08-31 2025-03-06 Nippon Telegraph And Telephone Corporation Reconfigurable intelligent surface module and method of manufacturing thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1333007A (en) * 1962-02-16 1963-07-19 Intermetall Method of manufacturing high frequency transistors and transistors conforming to those thus obtained
US3509428A (en) * 1967-10-18 1970-04-28 Hughes Aircraft Co Ion-implanted impatt diode

Also Published As

Publication number Publication date
NL7113746A (en) 1973-04-10
DE2248089A1 (en) 1973-04-12
IT975162B (en) 1974-07-20
GB1403239A (en) 1975-08-28
AU4728572A (en) 1974-04-11
CA973975A (en) 1975-09-02
JPS5323990B2 (en) 1978-07-18
JPS4846272A (en) 1973-07-02
FR2156123B1 (en) 1977-12-23
FR2156123A1 (en) 1973-05-25

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