CH537675A - Circuit arrangement for the mutual synchronization of oscillators provided in the exchanges of a time division multiplex telecommunications network - Google Patents
Circuit arrangement for the mutual synchronization of oscillators provided in the exchanges of a time division multiplex telecommunications networkInfo
- Publication number
- CH537675A CH537675A CH4072A CH4072A CH537675A CH 537675 A CH537675 A CH 537675A CH 4072 A CH4072 A CH 4072A CH 4072 A CH4072 A CH 4072A CH 537675 A CH537675 A CH 537675A
- Authority
- CH
- Switzerland
- Prior art keywords
- exchanges
- time division
- circuit arrangement
- telecommunications network
- division multiplex
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0676—Mutual
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19712100639 DE2100639C3 (en) | 1971-01-08 | 1971-01-08 | Circuit arrangement for the mutual synchronization of oscillators provided in the exchanges of a time division multiplex telecommunications network |
Publications (1)
Publication Number | Publication Date |
---|---|
CH537675A true CH537675A (en) | 1973-07-13 |
Family
ID=5795371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH4072A CH537675A (en) | 1971-01-08 | 1972-01-03 | Circuit arrangement for the mutual synchronization of oscillators provided in the exchanges of a time division multiplex telecommunications network |
Country Status (7)
Country | Link |
---|---|
AT (1) | AT322008B (en) |
BE (1) | BE777835R (en) |
CH (1) | CH537675A (en) |
DE (1) | DE2100639C3 (en) |
GB (1) | GB1331031A (en) |
IT (1) | IT968043B (en) |
LU (1) | LU64553A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT410154B (en) * | 1995-09-21 | 2003-02-25 | Frequentis Nachrichtentechnik Gmbh | Method of setting system cycle, and signal-switching system |
-
1971
- 1971-01-08 DE DE19712100639 patent/DE2100639C3/en not_active Expired
- 1971-12-30 IT IT3313071A patent/IT968043B/en active
-
1972
- 1972-01-03 CH CH4072A patent/CH537675A/en not_active IP Right Cessation
- 1972-01-04 AT AT4772A patent/AT322008B/en not_active IP Right Cessation
- 1972-01-05 GB GB40372A patent/GB1331031A/en not_active Expired
- 1972-01-06 LU LU64553A patent/LU64553A1/xx unknown
- 1972-01-07 BE BE777835A patent/BE777835R/en active
Also Published As
Publication number | Publication date |
---|---|
DE2100639C3 (en) | 1979-04-12 |
DE2100639B2 (en) | 1978-08-10 |
DE2100639A1 (en) | 1972-07-20 |
IT968043B (en) | 1974-03-20 |
GB1331031A (en) | 1973-09-19 |
LU64553A1 (en) | 1972-06-21 |
AT322008B (en) | 1975-04-25 |
BE777835R (en) | 1972-07-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |