CH537670A - Digitale Schaltungsanordnung zur Erzeugung eines in der Phase einem Eingangstaktsignal folgenden Ausgangstaktsignales - Google Patents
Digitale Schaltungsanordnung zur Erzeugung eines in der Phase einem Eingangstaktsignal folgenden AusgangstaktsignalesInfo
- Publication number
- CH537670A CH537670A CH578671A CH578671A CH537670A CH 537670 A CH537670 A CH 537670A CH 578671 A CH578671 A CH 578671A CH 578671 A CH578671 A CH 578671A CH 537670 A CH537670 A CH 537670A
- Authority
- CH
- Switzerland
- Prior art keywords
- clock signal
- generating
- phase
- circuit arrangement
- digital circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US3078870A | 1970-04-22 | 1970-04-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
CH537670A true CH537670A (de) | 1973-05-31 |
Family
ID=21856039
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH578671A CH537670A (de) | 1970-04-22 | 1971-04-21 | Digitale Schaltungsanordnung zur Erzeugung eines in der Phase einem Eingangstaktsignal folgenden Ausgangstaktsignales |
Country Status (4)
Country | Link |
---|---|
US (1) | US3633115A (de) |
CH (1) | CH537670A (de) |
DE (1) | DE2119091A1 (de) |
FR (1) | FR2131146A5 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3736516A (en) * | 1971-06-14 | 1973-05-29 | Lorain Prod Corp | Variable frequency pulse generating circuit |
FR2201595B1 (de) * | 1972-09-26 | 1977-07-29 | Cit Alcatel | |
DE2331601C2 (de) * | 1973-06-20 | 1975-08-21 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Schaltungsanordnung zur phasenregelung eines Taktsignals |
US3976919A (en) * | 1975-06-04 | 1976-08-24 | Borg-Warner Corporation | Phase sequence detector for three-phase AC power system |
DE2811636A1 (de) * | 1978-03-17 | 1979-09-20 | Tekade Felten & Guilleaume | Synchronisation eines lokalen oszillators mit einem referenzoszillator |
US4218771A (en) * | 1978-12-04 | 1980-08-19 | Rockwell International Corporation | Automatic clock positioning circuit for a digital data transmission system |
US4672639A (en) * | 1984-05-24 | 1987-06-09 | Kabushiki Kaisha Toshiba | Sampling clock pulse generator |
US4855683A (en) * | 1987-11-18 | 1989-08-08 | Bell Communications Research, Inc. | Digital phase locked loop with bounded jitter |
US5012437A (en) * | 1989-11-29 | 1991-04-30 | Sundstrand Corporation | Digitally controlled oscillator |
US5790891A (en) * | 1996-01-11 | 1998-08-04 | Galileo Technology Ltd. | Synchronizing unit having two registers serially connected to one clocked elements and a latch unit for alternately activating the registers in accordance to clock signals |
US20020085656A1 (en) * | 2000-08-30 | 2002-07-04 | Lee Sang-Hyun | Data recovery using data eye tracking |
US7642566B2 (en) * | 2006-06-12 | 2010-01-05 | Dsm Solutions, Inc. | Scalable process and structure of JFET for small and decreasing line widths |
US6973145B1 (en) | 2000-09-01 | 2005-12-06 | Ut-Battelle, Llc | Digital-data receiver synchronization method and apparatus |
US7372914B2 (en) * | 2000-11-16 | 2008-05-13 | Invensys Systems, Inc. | Control system methods and apparatus for inductive communication across an isolation barrier |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1179769A (fr) * | 1957-07-23 | 1959-05-28 | Cie Ind Des Telephones | Dispositif de correction de vitesse pour installations de transmission télégraphique rythmique |
US2980858A (en) * | 1959-12-07 | 1961-04-18 | Collins Radio Co | Digital synchronization circuit operating by inserting extra pulses into or delayingpulses from clock pulse train |
US3217267A (en) * | 1963-10-02 | 1965-11-09 | Ling Temco Vought Inc | Frequency synthesis using fractional division by digital techniques within a phase-locked loop |
US3337814A (en) * | 1966-08-23 | 1967-08-22 | Collins Radio Co | Phase comparator for use in frequency synthesizer phase locked loop |
-
1970
- 1970-04-22 US US30788A patent/US3633115A/en not_active Expired - Lifetime
-
1971
- 1971-04-20 DE DE19712119091 patent/DE2119091A1/de active Pending
- 1971-04-21 CH CH578671A patent/CH537670A/de not_active IP Right Cessation
- 1971-04-22 FR FR7114365A patent/FR2131146A5/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US3633115A (en) | 1972-01-04 |
FR2131146A5 (de) | 1972-11-10 |
DE2119091A1 (de) | 1971-11-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |