CH524202A - Display device for displaying the content of a shift register with N memory cells - Google Patents

Display device for displaying the content of a shift register with N memory cells

Info

Publication number
CH524202A
CH524202A CH298569A CH298569A CH524202A CH 524202 A CH524202 A CH 524202A CH 298569 A CH298569 A CH 298569A CH 298569 A CH298569 A CH 298569A CH 524202 A CH524202 A CH 524202A
Authority
CH
Switzerland
Prior art keywords
displaying
content
display device
memory cells
shift register
Prior art date
Application number
CH298569A
Other languages
German (de)
Inventor
Osugi Kinichiro
Suzuki Yoshiaki
Mori Tokio
Inamoto Toshiharu
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of CH524202A publication Critical patent/CH524202A/en

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Circuits Of Receivers In General (AREA)
CH298569A 1968-02-28 1969-02-27 Display device for displaying the content of a shift register with N memory cells CH524202A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1322868 1968-02-28

Publications (1)

Publication Number Publication Date
CH524202A true CH524202A (en) 1972-06-15

Family

ID=11827307

Family Applications (1)

Application Number Title Priority Date Filing Date
CH298569A CH524202A (en) 1968-02-28 1969-02-27 Display device for displaying the content of a shift register with N memory cells

Country Status (10)

Country Link
US (1) US3641561A (en)
BE (1) BE729045A (en)
CH (1) CH524202A (en)
DE (1) DE1908869A1 (en)
DK (1) DK122045B (en)
FR (1) FR2002782A1 (en)
GB (1) GB1244515A (en)
NL (1) NL6903163A (en)
NO (1) NO126405B (en)
SE (1) SE342105B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100625296B1 (en) * 2004-12-30 2006-09-19 주식회사 하이닉스반도체 Method and apparatus for latency control in high frequency synchronous semiconductor device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3324458A (en) * 1964-05-18 1967-06-06 Bunker Ramo Monitoring apparatus
US3396377A (en) * 1964-06-29 1968-08-06 Gen Electric Display data processor
US3366045A (en) * 1965-03-29 1968-01-30 C Olivetri & C S P A Ing Printing device for office machines and data processing equipments
US3449726A (en) * 1965-11-20 1969-06-10 Sony Corp Number display system

Also Published As

Publication number Publication date
NO126405B (en) 1973-01-29
DK122045B (en) 1972-01-10
BE729045A (en) 1969-08-01
US3641561A (en) 1972-02-08
DE1908869A1 (en) 1969-10-02
GB1244515A (en) 1971-09-02
FR2002782A1 (en) 1969-10-31
SE342105B (en) 1972-01-24
NL6903163A (en) 1969-09-01

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Legal Events

Date Code Title Description
PL Patent ceased