CH522331A - Elektronischer Schaltungs-Baustein zur Realisierung logischer Verknüpfungen - Google Patents

Elektronischer Schaltungs-Baustein zur Realisierung logischer Verknüpfungen

Info

Publication number
CH522331A
CH522331A CH1468069A CH1468069A CH522331A CH 522331 A CH522331 A CH 522331A CH 1468069 A CH1468069 A CH 1468069A CH 1468069 A CH1468069 A CH 1468069A CH 522331 A CH522331 A CH 522331A
Authority
CH
Switzerland
Prior art keywords
implementation
electronic circuit
circuit component
logical links
links
Prior art date
Application number
CH1468069A
Other languages
English (en)
Inventor
Joerg Dipl Ing Strobl
Original Assignee
Elin Union Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elin Union Ag filed Critical Elin Union Ag
Publication of CH522331A publication Critical patent/CH522331A/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/12—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using diode rectifiers

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Conveying And Assembling Of Building Elements In Situ (AREA)
CH1468069A 1968-09-30 1969-09-26 Elektronischer Schaltungs-Baustein zur Realisierung logischer Verknüpfungen CH522331A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT950268A AT289427B (de) 1968-09-30 1968-09-30 Elektronischer Schaltungs-Baustein zur Realisierung logistischer Verknüpfungen

Publications (1)

Publication Number Publication Date
CH522331A true CH522331A (de) 1972-06-15

Family

ID=3614712

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1468069A CH522331A (de) 1968-09-30 1969-09-26 Elektronischer Schaltungs-Baustein zur Realisierung logischer Verknüpfungen

Country Status (3)

Country Link
AT (1) AT289427B (de)
CH (1) CH522331A (de)
DE (1) DE1948825A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4124899A (en) * 1977-05-23 1978-11-07 Monolithic Memories, Inc. Programmable array logic circuit

Also Published As

Publication number Publication date
DE1948825A1 (de) 1970-04-30
AT289427B (de) 1971-04-26

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Legal Events

Date Code Title Description
PL Patent ceased