CH504103A - Method of contacting the zone of a monolithic solid-state circuit - Google Patents
Method of contacting the zone of a monolithic solid-state circuitInfo
- Publication number
- CH504103A CH504103A CH1733669A CH1733669A CH504103A CH 504103 A CH504103 A CH 504103A CH 1733669 A CH1733669 A CH 1733669A CH 1733669 A CH1733669 A CH 1733669A CH 504103 A CH504103 A CH 504103A
- Authority
- CH
- Switzerland
- Prior art keywords
- contacting
- zone
- state circuit
- monolithic solid
- monolithic
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
- H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
- H01L27/0652—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
- H01L27/0658—Vertical bipolar transistor in combination with resistors or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19681811019 DE1811019C3 (en) | 1968-11-26 | Method for contacting a semiconductor zone located on the surface of a monolithic solid-state circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
CH504103A true CH504103A (en) | 1971-02-28 |
Family
ID=5714381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH1733669A CH504103A (en) | 1968-11-26 | 1969-11-21 | Method of contacting the zone of a monolithic solid-state circuit |
Country Status (4)
Country | Link |
---|---|
CH (1) | CH504103A (en) |
FR (1) | FR2024284A1 (en) |
GB (1) | GB1240256A (en) |
NL (1) | NL6917817A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58223345A (en) * | 1982-06-21 | 1983-12-24 | Toshiba Corp | Semiconductor device |
-
1969
- 1969-11-20 GB GB5679669A patent/GB1240256A/en not_active Expired
- 1969-11-21 CH CH1733669A patent/CH504103A/en not_active IP Right Cessation
- 1969-11-26 FR FR6940719A patent/FR2024284A1/fr not_active Withdrawn
- 1969-11-26 NL NL6917817A patent/NL6917817A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
FR2024284A1 (en) | 1970-08-28 |
GB1240256A (en) | 1971-07-21 |
NL6917817A (en) | 1970-05-28 |
DE1811019B2 (en) | 1971-01-21 |
DE1811019A1 (en) | 1970-05-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CH505473A (en) | Method of manufacturing a semiconductor device | |
AT293950B (en) | Procedure for picking | |
CH516227A (en) | Method of manufacturing a junction semiconductor device | |
AT283078B (en) | Process for the aftertreatment of phosphate layers on metal surfaces | |
CH444542A (en) | Method of determining the speed | |
BG16183A3 (en) | METHOD FOR OBTAINING ADIPONITRIL | |
BG15753A3 (en) | METHOD FOR OBTAINING 1-HALOGEN-1-FORMYL-CARBONIDE- PHENYLHYDRAZONES | |
CH506574A (en) | Process for roughening the surfaces of polyolefin structures | |
CH501314A (en) | Procedure for checking the completeness of etchings | |
CH504103A (en) | Method of contacting the zone of a monolithic solid-state circuit | |
CH513252A (en) | Process for the thermal application of layers | |
AT265556B (en) | Method of joining the ends of nonwovens | |
AT307514B (en) | Method of direct channel agreement for the operation of address-coded telephone systems | |
DE1640005B2 (en) | PROCEDURE FOR CONNECTING THE FEEDS OF A MODULE ASSEMBLY | |
BG16179A3 (en) | METHOD FOR OBTAINING NEW SUBSTITUTED PHENETYL ESTERS | |
AT280085B (en) | Procedure for lapping balls | |
CH537643A (en) | Method of manufacturing a monolithic solid-state circuit | |
CH504105A (en) | Method for producing a resistance zone in a monolithic solid-state circuit | |
DK125949B (en) | Method of making a zipper. | |
CH484288A (en) | Process for the production of metal structures on semiconductor surfaces | |
DE2024349B2 (en) | METHOD OF MELTING A MELTING ELECTRODE | |
CH505765A (en) | Process for manufacturing ceramic parts | |
BG16035A3 (en) | METHOD FOR OBTAINING QUINAZOLINE-2-THIONES | |
CH514762A (en) | Scaffolding | |
AT269222B (en) | Process for the production of metal structures on semiconductor surfaces |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |