CH460405A - Verfahren zur Datenübertragung zwischen mindestens einer zentralen Recheneinheit und mehreren externen Speichern - Google Patents

Verfahren zur Datenübertragung zwischen mindestens einer zentralen Recheneinheit und mehreren externen Speichern

Info

Publication number
CH460405A
CH460405A CH1790367A CH1790367A CH460405A CH 460405 A CH460405 A CH 460405A CH 1790367 A CH1790367 A CH 1790367A CH 1790367 A CH1790367 A CH 1790367A CH 460405 A CH460405 A CH 460405A
Authority
CH
Switzerland
Prior art keywords
processing unit
data transmission
central processing
external memories
several external
Prior art date
Application number
CH1790367A
Other languages
English (en)
Inventor
Joseph Harmon John
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH460405A publication Critical patent/CH460405A/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/226Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262Arrangements for next microinstruction selection
    • G06F9/268Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Hardware Redundancy (AREA)
CH1790367A 1966-12-27 1967-12-19 Verfahren zur Datenübertragung zwischen mindestens einer zentralen Recheneinheit und mehreren externen Speichern CH460405A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US60487666A 1966-12-27 1966-12-27

Publications (1)

Publication Number Publication Date
CH460405A true CH460405A (de) 1968-07-31

Family

ID=24421413

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1790367A CH460405A (de) 1966-12-27 1967-12-19 Verfahren zur Datenübertragung zwischen mindestens einer zentralen Recheneinheit und mehreren externen Speichern

Country Status (9)

Country Link
US (1) US3544966A (de)
BE (1) BE705749A (de)
CH (1) CH460405A (de)
DE (1) DE1549486A1 (de)
ES (1) ES348591A1 (de)
FR (1) FR1543784A (de)
GB (1) GB1179613A (de)
NL (1) NL6717627A (de)
SE (1) SE327102B (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3676851A (en) * 1970-03-31 1972-07-11 Ibm Information retrieval system and method
US3713107A (en) * 1972-04-03 1973-01-23 Ncr Firmware sort processor system
NL7411989A (nl) * 1974-09-10 1976-03-12 Philips Nv Computersysteem met busstruktuur.
US4271466A (en) * 1975-02-20 1981-06-02 Panafacom Limited Direct memory access control system with byte/word control of data bus
US4200928A (en) * 1978-01-23 1980-04-29 Sperry Rand Corporation Method and apparatus for weighting the priority of access to variable length data blocks in a multiple-disk drive data storage system having an auxiliary processing device
JPS55105763A (en) * 1979-02-05 1980-08-13 Fanuc Ltd Address instruction system
GB2120819A (en) * 1982-05-21 1983-12-07 Pitney Bowes Inc Disk drive size selector circuit
DE102015224782A1 (de) * 2015-12-10 2017-06-14 Robert Bosch Gmbh Verfahren zum Betreiben einer Radarvorrichtung für ein Kraftfahrzeug
CN108920184B (zh) * 2018-06-05 2020-06-23 山东大学 基于双环形缓冲区的微处理器高性能数据通信方法
CN111290975A (zh) * 2018-12-07 2020-06-16 北京忆恒创源科技有限公司 使用统一缓存处理读命令与预读命令的方法及其存储设备

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3029414A (en) * 1958-08-11 1962-04-10 Honeywell Regulator Co Information handling apparatus
US3133268A (en) * 1959-03-09 1964-05-12 Teleregister Corp Revisable data storage and rapid answer back system
US3303476A (en) * 1964-04-06 1967-02-07 Ibm Input/output control
US3377619A (en) * 1964-04-06 1968-04-09 Ibm Data multiplexing system

Also Published As

Publication number Publication date
GB1179613A (en) 1970-01-28
NL6717627A (de) 1968-06-28
BE705749A (de) 1968-03-01
DE1549486A1 (de) 1971-03-04
US3544966A (en) 1970-12-01
ES348591A1 (es) 1969-03-16
FR1543784A (fr)
SE327102B (de) 1970-08-10

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