CH443733A - Dispositif de traitement de données simplifié - Google Patents

Dispositif de traitement de données simplifié

Info

Publication number
CH443733A
CH443733A CH1359265A CH1359265A CH443733A CH 443733 A CH443733 A CH 443733A CH 1359265 A CH1359265 A CH 1359265A CH 1359265 A CH1359265 A CH 1359265A CH 443733 A CH443733 A CH 443733A
Authority
CH
Switzerland
Prior art keywords
data processing
processing device
simplified data
simplified
processing
Prior art date
Application number
CH1359265A
Other languages
English (en)
Inventor
Delaigue Serge
Rauche Rene
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Publication of CH443733A publication Critical patent/CH443733A/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3004Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043LOAD or STORE instructions; Clear instruction
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508Configuration, initialisation
    • H04Q3/54533Configuration data, translation, passwords, databases

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Databases & Information Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
CH1359265A 1964-10-02 1965-10-01 Dispositif de traitement de données simplifié CH443733A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR990131A FR1421389A (fr) 1964-10-02 1964-10-02 Système de traitement de données simplifié

Publications (1)

Publication Number Publication Date
CH443733A true CH443733A (fr) 1967-09-15

Family

ID=8839554

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1359265A CH443733A (fr) 1964-10-02 1965-10-01 Dispositif de traitement de données simplifié

Country Status (7)

Country Link
US (1) US3398402A (fr)
BE (1) BE670446A (fr)
CH (1) CH443733A (fr)
DE (1) DE1268672B (fr)
FR (1) FR1421389A (fr)
GB (1) GB1127551A (fr)
NL (1) NL6512866A (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4253179A (en) * 1977-08-17 1981-02-24 Nippon Electric Co., Ltd. Time division digital switching system with code converting and inverse-converting circuits
US6145075A (en) * 1998-02-06 2000-11-07 Ip-First, L.L.C. Apparatus and method for executing a single-cycle exchange instruction to exchange contents of two locations in a register file
FR2831288B1 (fr) * 2001-10-18 2004-12-10 St Microelectronics Sa Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire
FR2919081B1 (fr) * 2007-07-17 2011-03-25 Univ La Reunion Implementation de calculs pour processeurs

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3197738A (en) * 1958-07-01 1965-07-27 Ibm Data processing system
US3161763A (en) * 1959-01-26 1964-12-15 Burroughs Corp Electronic digital computer with word field selection
US3201759A (en) * 1959-12-30 1965-08-17 Ibm Data input device
US3200379A (en) * 1961-01-23 1965-08-10 Burroughs Corp Digital computer
US3209332A (en) * 1961-09-07 1965-09-28 Potter Instrument Co Inc Reflexing buffer
US3202805A (en) * 1961-10-02 1965-08-24 Bunker Ramo Simultaneous digital multiply-add, multiply-subtract circuit
US3314015A (en) * 1963-09-16 1967-04-11 Bell Telephone Labor Inc Digitally synthesized artificial transfer networks
US3331954A (en) * 1964-08-28 1967-07-18 Gen Precision Inc Computer performing serial arithmetic operations having a parallel-type static memory

Also Published As

Publication number Publication date
FR1421389A (fr) 1965-12-17
NL6512866A (fr) 1966-04-04
DE1268672B (de) 1968-05-22
GB1127551A (en) 1968-09-18
BE670446A (fr) 1966-04-04
US3398402A (en) 1968-08-20

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