CH418691A - Vorrichtung zum Parallelvergleich zweier Zahlen in Binärverschlüsselung - Google Patents

Vorrichtung zum Parallelvergleich zweier Zahlen in Binärverschlüsselung

Info

Publication number
CH418691A
CH418691A CH1200463A CH1200463A CH418691A CH 418691 A CH418691 A CH 418691A CH 1200463 A CH1200463 A CH 1200463A CH 1200463 A CH1200463 A CH 1200463A CH 418691 A CH418691 A CH 418691A
Authority
CH
Switzerland
Prior art keywords
numbers
binary code
parallel comparison
comparison
parallel
Prior art date
Application number
CH1200463A
Other languages
German (de)
English (en)
Inventor
Becker Winfried
Original Assignee
Euratom
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Euratom filed Critical Euratom
Publication of CH418691A publication Critical patent/CH418691A/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/12Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using diode rectifiers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02Comparing digital values
    • G06F7/026Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Power Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
CH1200463A 1962-10-01 1963-09-30 Vorrichtung zum Parallelvergleich zweier Zahlen in Binärverschlüsselung CH418691A (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB37160/62A GB1026171A (en) 1962-10-01 1962-10-01 Improvements in or relating to apparatus for comparing the magnitude of two numbers in binary code
GB4732362 1962-10-01

Publications (1)

Publication Number Publication Date
CH418691A true CH418691A (de) 1966-08-15

Family

ID=26263357

Family Applications (2)

Application Number Title Priority Date Filing Date
CH1200463A CH418691A (de) 1962-10-01 1963-09-30 Vorrichtung zum Parallelvergleich zweier Zahlen in Binärverschlüsselung
CH1200563A CH416164A (de) 1962-10-01 1963-09-30 Vorrichtung zum Parallelvergleich zweier Zahlen

Family Applications After (1)

Application Number Title Priority Date Filing Date
CH1200563A CH416164A (de) 1962-10-01 1963-09-30 Vorrichtung zum Parallelvergleich zweier Zahlen

Country Status (9)

Country Link
US (1) US3320587A (en:Method)
BE (2) BE638042A (en:Method)
CH (2) CH418691A (en:Method)
DE (2) DE1208918B (en:Method)
FR (2) FR1370366A (en:Method)
GB (2) GB1026171A (en:Method)
LU (1) LU44539A1 (en:Method)
NL (2) NL298500A (en:Method)
SE (1) SE300894B (en:Method)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3938087A (en) * 1974-05-31 1976-02-10 Honeywell Information Systems, Inc. High speed binary comparator

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2907877A (en) * 1954-05-18 1959-10-06 Hughes Aircraft Co Algebraic magnitude comparators
GB847114A (en) * 1956-05-03 1960-09-07 Electronique & Automatisme Sa Improvements in or relating to data processing circuits
DE1136855B (de) * 1956-10-31 1962-09-20 Sperry Rand Corp Magnetische Torschaltung
FR1179796A (fr) * 1957-07-24 1959-05-28 Electronique & Automatisme Sa Circuit à noyaux magnétiques formant commutateur de courant et opérateur logique de variables
US2973508A (en) * 1958-11-19 1961-02-28 Ibm Comparator
US2997692A (en) * 1959-01-30 1961-08-22 Ibm Binary comparator
US3206724A (en) * 1959-10-22 1965-09-14 Ibm Sequence indicating circuits
US3145366A (en) * 1961-06-30 1964-08-18 Ibm Comparing matrix
US3139606A (en) * 1961-11-01 1964-06-30 Collins Radio Co Character recognition circuit using multiaperture cores

Also Published As

Publication number Publication date
LU44539A1 (en:Method) 1963-12-02
FR1370365A (fr) 1964-08-21
NL298499A (en:Method) 1965-11-25
SE300894B (en:Method) 1968-05-13
BE638043A (en:Method) 1964-04-01
BE638042A (en:Method) 1964-04-01
DE1208918B (de) 1966-01-13
DE1207674B (de) 1965-12-23
GB1026171A (en) 1966-04-14
CH416164A (de) 1966-06-30
GB1061491A (en) 1967-03-15
NL298500A (en:Method) 1965-11-25
FR1370366A (fr) 1964-08-21
US3320587A (en) 1967-05-16

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