CH406303A - Dispositif de commutation séquentielle - Google Patents

Dispositif de commutation séquentielle

Info

Publication number
CH406303A
CH406303A CH516062A CH516062A CH406303A CH 406303 A CH406303 A CH 406303A CH 516062 A CH516062 A CH 516062A CH 516062 A CH516062 A CH 516062A CH 406303 A CH406303 A CH 406303A
Authority
CH
Switzerland
Prior art keywords
switching device
sequential switching
sequential
switching
Prior art date
Application number
CH516062A
Other languages
English (en)
Inventor
Georges Guillon Henri
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Publication of CH406303A publication Critical patent/CH406303A/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1502Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs programmable
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15066Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using bistable devices
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/04Distributors combined with modulators or demodulators
    • H04J3/047Distributors with transistors or integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Electronic Switches (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)
CH516062A 1961-05-12 1962-04-30 Dispositif de commutation séquentielle CH406303A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR861611A FR1296730A (fr) 1961-05-12 1961-05-12 Perfectionnements apportés aux dispositifs de commutation séquentielle

Publications (1)

Publication Number Publication Date
CH406303A true CH406303A (fr) 1966-01-31

Family

ID=8755041

Family Applications (1)

Application Number Title Priority Date Filing Date
CH516062A CH406303A (fr) 1961-05-12 1962-04-30 Dispositif de commutation séquentielle

Country Status (7)

Country Link
US (1) US3115608A (fr)
BE (1) BE616848A (fr)
CH (1) CH406303A (fr)
FR (1) FR1296730A (fr)
GB (1) GB945867A (fr)
LU (1) LU41616A1 (fr)
NL (1) NL278348A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3311757A (en) * 1964-10-05 1967-03-28 North American Aviation Inc Digital pulse distribution circuit for dividing the period of a cyclic input signal into predetermined plurality of outputs
US3675049A (en) * 1970-04-24 1972-07-04 Western Electric Co Variable digital delay using multiple parallel channels and a signal-driven bit distributor
DE2602169C2 (de) * 1976-01-21 1978-02-23 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum zyklischen Erzeugen einer signaltechnisch sicheren Folge von Steuerimpulsen

Also Published As

Publication number Publication date
FR1296730A (fr) 1962-06-22
GB945867A (en) 1964-01-08
LU41616A1 (fr) 1962-06-26
NL278348A (fr)
BE616848A (fr) 1962-08-16
US3115608A (en) 1963-12-24

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