CH361417A - Nach dem Dualsystem arbeitende Digital-Rechen-Vorrichtung - Google Patents

Nach dem Dualsystem arbeitende Digital-Rechen-Vorrichtung

Info

Publication number
CH361417A
CH361417A CH361417DA CH361417A CH 361417 A CH361417 A CH 361417A CH 361417D A CH361417D A CH 361417DA CH 361417 A CH361417 A CH 361417A
Authority
CH
Switzerland
Prior art keywords
computing device
dual system
working according
device working
digital computing
Prior art date
Application number
Other languages
German (de)
English (en)
Inventor
Presper Eckert John
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Publication of CH361417A publication Critical patent/CH361417A/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
CH361417D 1956-04-12 1957-04-09 Nach dem Dualsystem arbeitende Digital-Rechen-Vorrichtung CH361417A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US361417XA 1956-04-12 1956-04-12

Publications (1)

Publication Number Publication Date
CH361417A true CH361417A (de) 1962-04-15

Family

ID=21886884

Family Applications (1)

Application Number Title Priority Date Filing Date
CH361417D CH361417A (de) 1956-04-12 1957-04-09 Nach dem Dualsystem arbeitende Digital-Rechen-Vorrichtung

Country Status (5)

Country Link
BE (1) BE556428A (en:Method)
CH (1) CH361417A (en:Method)
FR (1) FR1174193A (en:Method)
GB (1) GB833781A (en:Method)
NL (1) NL216061A (en:Method)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3325634A (en) * 1964-02-03 1967-06-13 Hughes Aircraft Co Dynamic high speed parallel adder using tunnel diode circuits

Also Published As

Publication number Publication date
GB833781A (en) 1960-04-27
FR1174193A (fr) 1959-03-06
BE556428A (en:Method)
NL216061A (en:Method)

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