CH342861A4 - - Google Patents
Info
- Publication number
- CH342861A4 CH342861A4 CH342861D CH342861D CH342861A4 CH 342861 A4 CH342861 A4 CH 342861A4 CH 342861 D CH342861 D CH 342861D CH 342861 D CH342861 D CH 342861D CH 342861 A4 CH342861 A4 CH 342861A4
- Authority
- CH
- Switzerland
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C13/00—Driving mechanisms for clocks by master-clocks
- G04C13/08—Slave-clocks actuated intermittently
-
- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C13/00—Driving mechanisms for clocks by master-clocks
- G04C13/02—Circuit arrangements; Electric clock installations
- G04C13/03—Pulse transmission systems with additional means for setting the time indication of slave-clocks
-
- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C13/00—Driving mechanisms for clocks by master-clocks
- G04C13/02—Circuit arrangements; Electric clock installations
- G04C13/04—Master-clocks
- G04C13/0409—Master-clocks monitoring or controlling master-clock or system with more than one master-clock, e.g. for switching-over to standby motor or power system
- G04C13/0418—Master-clocks monitoring or controlling master-clock or system with more than one master-clock, e.g. for switching-over to standby motor or power system by using devices similar to slave-clocks
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DES67845A DE1196581B (en) | 1960-03-31 | 1960-03-31 | Circuit arrangement against incorrect setting of clocks in a slave clock line due to mutilated pulses |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH342861A4 true CH342861A4 (en) | 1962-11-30 |
Family
ID=7499855
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH342861D CH342861A4 (en) | 1960-03-31 | 1961-03-23 | |
| CH342861A CH368102A (en) | 1960-03-31 | 1961-03-23 | Circuit arrangement for correcting the incorrect setting which clocks on a slave clock line operated with incremental pulses of alternating polarity can receive as a result of incremental pulse mutilation caused by an interruption in the operating current |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH342861A CH368102A (en) | 1960-03-31 | 1961-03-23 | Circuit arrangement for correcting the incorrect setting which clocks on a slave clock line operated with incremental pulses of alternating polarity can receive as a result of incremental pulse mutilation caused by an interruption in the operating current |
Country Status (2)
| Country | Link |
|---|---|
| CH (2) | CH342861A4 (en) |
| DE (1) | DE1196581B (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE896629C (en) * | 1951-12-25 | 1953-11-12 | Siemens & Halske Ges M B H | Process for the control of electrical clocks via fire alarm lines |
-
1960
- 1960-03-31 DE DES67845A patent/DE1196581B/en active Pending
-
1961
- 1961-03-23 CH CH342861D patent/CH342861A4/xx unknown
- 1961-03-23 CH CH342861A patent/CH368102A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE1196581B (en) | 1965-07-08 |
| CH368102A (en) | 1962-11-30 |