CH324245A - Circuit retardateur électronique - Google Patents

Circuit retardateur électronique

Info

Publication number
CH324245A
CH324245A CH324245DA CH324245A CH 324245 A CH324245 A CH 324245A CH 324245D A CH324245D A CH 324245DA CH 324245 A CH324245 A CH 324245A
Authority
CH
Switzerland
Prior art keywords
delay circuit
electronic delay
electronic
circuit
delay
Prior art date
Application number
Other languages
English (en)
Inventor
Edward Owen Charles
Original Assignee
Elliott Brothers London Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elliott Brothers London Ltd filed Critical Elliott Brothers London Ltd
Publication of CH324245A publication Critical patent/CH324245A/fr

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/20—Digital stores in which the information is moved stepwise, e.g. shift registers using discharge tubes
    • G11C19/202—Digital stores in which the information is moved stepwise, e.g. shift registers using discharge tubes with vacuum tubes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/26—Time-delay networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/145—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of resonant circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
CH324245D 1952-11-25 1953-11-25 Circuit retardateur électronique CH324245A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB324245X 1952-11-25

Publications (1)

Publication Number Publication Date
CH324245A true CH324245A (fr) 1957-09-15

Family

ID=10338393

Family Applications (1)

Application Number Title Priority Date Filing Date
CH324245D CH324245A (fr) 1952-11-25 1953-11-25 Circuit retardateur électronique

Country Status (4)

Country Link
CH (1) CH324245A (fr)
FR (1) FR1088075A (fr)
GB (1) GB730672A (fr)
NL (1) NL183116B (fr)

Also Published As

Publication number Publication date
FR1088075A (fr) 1955-03-02
NL183116B (nl)
GB730672A (en) 1955-05-25

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