CA964771A - Method of preventing dielectric breakdown during d.c. sputter etching - Google Patents
Method of preventing dielectric breakdown during d.c. sputter etchingInfo
- Publication number
- CA964771A CA964771A CA135,898A CA135898A CA964771A CA 964771 A CA964771 A CA 964771A CA 135898 A CA135898 A CA 135898A CA 964771 A CA964771 A CA 964771A
- Authority
- CA
- Canada
- Prior art keywords
- dielectric breakdown
- sputter etching
- breakdown during
- preventing dielectric
- preventing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H10P95/00—
-
- H10W72/07236—
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/129,430 US3983023A (en) | 1971-03-30 | 1971-03-30 | Integrated semiconductor circuit master-slice structure in which the insulation layer beneath unused contact terminals is free of short-circuits |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA964771A true CA964771A (en) | 1975-03-18 |
Family
ID=22439896
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA135,898A Expired CA964771A (en) | 1971-03-30 | 1972-03-01 | Method of preventing dielectric breakdown during d.c. sputter etching |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3983023A (OSRAM) |
| JP (1) | JPS5134272B1 (OSRAM) |
| CA (1) | CA964771A (OSRAM) |
| DE (1) | DE2213657C3 (OSRAM) |
| GB (1) | GB1320884A (OSRAM) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5213665A (en) * | 1975-07-24 | 1977-02-02 | Canon Kk | System for suppressing leak current in printed wiring circuit net |
| US4087314A (en) * | 1976-09-13 | 1978-05-02 | Motorola, Inc. | Bonding pedestals for semiconductor devices |
| US4527041A (en) * | 1983-06-02 | 1985-07-02 | Kazuo Kai | Method of forming a wiring pattern on a wiring board |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3388301A (en) * | 1964-12-09 | 1968-06-11 | Signetics Corp | Multichip integrated circuit assembly with interconnection structure |
| DE1514871B2 (de) * | 1965-09-17 | 1972-04-13 | Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm | Verfahren zur pruefung einzelner bauelemente oder schaltungsteile von einer oder mehreren integrierten schaltung(en) |
| US3469155A (en) * | 1966-09-23 | 1969-09-23 | Westinghouse Electric Corp | Punch-through means integrated with mos type devices for protection against insulation layer breakdown |
| FR1064185A (fr) * | 1967-05-23 | 1954-05-11 | Philips Nv | Procédé de fabrication d'un système d'électrodes |
| US3365707A (en) * | 1967-06-23 | 1968-01-23 | Rca Corp | Lsi array and standard cells |
| US3658678A (en) * | 1969-11-26 | 1972-04-25 | Ibm | Glass-annealing process for encapsulating and stabilizing fet devices |
-
1971
- 1971-03-30 US US05/129,430 patent/US3983023A/en not_active Expired - Lifetime
-
1972
- 1972-03-01 CA CA135,898A patent/CA964771A/en not_active Expired
- 1972-03-02 GB GB970772A patent/GB1320884A/en not_active Expired
- 1972-03-07 JP JP47022853A patent/JPS5134272B1/ja active Pending
- 1972-03-21 DE DE2213657A patent/DE2213657C3/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| GB1320884A (en) | 1973-06-20 |
| DE2213657A1 (de) | 1972-10-12 |
| US3983023A (en) | 1976-09-28 |
| DE2213657C3 (de) | 1983-11-10 |
| JPS5134272B1 (OSRAM) | 1976-09-25 |
| DE2213657B2 (OSRAM) | 1980-02-21 |
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