CA961169A - Single-electrode charge-coupled random access memory cell with impurity implanted gate region - Google Patents

Single-electrode charge-coupled random access memory cell with impurity implanted gate region

Info

Publication number
CA961169A
CA961169A CA145,628A CA145628A CA961169A CA 961169 A CA961169 A CA 961169A CA 145628 A CA145628 A CA 145628A CA 961169 A CA961169 A CA 961169A
Authority
CA
Canada
Prior art keywords
memory cell
random access
access memory
gate region
impurity implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA145,628A
Other languages
English (en)
Other versions
CA145628S (en
Inventor
Irving T. Ho
Jacob Riseman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA961169A publication Critical patent/CA961169A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1062Channel region of field-effect devices of charge coupled devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42396Gate electrodes for field effect devices for charge coupled devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Read Only Memory (AREA)
CA145,628A 1971-07-06 1972-06-26 Single-electrode charge-coupled random access memory cell with impurity implanted gate region Expired CA961169A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15990771A 1971-07-06 1971-07-06

Publications (1)

Publication Number Publication Date
CA961169A true CA961169A (en) 1975-01-14

Family

ID=22574617

Family Applications (1)

Application Number Title Priority Date Filing Date
CA145,628A Expired CA961169A (en) 1971-07-06 1972-06-26 Single-electrode charge-coupled random access memory cell with impurity implanted gate region

Country Status (7)

Country Link
JP (1) JPS5145946B1 (de)
CA (1) CA961169A (de)
CH (1) CH548086A (de)
DE (1) DE2232756C2 (de)
ES (1) ES404185A1 (de)
FR (1) FR2144904B1 (de)
IT (1) IT956844B (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3916394A (en) * 1974-12-09 1975-10-28 Honeywell Inf Systems High-speed random access memory
DE2842588A1 (de) * 1978-09-29 1980-04-17 Siemens Ag Hochintegrierbares, dynamisches speicherelement
JPS55113359A (en) * 1979-02-22 1980-09-01 Fujitsu Ltd Semiconductor integrated circuit device
JPS59140811U (ja) * 1983-03-12 1984-09-20 南 猛 コンクリ−トミキサ−

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1329220A (en) * 1969-08-11 1973-09-05 California Inst Of Techn Stored charge device

Also Published As

Publication number Publication date
CH548086A (de) 1974-04-11
JPS5145946B1 (de) 1976-12-06
IT956844B (it) 1973-10-10
DE2232756C2 (de) 1984-02-23
FR2144904B1 (de) 1975-09-05
DE2232756A1 (de) 1973-01-18
FR2144904A1 (de) 1973-02-16
ES404185A1 (es) 1975-06-01

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