CA931277A - Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon - Google Patents

Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon

Info

Publication number
CA931277A
CA931277A CA080027A CA80027A CA931277A CA 931277 A CA931277 A CA 931277A CA 080027 A CA080027 A CA 080027A CA 80027 A CA80027 A CA 80027A CA 931277 A CA931277 A CA 931277A
Authority
CA
Canada
Prior art keywords
construction
electronic devices
individual electronic
distributing power
devices constructed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA080027A
Other languages
English (en)
Inventor
L. Langdon Jack
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA931277A publication Critical patent/CA931277A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/098—Layer conversion
CA080027A 1969-05-12 1970-04-14 Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon Expired CA931277A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82366269A 1969-05-12 1969-05-12

Publications (1)

Publication Number Publication Date
CA931277A true CA931277A (en) 1973-07-31

Family

ID=25239356

Family Applications (1)

Application Number Title Priority Date Filing Date
CA080027A Expired CA931277A (en) 1969-05-12 1970-04-14 Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon

Country Status (7)

Country Link
US (1) US3656028A (de)
JP (1) JPS5422753B1 (de)
CA (1) CA931277A (de)
CH (1) CH501316A (de)
DE (1) DE2022457A1 (de)
FR (1) FR2042556B1 (de)
GB (1) GB1246775A (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3769105A (en) * 1970-01-26 1973-10-30 Ibm Process for making an integrated circuit with a damping resistor in combination with a buried decoupling capacitor
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US3866066A (en) * 1973-07-16 1975-02-11 Bell Telephone Labor Inc Power supply distribution for integrated circuits
US3995309A (en) * 1973-10-30 1976-11-30 General Electric Company Isolation junctions for semiconductor devices
US3982268A (en) * 1973-10-30 1976-09-21 General Electric Company Deep diode lead throughs
US3988763A (en) * 1973-10-30 1976-10-26 General Electric Company Isolation junctions for semiconductors devices
US4046605A (en) * 1974-01-14 1977-09-06 National Semiconductor Corporation Method of electrically isolating individual semiconductor circuits in a wafer
DE2401701C3 (de) * 1974-01-15 1978-12-21 Robert Bosch Gmbh, 7000 Stuttgart Transistorleistungsschalter
US3988766A (en) * 1974-04-29 1976-10-26 General Electric Company Multiple P-N junction formation with an alloy droplet
CA1024661A (en) * 1974-06-26 1978-01-17 International Business Machines Corporation Wireable planar integrated circuit chip structure
US4199775A (en) * 1974-09-03 1980-04-22 Bell Telephone Laboratories, Incorporated Integrated circuit and method for fabrication thereof
US4168997A (en) * 1978-10-10 1979-09-25 National Semiconductor Corporation Method for making integrated circuit transistors with isolation and substrate connected collectors utilizing simultaneous outdiffusion to convert an epitaxial layer
US4649417A (en) * 1983-09-22 1987-03-10 International Business Machines Corporation Multiple voltage integrated circuit packaging substrate
US5159429A (en) * 1990-01-23 1992-10-27 International Business Machines Corporation Semiconductor device structure employing a multi-level epitaxial structure and method of manufacturing same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1378131A (fr) * 1962-10-05 1964-11-13 Fairchild Camera Instr Co Procédé de formation de modèle dans une couche épitaxique de semiconducteur et dispositifs ainsi fabriqués
SE312860B (de) * 1964-09-28 1969-07-28 Asea Ab
US3372070A (en) * 1965-07-30 1968-03-05 Bell Telephone Labor Inc Fabrication of semiconductor integrated devices with a pn junction running through the wafer
US3423650A (en) * 1966-07-01 1969-01-21 Rca Corp Monolithic semiconductor microcircuits with improved means for connecting points of common potential
FR155459A (de) * 1967-01-23
US3538397A (en) * 1967-05-09 1970-11-03 Motorola Inc Distributed semiconductor power supplies and decoupling capacitor therefor
US3460010A (en) * 1968-05-15 1969-08-05 Ibm Thin film decoupling capacitor incorporated in an integrated circuit chip,and process for making same

Also Published As

Publication number Publication date
JPS5422753B1 (de) 1979-08-08
GB1246775A (en) 1971-09-22
DE2022457A1 (de) 1970-11-19
FR2042556B1 (de) 1973-10-19
CH501316A (de) 1970-12-31
FR2042556A1 (de) 1971-02-12
US3656028A (en) 1972-04-11

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