CA2817492C - Composition de cloture a pave - Google Patents

Composition de cloture a pave Download PDF

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Publication number
CA2817492C
CA2817492C CA2817492A CA2817492A CA2817492C CA 2817492 C CA2817492 C CA 2817492C CA 2817492 A CA2817492 A CA 2817492A CA 2817492 A CA2817492 A CA 2817492A CA 2817492 C CA2817492 C CA 2817492C
Authority
CA
Canada
Prior art keywords
buffer
viewport
application image
tiles
visible portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CA2817492A
Other languages
English (en)
Other versions
CA2817492A1 (fr
Inventor
Etienne Belanger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BlackBerry Ltd
Original Assignee
2236008 Ontario Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 2236008 Ontario Inc filed Critical 2236008 Ontario Inc
Publication of CA2817492A1 publication Critical patent/CA2817492A1/fr
Application granted granted Critical
Publication of CA2817492C publication Critical patent/CA2817492C/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Image Processing (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Generation (AREA)
  • User Interface Of Digital Computer (AREA)

Abstract

Un système qui met en tampon une image dapplication réduit les exigences de bande passante d'accès mémoire. Limage de lapplication peut être logiquement séparée en tuiles. Une fenêtre peut établir une portion visible de limage dapplication, où la portion visible est plus petite que limage d'application. Les tuiles chevauchées par la fenêtre peuvent être mises en tampon dans un tampon avant et un tampon arrière. Les tuiles non chevauchées par la fenêtre peuvent être mises en tampon dans le tampon arrière, mais pas dans le tampon avant. Un gestionnaire de composition, ayant connaissance de la fenêtre et d'au moins deux tampons de tuiles non contigus dans le tampon avant, peut extraire la portion visible de limage d'application directement des tampons de tuiles non contigus.
CA2817492A 2012-06-08 2013-05-31 Composition de cloture a pave Active CA2817492C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP12171363.0 2012-06-08
EP12171363.0A EP2672480B1 (fr) 2012-06-08 2012-06-08 Composition de fenêtre d'affichage à carreaux

Publications (2)

Publication Number Publication Date
CA2817492A1 CA2817492A1 (fr) 2013-12-08
CA2817492C true CA2817492C (fr) 2017-03-14

Family

ID=46208373

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2817492A Active CA2817492C (fr) 2012-06-08 2013-05-31 Composition de cloture a pave

Country Status (3)

Country Link
EP (2) EP2672480B1 (fr)
CN (1) CN103489150B (fr)
CA (1) CA2817492C (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2672480B1 (fr) * 2012-06-08 2016-11-16 2236008 Ontario Inc. Composition de fenêtre d'affichage à carreaux
KR102275712B1 (ko) 2014-10-31 2021-07-09 삼성전자주식회사 렌더링 방법, 렌더링 장치 및 전자 장치
KR101717355B1 (ko) * 2015-07-29 2017-03-16 엘에스산전 주식회사 에너지 관리 시스템의 디스플레이 장치 및 방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839828A (en) * 1986-01-21 1989-06-13 International Business Machines Corporation Memory read/write control system for color graphic display
EP0312720A3 (fr) * 1987-10-20 1990-06-13 Tektronix Inc. Système de dessein graphique à double mémoire-tampon
US5877762A (en) * 1995-02-27 1999-03-02 Apple Computer, Inc. System and method for capturing images of screens which display multiple windows
US5933155A (en) * 1996-11-06 1999-08-03 Silicon Graphics, Inc. System and method for buffering multiple frames while controlling latency
US6911983B2 (en) * 2003-03-12 2005-06-28 Nvidia Corporation Double-buffering of pixel data using copy-on-write semantics
US7274370B2 (en) * 2003-12-18 2007-09-25 Apple Inc. Composite graphics rendered using multiple frame buffers
WO2010124397A1 (fr) * 2009-04-29 2010-11-04 Torch Mobile Inc. Mémoire de sauvegarde en mosaïque à base de logiciel
EP2672480B1 (fr) * 2012-06-08 2016-11-16 2236008 Ontario Inc. Composition de fenêtre d'affichage à carreaux

Also Published As

Publication number Publication date
EP3098807A1 (fr) 2016-11-30
CN103489150A (zh) 2014-01-01
CA2817492A1 (fr) 2013-12-08
CN103489150B (zh) 2017-03-01
EP2672480B1 (fr) 2016-11-16
EP2672480A1 (fr) 2013-12-11
EP3098807B1 (fr) 2018-01-17

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