CA2576273C - Method and device for transceiver isolation - Google Patents

Abstract

A transmit/receive (T/R) switch (120) for a transceiver (100). The T/R switch (120) has a first switch terminal (121) for connection to a first terminal (106) of an antenna (105) and a second switch terminal (122) for connection to a first terminal (112) of a transmitter (110). The T/R switch (120) also has switch receiver terminals (123, 124) for connection to a receiver (130). In a transmit state, the T/R switch (120) connects transmit signals from the transmitter (110) at the second switch terminal (122) to the first switch terminal (121), for transmission by an antenna (105). The receiver terminals (123, 124) are isolated during the transmit state. In a receive state, the transmitter (110) is short circuited such that signals from a second terminal (107) of the antenna (105) are received at the second switch terminal (122) via the short circuited transmitter (110). During the receive state the T/R
switch (120) passes signals received at the first switch terminal (121) and the second switch terminal (122) to the receiver terminals (123, 124).
Residual antenna transients are damped.

Description

"Method and device for transceiver isolation"
Cross-Reference to Related Applications The present application claims priority from Australian Provisional Patent Application No 2004904543 filed on 10 August 2004.
Field of the Invention The present invention relates to a transmit/receive switch (T/R switch). More particularly, the invention relates to a T/R switch for a transceiver comprising a transmitter and a receiver, for providing high isolation between the transmitter and receiver, particularly in broadband applications where the delay between a transmitted signal and detection of a target echo is comparable to the duration of the transmission process.
Background to the Invention A typical environment in which a transceiver may be used is borehole radar, and in particular a monostatic borehole radar using a single-feed point antenna. A
borehole radar comprises a relatively powerful transmitter (T,), a wide-band antenna, and a sensitive receiver (Rx). The transmitter (Tx) is positioned in a borehole and excites the antenna to radiate electromagnetic pulses which propagate into the surrounding rock or earth.
Usually, the transmitted electromagnetic pulses are characterized by short rise/fall times to obtain sufficient resolution in the eventual radar data, and by sufficiently high energy levels to overcome attenuation and spreading losses in the surrounding rock medium.
Transmitted electromagnetic pulses propagate through the rock and reflect off geological features such as interfaces between rock media having differing electromagnetic properties. Should such geological features be proximal to the transceiver, reflected signals may have a short two way propagation time. A receiver (Rx) is used to detect such reflected signals. The receiver is usually located in the same borehole as the transmitter, and must be sufficiently sensitive to detect signals which have suffered attenuation and reflection losses. The receiver detects and amplifies the received signal, and records the arrival time relative to the time that the transmitted pulse was radiated.
The sensitive receiver may saturate or even be damaged if exposed to excessive input signals, for example if a substantially unattenuated signal is received directly from the transmitter. Any degradation of the signal to noise ratio in the receiver 4535755.1

2 reduces the range of the system. The bandwidth of the receiver should at least equal the bandwidth of the radiated pulse to preserve resolution and integrity of the data.
Borehole radar systems often employ a bi-static configuration, with the transmitter and receiver deployed as two completely separate units (probes) in the same borehole. The physical distance between the two probes is increased until adequate isolation between the receiver and the transmitted pulse is achieved.
Signal synchronization is often achieved by use of an optic fibre between the two probes. The closest discernible target is determined by the duration of saturation (if present) in the receiver, and whether the resultant oblique signal path is within the radiation pattern of the transmitter- and receiver antennas. Bi-static systems perform well but are awkward to deploy in constrained spaces, for example mining stope faces. The optic fibre link is also susceptible to damage in mining and other industrial environments.
T/R-switches are typically 3-port (6-terminal) devices used in conjunction with a parallel connection of the transmitter, receiver and antenna, with the transmitter, receiver and antenna connected to separate ports, such that the T/R-switch may in the transmit state disconnect the terminals of the receiver, or in the receive state may disconnect the terminals of the transmitter from the parallel connection.
Any discussion of documents, acts, materials, devices, articles or the like which has been included in the present specification is solely for the purpose of providing a context for the present invention. It is not to be taken as an admission that any or all of these matters form part of the prior art base or were common general knowledge in the field relevant to the present invention as it existed before the priority date of each claim of this application.
Throughout this specification the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element, integer or step, or group of elements, integers or steps, but not the exclusion of any other element, integer or step, or group of elements, integers or steps.
Summary of the Invention According to a first aspect, the present invention provides a transmit/receive (T/R) switch comprising:
a first switch terminal for connection to a first terminal of an antenna;
a second switch terminal for connection to a first terminal of a transmitter;
and switch receiver terminals for connection to a receiver;

3 wherein the T/R switch is operable to implement a transmit state by connecting transmit signals from the second switch terminal to the first switch terminal, and by isolating the switch receiver terminals;
wherein the T/R switch is operable to implement a receive state by causing short circuiting of a transmitter connected to the second switch terminal such that signals from a second terminal of an antenna may be received at the second switch terminal via the short circuited transmitter; and wherein in the receive state the T/R switch is operable to pass signals received at the first switch terminal and the second switch terminal to the receiver terminals According to a second aspect the present invention provides a transceiver comprising:
an antenna for transmitting and receiving signals, having a first antenna terminal and a second antenna terminal;
a transmitter for producing transmit signals in a transmit state and operable to be short circuited in a receive state, the transmitter having a first transmitter terminal and a second transmitter terminal;
a receiver for receiving signals from the antenna; and a transmit/receive (T/R) switch having a first switch terminal, a second switch terminal, and switch receiver terminals, wherein the first switch terminal is connected to the first antenna terminal, the second switch terminal is connected to the first transmitter terminal, the second transmitter terminal is connected to the second antenna terminal, and the switch receiver terminals are connected to the receiver;
wherein the T/R switch is operable in the transmit state to connect transmit signals from the second switch terminal to the first switch terminal, and to isolate the receiver terminals;
wherein the T/R switch is operable in the receive state to receive signals from the second antenna terminal at the second switch terminal via the short circuited transmitter; and wherein the T/R switch is operable in the receive state to pass signals received at the first switch terminal and the second switch terminal to the receiver terminals.
According to a third aspect the present invention provides a method of operating a T/R switch, comprising:
in a transmit state connecting transmit signals received at a second switch terminal to a first switch terminal, and isolating switch receiver terminals;
and

4 in a receive state causing short circuiting of a transmitter connected to the second switch terminal, and passing received signals from the first switch terminal and the second switch terminal to the receiver terminals.
According to a fourth aspect the present invention provides a method of operating a transceiver, comprising:
in a transmit state, connecting transmit signals of a transmitter from a second switch terminal to a first switch terminal, and isolating switch receiver terminals; and in a receive state, short circuiting the transmitter, passing a received signal from the antenna to the first switch terminal and via the short circuited transmitter to the second switch terminal, and passing the received signal from the first and second switch terminals to the receiver terminals.
According to a fifth aspect the present invention provides a computer program for operating a T/R switch; comprising:
code for connecting transmit signals received at a second switch terminal to a first switch terminal in a transmit state;
code for isolating switch receiver terminals in the transmit state;
code for causing short circuiting of a transmitter connected to the second switch terminal in a receive state; and code for passing received signals from the first switch terminal and the second switch terminal to the receiver terminals in the receive state.
According to a sixth aspect the present invention provides a computer program for operating a transceiver, comprising:
code for connecting transmit signals of a transmitter from a second switch terminal to a first switch terminal in a transmit state;
code for isolating switch receiver terminals in the transmit state;
code for short circuiting the transmitter in a receive state, such that a received signal from the antenna is passed to the first switch terminal and via the short circuited transmitter to the second switch terminal; and code for connecting the first and second switch terminals to the receiver terminals such that the received signal is passed from the first and second switch terminals to the receiver terminals.
In preferred embodiments of the invention, the switch receiver terminals comprise a first switch receiver terminal and a second switch receiver terminal. In such embodiments of the invention, switching between the transmit state and the receive state is preferably balanced switching, such that switching transients appearing at the first switch receiver terminal are substantially equal to switching transients appearing at the second switch receiver terminal. Such embodiments enable common mode rejection of such switching transients in the receiver, thus providing for sensing of received signals to be achieved immediately after settling of major switching transients, and thus enabling short two way propagation time signals, such as reflections from

5 close targets, to be sensed.
In further preferred embodiments of the invention, a bypass circuit is incorporated between the first and second switch terminals on the one hand and the first and second receiver terminals on the other hand. Preferably, the bypass circuit is configured to minimise transmission of undesired low-frequency/long time constant signals caused by residual antenna transients to the receiver terminals, while allowing transmission of desired high-frequency signals such as target echoes to the receiver terminals. In preferred embodiments the bypass circuit minimises transmission of differential transient signals by damping residual currents caused by antenna relaxation.
The bypass circuit may comprise a diplexer, and may be tuneable. Additionally or alternatively, the bypass circuit may provide for imposing a delay before the first and second switch terminals are connected to the receiver terminals, the delay being sufficient to allow post-transmission differential transients to decay below a receiver saturation level.
In preferred embodiments of the invention, a controllable connection between the first switch terminal and the second switch terminal is provided by a first switch element and a second switch element in series and having a ground connection between the first switch element and the second switch element. Where the first switch terminal and second switch terminal are matched, such embodiments provide for balanced switching of the controllable connection between the first switch terminal and the second switch terminal.
To further provide balanced switching, a controllable connection between the first switch terminal and the first switch receiver terminal is preferably provided by a third switch element, and a controllable connection between the second switch terminal and the second switch receiver terminal is preferably provided by a fourth switch element, wherein the third switch element and the fourth switch element are matched.
In preferred embodiments, common mode switching transients may be substantially removed by use of a transformer, or by use of a differential amplifier.
The present invention recognises that, in designing a transceiver operable to both transmit and receive signals, it is desirable to use a T/R switch in order to enable a transmitter of the transceiver and a receiver of the transceiver to share a single antenna, thus realizing a monostatic system. Use of a single antenna ensures identical

6 transmitting and receiving beam shape, and further avoids the cost and increased physical size associated with providing two antennas. In applications such as borehole radar, size restrictions on the maximum dimensions of the radar device exist, and in such applications use of a single antenna can assist in meeting such restrictions. The mining environment also promotes the use of the shortest possible system. Thus, in preferred embodiments, a T/R
switch in accordance with the present invention is used to facilitate implementation of a mono static system, where the receiver and the transmitter use the same antenna.
In these systems, the time associated with switching from the transmit state to the receive state is typically significantly longer than the duration of the transmitted signal. This allows for frequency domain filtering to separate the switching signal, created by the T/R-switch, from the RF-signal to be detected.
Embodiments of the present invention may be used in implementing borehole radar, and in particular monostatic borehole radar using a single feedpoint antenna.
The antenna configuration may comprise a damped antenna, an undamped antenna, a symmetric antenna, an asymmetric antenna, a single feedpoint antenna and/or a double feedpoint antenna. A
mono static antenna as disclosed in International Application No PCT/AU02/001382 may be used.
In these and other embodiments, an antenna in conjunction with which the transmit/receive switch is used is preferably matched to an expected medium of propagation. For example, where it is anticipated that the borehole radar is to be used in an air-filled borehole, the antenna is preferably matched to air. The expected medium may additionally or alternatively comprise one or more of water, drilling fluid, or oil. By matching the antenna to the expected medium, reflections from the antenna and thus residual transients in the transmit switch may be minimised. Further, where expected use will occur in more than one medium, such as in a borehole partially filled with water, the antenna is preferably more closely matched to the medium of greater electrostatic susceptibility then to the medium of lesser electrostatic susceptibility, in order to reduce the worst case transients generated by the antenna's mismatch to each medium.
Preferably, the transmitter comprises an N-channel metal oxide semiconductor (NMOS) transistor, operable to produce transmit signals in the transmit state, and presenting a low impedance when the drain-source voltage is small, in the receive state.
4535782.1

7 A borehole radar embodying the present invention may be deployed in accordance with the teachings of Australian Provisional Application No. 2004906114.
A borehole radar embodying the present invention may be deployed in accordance with the teachings of Australian Provisional Application No. 2005900071.
Brief Description of the Drawings Examples of the invention will now be described with reference to the accompanying drawings in which:
Figures la and lb are schematics of a borehole radar transceiver in accordance with a first embodiment of the invention;
Figure 2 is a schematic of a borehole radar transceiver in accordance with a second embodiment of the invention;
Figure 3 is a circuit diagram of the borehole radar transceiver of Figure 2;
Figures 4a and 4b are schematics of a borehole radar transceiver in accordance with a third embodiment of the invention;
Figure 5 is a schematic of a borehole radar transceiver in accordance with a fourth embodiment of the invention;
Figure 6 is a circuit diagrams of the borehole radar transceiver of Figure 5;
and Figure 7 is a circuit diagrain of a borehole radar transceiver in accordance with a fifth embodiment of the invention.
Detailed Description of the Preferred Embodiments Figures la and lb are schematics of a mono static borehole radar transceiver 100 in accordance with a first embodiment of the invention. Transceiver 100 comprises an antenna 105, transmitter 110, transmit/receive (T/R) switch 120, and a receiver 130. A
first antenna terminal 106 is connected to a first switch terminal 121, and a second antenna terminal 107 is connected to a second transmitter terminal 111. A first transmitter terminal 112 is connected to a second switch terminal 122. First switch receiver terminal 123 and second switch receiver terminal 124 are connected to receiver 130.
Figure la illustrates transceiver 100 in a transmit state, in which second switch terminal 122 is connected to first switch terminal 121 due to switching means 125 being closed. Switches 126 and 127 are open thus isolating switch receiver terminals 123 and 124, and thus isolating receiver 130 in the transmit state. As receiver 130 7107816.1

8 would typically comprise high gain amplifiers, isolation is important during the production of high power signals by transmitter 110. The closing of switching means 125 during the transmit state allows signals produced by transmitter 110 to be transmitted by antenna 105.
Figure lb illustrates transceiver 100 in a receive state, wherein electromagnetic signals detected by antenna 105 are passed to receiver 130. Transmitter 110 has been short circuited such that signals from second antenna terminal 107 are passed to second switch terminal 122. Opening of switching means 125, and closing of switching means 126 and switching means 127, permits received signals to pass from first switch terminal 121 to first receiver terminal 123, and from second switch terminal 122 to second receiver terminal 124. Thus, in the receive state, transceiver 100 passes received signals to receiver 130.
Figure 2 is a schematic of a monostatic borehole radar transceiver 200 in accordance with a second embodiment of the invention. The antenna 210 has a first terminal Al and a second terminal A2, transmitter 220 has a first terminal TX1 and a second terminal TX2 and T/R-switch has two input terminals TR1 and TR2. Al is connected to TR1, TR2 is connected to TX2, and TX1 is connected to A2. The T/R-switch is also connected to the input terminals RX1 and RX2 of the receiver 240. The T/R-switch has a pair of identical shunt switches P1 and P2 and a pair of identical series switches Si and S2. P1 is connected between TR1 and ground, while P2 is connected between TR2 and ground. S1 is connected between TR1 and RX1, while is connected between TR2 and RX2.
When the transceiver 200 is in a transmit state, the shunt switches P1 and P2 are on and thus in a low impedance state, and the series switches Si and S2 are off, in a high impedance state. This effectively connects TX2 to Al and disconnects RX1 and RX2 from Al and TX2 respectively. The transmitter 220 consequently drives the antenna 210 directly and the receiver 240 is isolated in two stages.
In the receive state, shunt switches P1 and P2 are off, in a high impedance state, and the series switches Si and S2 are on, in a low impedance state. The transmitter 220 is in a low RF impedance state so that A2 appears to be connected to TR2.
Thus, RX1 is effectively connected to Al and RX2 is effectively connected to A2. The antenna 210 consequently drives the receiver 240 directly with minimum loss in the transmitter 240 and T/R-switch.
Switching the switches PI, P2, S1 and S2 between low and high impedance states introduces switching transients into the signal path. Such switching transients

9 have sufficient amplitude to cause prolonged saturation of the input amplifiers of receiver 240 if applied directly to the receiver's input.
Further, it is desirable for the T/R-switch to be able to switch the transceiver 200 from the transmit state to the receive state in a time comparable to the duration of the signal transmitted and received on the antenna 210, in order for the receiver 240 to discern close-in targets. This causes the frequency spectrum of the switching transients to overlap that of the signal received on the antenna 210. Consequently the signal received on the antenna 210 cannot be separated from the switching transient by frequency domain filtering.
Accordingly, in the present exemplary embodiment, shunt switch P1 is operated so that the transient it creates on TR1 relative to ground is substantially identical to the transient created by shunt switch P2 on TR2 relative to ground. Similarly, series switch Si is operated so that the transient it creates between TR1 and RX1 is substantially identical to the transient created by series switch S2 between TR2 and RX2.
Such switching causes the transient observed on RX1 relative to ground to be substantially identical to that observed on RX2 relative to ground. The large switching transient is thus made to be a substantially common mode event and consequently the receiver 240 which detects the differential mode signal between RX1 and RX2, is substantially protected from saturation.
Figure 3 is a circuit diagram of the monostatic borehole radar transceiver of Figure 2. The transmitter 220 comprises an N-channel metal oxide semiconductor (NMOS) transistor QTX connected to a DC power supply VCC1 through resistor RTX.
A control voltage TX-CTRL is applied between the gate and source of QTX. The drain of QTX is at a voltage level close to that of VCC1 in the steady state condition, where the transmitter's control voltage TX-CTRL is zero.
The gate voltage of QTX rises rapidly relative to the source voltage during transmit mode. This causes QTX to create a sharp falling voltage transient between terminals TX1 and TX2 (QTX drain-source voltage). The equivalent drain-source impedance of QTX is then very low and remains in this state during the receive mode, which commences after the sharp falling transient has been generated. The transmitter 220 is allowed to recover to its steady state condition upon completion of the receive state.
The second terminal TR2 of T/R switch 230 is connected to TX2 of the transmitter, and the first input terminal TR1 of T/R switch 230 is connected to an antenna terminal Al. Transformer TF1 allows the T/R-switch 230 and transmitter to have a common ground, even though the signal monitored by the T/R-switch 230 is superimposed on the drain voltage of transistor QTX.
The two shunt switches P1 and P2 of Figure 2 are realized by two identical NMOS transistors Q1 and Q2, with their drains connected to nodes TR1A and TR2A, 5 respectively, and to a second, common DC power supply VCC2 through two identical resistors R1 and R2, respectively. The sources of Q1 and Q2 are connected to the ground of the T/R-switch 230. The single control voltage TR-CTRL of the T/R-switch 230 is applied to the gates of both Q1 and Q2.
Two identical Schottky diodes D1 and D2 and two identical resistors R3 and R4

10 are used to implement the series switches Si and S2 of Figure 2. The anodes of D1 and D2 are connected to nodes TR1A and TR2A, respectively. The cathodes of D1 and are in turn connected to a third, common DC power supply VCC3 through R3 and R4, respectively. The node at the cathode of D1 is TR1B and the node at the cathode of D2 is TR2B. The voltage level of VCC3 is slightly higher than the anticipated voltage levels associated with leakage from the transmitted pulse through to TR1A and TR1B, and is significantly lower than the voltage of VCC2.
A positive voltage higher than the gate-source threshold voltage of the NMOS
transistors Q1 and Q2 is applied to the control voltage input TR-CTRL of the T/R-switch 230 during the transmit state. This causes Q1 and Q2 to enter a low drain-source impedance state and the voltages on nodes TR1A and TR2A (being the drain voltages of Q1 and Q2) will drop substantially simultaneously to a value close to zero, below VCC3. These voltage drops cause D1 and D2 to substantially simultaneously become reverse biased, and thus present a high impedance. This combination of the low impedance between TR1A and TR2A, the high impedance between TR1A and TR1B and the high impedance between TR2A and TR2B isolates the receiver 240 from the transmitted pulse. The impedance seen between TR1 and TR2 is close to zero so that TX2 is in effect directly connected to Al. TX1 is already hard wired to A2. The transient generated by the transmitter 220 between TX1 and TX2 will therefore be applied to and radiated by the antenna 210.
The control voltage TR-CTRL of the T/R-switch 230 is reduced to zero soon after the transmitter 220 radiates the voltage transient on the antenna 210, to initiate the receive state. This causes the drain-source impedance of Q1 and Q2 to rise and the voltages on TR1A and TR2A to recover concurrently to a value slightly higher than VCC3. At this point D1 and D2 become conducting substantially simultaneously and enter a low impedance state. This causes the quiescent voltage at TR1A to rise further to a bias point determined by VCC2, VCC3, R1, R3 and the forward voltage of Dl.

11 The quiescent voltage at TR2A rises to substantially the same bias point, determined by VCC2, VCC3, R2, R4 and the forward voltage of D2. The resultant high impedance between TR1A and TR2A, the low impedance between TR1A and TR1B and the low impedance between TR2A and TR2B allows a differential signal to pass through with minimum loss from the input TR1, TR2 to the output RX1, RX2 of the T/R-switch 230.
The low output impedance of the NMOS transistor QTX of the transmitter 220 during the receive state effectively connects TR2 to A2. TR1 is already hard wired to the Al. The signal received on the antenna Al, A2 is therefore passed through to the receiver terminals RX1, RX2 with minimum loss.
The synchronous switching action of Q1 and Q2 causes substantially identical switching transient waveforms on TR1A and TR2A relative to ground. D1 is consequently activated in a substantially identical manner as D2 and similar waveforms are generated between TR1A and TR1B and between TR2A and TR2B. The waveform observed on TR1B relative to ground is therefore substantially identical to that observed on TR2B relative to ground, and thus switching transients are controlled to be a common mode signal. As transformer TF2 can only couple a differential signal from its primary winding to its secondary winding, the common mode switching transients are rejected whereas the differential signal applied between TR1C and TR2C
passes through TF2 to terminals RX1 and RX2.
The parasitic reactance of the devices used in this embodiment limits the bandwidth and phase response of the differential path of the T/R switch 230 in receive mode. The main contributors of parasitic reactance are the drain-source capacitance of the NMOS transistors Q1 and Q2 and the leakage inductance of the transformers and TF2. The inclusion of Li, Cl and C2 compensates for the parasitic reactance of Ql, Q2 and TF2 in a second order, flat phase, band pass filter, to ensure a controlled frequency response. The T/R-switch 230 then combines with the receiver to create a path with fixed characteristic impedance, in the pass band.
The value of R1 and R2 and the value of R3 and R4 are compromises between minimum loss in the differential path of the T/R-switch 230, quick recovery time of the respective drain voltages of Q1 and Q2 as well as sufficient bias current for D1 and D2.
While the embodiment of the invention set out in Figure 3 and described in the preceding operates in a desired manner, particularly when the antenna Al, A2 is in an air environment, it has been recognised that immersion of antenna Al, A2 in a high-susceptibility electrically polarizable medium, such as water, drilling fluid or oil, can cause performance degradation. It has further been recognised that this degradation arises for the following reasons. Prior to closing of switch QTX, the antenna Al, A2 is

12 charged to a high energy state in preparation for electromagnetic (EM) pulse radiation.
When QTX closes, the desired EM pulse is promptly radiated by the antenna Al, A2.
Thereafter the antenna Al, A2 discharges or relaxes electroquasistatically by means of a residual current flowing through the primary winding of TF1, between arms Al and A2. This residual current induces a secondary current in the low resistance loop created by the secondary winding of transformer TF1 and the two switches Q1 and Q2 in their low impedance state. No signal is produced at the output of the TR
switch, while switches D1 and D2 are open with the TR switch in transmit mode or isolate mode.
When switches Q1 and Q2 start opening, the stored energy in the circulating secondary current excites the high Q parallel LC resonant circuit formed by the parasitic capacitances of Q1 and Q2 and the inductor Li. When the switches D1 and D2 close about 5Ons later a damped differential transient is passed to the receiver cascade. It has further been recognised that the damped differential transient will be small enough not to saturate the receiver chain, provided the amplitude of the residual secondary current has decayed sufficiently before the TR switch 230 leaves the transmit state to enter the receive state.
Importantly, the differential transient is generated by the antenna. It is fundamentally dependent on antenna capacitance. Notably, antenna capacitance, and thus potential energy stored on the antenna, is significantly increased when the antenna is immersed in a high-susceptibility electrically polarizable medium, and the associated significant increase in electroquasistatic (EQS) charge relaxation time.
However, it has been realised that the amplitude of the differential transient may be substantially reduced by incorporating a low-frequency bypass circuit in the T/R switch, as exemplified by the embodiments of Figures 4 to 7.
Figures 4a and 4b are schematics of a mono static borehole radar transceiver in accordance with a first embodiment of the invention. Transceiver 400 comprises an antenna 405, transmitter 410, transmit/receive (T/R) switch 420, and a receiver 430. A
first antenna terminal 406 is connected to a first switch terminal 421, and a second antenna terminal 407 is connected to a second transmitter terminal 411. A
first transmitter terminal 412 is connected to a second switch terminal 422. First switch receiver terminal 423 and second switch receiver terminal 424 are connected to receiver 430.
Figure 4a illustrates transceiver 400 in a transmit state, in which second switch terminal 422 is connected to first switch terminal 421 via bypass circuit 428 due to switching means 425 being closed. Switches 426 and 427 are open thus isolating

13 switch receiver terminals 423 and 424, and thus isolating receiver 430 in the transmit state. As receiver 430 would typically comprise high gain amplifiers, isolation is important during the production of high power signals by transmitter 410. The closing of switching means 425 during the transmit state allows signals produced by transmitter 410 to be transmitted by antenna 405. Following such transmission, bypass circuit 428 acts to damp residual currents caused by relaxation of antenna 405.
Figure 4b illustrates transceiver 400 in a receive state, wherein electromagnetic signals detected by antenna 405 are passed to receiver 430. Transmitter 410 has been short circuited such that signals from second antenna terminal 407 are passed to second switch terminal 422.
Opening of switching means 425, and closing of switching means 426 and switching means 427, permits received signals to pass from first switch terminal 421 to first receiver terminal 423, and from second switch terminal 422 to second receiver terminal 424, via bypass circuit 428. Thus, in the receive state, transceiver 400 passes received signals to receiver 430.
Figure 5 is a schematic of a monostatic borehole radar transceiver 500 in accordance with a second embodiment of the invention. The antenna 510 has a first terminal A51 and a second terminal A52, transmitter 520 has a first terminal TX51 and a second terminal TX52 and T/R-switch has two input terminals TR51 and TR52. A51 is connected to TR51, TR52 is connected to TX52, and TX51 is connected to A52. The T/R-switch is also connected to the input terminals RX51 and RX52 of the receiver 540. The T/R-switch has a pair of identical shunt switches P51 and P52 and a pair of identical series switches S51 and S52. P51 is connected between TR51 and ground via bypass circuit 550, while P52 is connected between TR52 and ground via bypass circuit 550. S51 is connected between TR51 and RX51 via bypass circuit 550, while S52 is connected between TR52 and RX52 via bypass circuit 550.
When the transceiver 500 is in a transmit state, the shunt switches P51 and P52 are on and thus in a low impedance state, and the series switches S51 and S52 are off, in a high impedance state. This effectively connects TX52 to A51 via bypass circuit 550 and disconnects RX51 and RX52 from A51 and TX52 respectively. The transmitter 520 consequently drives the antenna 510 directly and the receiver 540 is isolated in two stages.
Following transmission, bypass circuit 550 acts to damp residual currents caused by relaxation of antenna 510, prior to switching the circuit 500 to a receive state. The bypass circuit 550 imposes resistive damping to dissipate the residual transient, while having a minimal effect on insertion loss to the receiver.
In the receive state, shunt switches P51 and P52 are off, in a high impedance state, and the series switches S51 and S52 are on, in a low impedance state. The

14 transmitter 520 is in a low RF impedance state so that A52 appears to be connected to TR52. Thus, RX51 is effectively connected to A51 and RX52 is effectively connected to A52. The antenna 510 consequently drives the receiver 540 directly with minimum loss in the transmitter 540 and T/R-switch.
Switching the switches P51, P52, S51 and S52 between low and high impedance states introduces switching transients into the signal path. Such switching transients have sufficient amplitude to cause prolonged saturation of the input amplifiers of receiver 540 if applied directly to the receiver's input.
Further, it is desirable for the T/R-switch to be able to switch the transceiver 500 from the transmit state to the receive state in a time comparable to the duration of the signal transmitted and received on the antenna 510, in order for the receiver 540 to discern close-in targets. This causes the frequency spectrum of the switching transients to overlap that of the signal received on the antenna 510. Consequently the signal received on the antenna 510 cannot be separated from the switching transient by frequency domain filtering.
Accordingly, in the embodiment of Figure 5, shunt switch P51 is operated so that the transient it creates on TR51 relative to ground is substantially identical to the transient created by shunt switch P52 on TR52 relative to ground. Similarly, series switch S51 is operated so that the transient it creates between TR51 and RX51 is substantially identical to the transient created by series switch S52 between TR52 and RX52. Such switching causes the transient observed on RX51 relative to ground to be substantially identical to that observed on RX52 relative to ground. The large switching transient is thus made to be a substantially common mode event and consequently the receiver 540 which detects the differential mode signal between RX51 and RX52, is substantially protected from saturation.
Figure 6 is a circuit diagram of the monostatic borehole radar transceiver of Figure 5. The transmitter 620 comprises an N-channel metal oxide semiconductor (NMOS) transistor QTX6 connected to a DC power supply VCC61 through resistor RTX6 A control voltage TX-CTRL6 is applied between the gate and source of QTX6.
The drain of QTX6 is at a voltage level close to that of VCC61 in the steady state condition, where the transmitter's control voltage TX-CTRL6 is zero.
The gate voltage of QTX6 rises rapidly relative to the source voltage during transmit mode. This causes QTX6 to create a sharp falling voltage transient between terminals TX61 and TX62 (QTX6 drain-source voltage). The equivalent drain-source impedance of QTX6 is then very low and remains in this state during the receive mode, which commences after the sharp falling transient has been generated. The transmitter 620 is allowed to recover to its steady state condition upon completion of the receive state.
The second terminal TR62 of T/R switch 630 is connected to TX62 of the transmitter 620, and the first input terminal TR61 of T/R switch 630 is connected to an 5 antenna terminal A61. Transformer TF61 allows the T/R-switch 630 and transmitter 620 to have a common ground, even though the signal monitored by the T/R-switch 630 is superimposed on the drain voltage of transistor QTX6.
The two shunt switches S51, S52 of Figure 5 are realized by two identical NMOS transistors Q61 and Q62, with their drains connected to nodes TR61A and 10 TR62A, respectively, and to a second, common DC power supply VCC62 through two identical resistors R61 and R62, respectively. The sources of Q61 and Q62 are connected to the ground of the T/R-switch 630. The single control voltage TR-of the T/R-switch 630 is applied to the gates of both Q61 and Q62.
Two identical PIN diodes D61 and D62 and two identical resistors R63 and R64

15 are used to implement the series switches S61 and S62 of Figure 5.
The anodes of D61 and D62 are connected to nodes TR61A and TR62A, respectively. The cathodes of D61 and D62 are in turn connected to a third, common DC power supply VCC63 through R63 and R64, respectively. The node at the cathode of D61 is TR61B and the node at the cathode of D62 is TR62B. The voltage level of VCC63 is slightly higher than the anticipated voltage levels associated with leakage from the transmitted pulse through to TR61A and TR61B, and is significantly lower than the voltage of VCC62.
A positive voltage higher than the gate-source threshold voltage of the NMOS
transistors Q61 and Q62 is applied to the control voltage input TR-CTRL6 of the T/R-switch 630 during the transmit state. This causes Q61 and Q62 to enter a low drain-source impedance state and the voltages on nodes TR61A and TR62A (being the drain voltages of Q61 and Q62) will drop substantially simultaneously to a value close to zero, below VCC63. These voltage drops cause D61 and D62 to substantially simultaneously become reverse biased, and thus present a high impedance. This combination of the low impedance between TR61A and TR62A, the high impedance between TR61A and TR61B and the high impedance between TR62A and TR62B
isolates the receiver 640 from the transmitted pulse. The impedance seen between TR61 and TR62 is close to zero so that TX62 is in effect directly connected to A61.
TX61 is already hard wired to A62. The transient generated by the transmitter between TX61 and TX62 will therefore be applied to and radiated by the antenna 610.
The control voltage TR-CTRL6 of the T/R-switch 630 is reduced to zero soon after the transmitter 620 radiates the voltage transient on the antenna 610, to initiate the

16 receive state. This causes the drain-source impedance of Q61 and Q62 to rise and the voltages on TR61A and TR62A to recover concurrently to a value slightly higher than VCC63. At this point D61 and D62 become conducting substantially simultaneously and enter a low impedance state. This causes the quiescent voltage at TR61A to rise further to a bias point determined by VCC62, VCC63, R61, R63 and the forward voltage of D61. The quiescent voltage at TR62A rises to substantially the same bias point, determined by VCC62, VCC63, R62, R64 and the forward voltage of D62.
The resultant high impedance between TR61A and TR62A, the low impedance between TR61A and TR61B and the low impedance between TR62A and TR62B allows a differential signal to pass through with minimum loss from the input TR61, TR62 to the output RX61, RX62 of the T/R-switch 630.
The low output impedance of the NMOS transistor QTX6 of the transmitter 620 during the receive state effectively connects TR62 to A62. TR61 is already hard wired to A61. The signal received on the antenna A61, A62 is therefore passed through to the receiver terminals RX61 and RX62 with minimum loss.
The synchronous switching action of Q61 and Q62 causes substantially identical switching transient waveforms on TR61A and TR62A relative to ground. D61 is consequently activated in a substantially identical manner as D62 and similar waveforms are generated between TR61A and TR61B and between TR62A and TR62B. The waveform observed on TR61B relative to ground is therefore substantially identical to that observed on TR62B relative to ground, and thus switching transients are controlled to be a common mode signal. As transformer TF62 can only couple a differential signal from its primary winding to its secondary winding, the common mode switching transients are rejected whereas the differential signal applied between TR61C and TR62C passes through TF62 to terminals RX61 and RX62.
The parasitic reactance of the devices used in this embodiment limits the bandwidth and phase response of the differential path of the T/R switch 630 in receive mode. The main contributors of parasitic reactance are the drain-source capacitance of the NMOS transistors Q61 and Q62 and the leakage inductance of the transformers TF61 and TF62. The inclusion of L61, C61 and C62 compensates for the parasitic reactance of Q61, Q62 and TF62 in a second order, flat phase, band pass filter, to ensure a controlled frequency response. The T/R-switch 630 then combines with the receiver to create a path with fixed characteristic impedance, in the pass band.
The value of R61 and R62 and the value of R63 and R64 are compromises between minimum loss in the differential path of the T/R-switch 630, quick recovery

17 time of the respective drain voltages of Q61 and Q62 as well as sufficient bias current for D61 and D62.
T/R switch 630 further includes a bypass circuit comprising resistors RD62, RD61, and capacitors CD61, CD62, CD63. Following transmission by antenna A61, A62, the bypass circuit damps residual currents caused by relaxation of antenna A61, A62.
Figure 7 is a circuit diagram of a further embodiment of the present invention.
The transmitter 720 comprises an N-channel metal oxide semiconductor (NMOS) transistor QTX7 connected to a DC power supply VCC71 through resistor RTX7 A
control voltage TX-CTRL7 is applied between the gate and source of QTX7. The drain of QTX7 is at a voltage level close to that of VCC71 in the steady state condition, where the transmitter's control voltage TX-CTRL7 is zero.
The gate voltage of QTX7 rises rapidly relative to the source voltage during transmit mode. This causes QTX7 to create a sharp falling voltage transient between terminals TX71 and TX72 (QTX7 drain-source voltage). The equivalent drain-source impedance of QTX7 is then very low and remains in this state during the receive mode, which commences after the sharp falling transient has been generated. The transmitter 720 is allowed to recover to its steady state condition upon completion of the receive state.
The second terminal TR72 of T/R switch 730 is connected to TX72 of the transmitter 720, and the first input terminal TR71 of T/R switch 730 is connected to an antenna terminal A71. Transformer TF71 allows the T/R-switch 730 and transmitter 720 to have a common ground, even though the signal monitored by the T/R-switch 730 is superimposed on the drain voltage of transistor QTX7.
Two shunt switches are realized by two identical NMOS transistors Q71 and Q72, with their drains connected to nodes TR71A and TR72A, respectively, and to a second, common DC power supply VCC72 through two identical resistors R75 and R76, respectively. The sources of Q71 and Q72 are connected to the ground of the T/R-switch 730. The single control voltage TR-CTRL7 of the T/R-switch 730 is applied to the gates of both Q71 and Q72.
Two identical Schottky or PIN diodes D73 and D74 and two identical inductors L73 and L74 are used to implement series switches. The anodes of D73 and D74 are connected to nodes TR71A and TR72A, respectively. The cathodes of D73 and D74 are in turn connected to a third, common DC power supply VCC74 through L73 and L74, respectively. The node at the cathode of D73 is TR71B and the node at the cathode of D74 is TR72B. The voltage level of VCC74 is slightly higher than the

18 anticipated voltage levels associated with leakage from the transmitted pulse through to TR71A and TR71B, and is significantly lower than the voltage of VCC72.
A positive voltage higher than the gate-source threshold voltage of the NMOS
transistors Q71 and Q72 is applied to the control voltage input TR-CTRL7 of the T/R-switch 730 during the transmit state. This causes Q71 and Q72 to enter a low drain-source impedance state and the voltages on nodes TR71A and TR72A (being the drain voltages of Q71 and Q72) will drop substantially simultaneously to a value close to zero, below VCC74. These voltage drops cause D73 and D74 to substantially simultaneously become reverse biased, and thus present a high impedance. This combination of the low impedance between TR71A and TR72A, the high impedance between TR71A and TR71B and the high impedance between TR72A and TR72B
isolates the receiver 740 from the transmitted pulse. The impedance seen between TR71 and TR72 is close to zero so that TX72 is in effect directly connected to A71.
TX71 is already hard wired to A72. The transient generated by the transmitter between TX71 and TX72 will therefore be applied to and radiated by the antenna 710.
The control voltage TR-CTRL7 of the T/R-switch 730 is reduced to zero soon after the transmitter 720 radiates the voltage transient on the antenna 710, to initiate the receive state. This causes the drain-source impedance of Q71 and Q72 to rise and the voltages on TR71A and TR72A to recover concurrently to a value slightly higher than VCC74. At this point D73 and D74 become conducting substantially simultaneously and enter a low impedance state. This causes the quiescent voltage at TR71A to rise further to a bias point determined by VCC72, VCC74, R75, L73 and the forward voltage of D73. The quiescent voltage at TR72A rises to substantially the same bias point, determined by VCC72, VCC74, R76, L74 and the forward voltage of D74.
The resultant high impedance between TR71A and TR72A, the low impedance between TR71A and TR71B and the low impedance between TR72A and TR72B allows a differential signal to pass through with minimum loss from the input TR71, TR72 to the output RX71, RX72 of the T/R-switch 730.
The low output impedance of the NMOS transistor QTX7 of the transmitter 720 during the receive state effectively connects TR72 to A72. TR71 is already hard wired to A71. The signal received on the antenna A71, A72 is therefore passed through to the receiver terminals RX71 and RX72 with minimum loss.
The synchronous switching action of Q71 and Q72 causes substantially identical switching transient waveforms on TR71A and TR72A relative to ground. D73 is consequently activated in a substantially identical manner as D74 and similar waveforms are generated between TR71A and TR71B and between TR72A and

19 TR72B. The waveform observed on TR71B relative to ground is therefore substantially identical to that observed on TR72B relative to ground, and thus switching transients are controlled to be a common mode signal. As transformer TF72 can only couple a differential signal between its primary winding and its secondary winding, the common mode switching transients are rejected whereas the differential signal applied between TR71C and TR72C passes through TF72 to terminals RX71 and RX72.
The parasitic reactance of the devices used in this embodiment limits the bandwidth and phase response of the differential path of the T/R switch 730 in receive mode. The main contributors of parasitic reactance are the drain-source capacitance of the NMOS transistors Q71 and Q72 and the leakage inductance of the transformers TF71 and TF72.
In contrast to the embodiment of Figure 6, in switch 700 inductor L75 is positioned on a downstream side of capacitors C73, C74. This location of L75 is precautionary should there be energy transmitted through switch 700. Further, inductors L73 and L74 are used in place of resistors. The inclusion of L73, L74, L75, C73 and C74 implements a fourth order filter, as opposed to the second order filter provided by L61, C61 and C62 in the embodiment of Figure 6, and compensates for the parasitic reactance of Q71, Q72 and TF72 to ensure a controlled frequency response.
The fourth order filter further reduces the amplitude of low frequency differential transients. The T/R-switch 730 then combines with the receiver to create a path with fixed characteristic impedance, in the pass band.
The value of R75 and R75 and the value of L73 and L74 are compromises between minimum loss in the differential path of the T/R-switch 730, quick recovery time of the respective drain voltages of Q71 and Q72 as well as sufficient bias current for D73 and D73.
T/R switch 730 further includes a bypass circuit comprising resistors RD72, RD71, and capacitors CD71, CD72, CD73. Following transmission by antenna A71, A72, the bypass circuit damps residual currents caused by relaxation of antenna A71, A72.
Thus, the exemplary embodiments relate to a duplexer or transmit/receive switch (T/R-switch) that enables a transmitter and a receiver to use the same antenna.
The T/R-switch of these embodiments has sufficient instantaneous bandwidth and linearity in its phase response to function in a pulse system without compromising the pulse shape, range or resolution of the system. The T/R-switch in accordance with such embodiments of the invention provides adequate isolation between the transmitted pulse and the receiver during transmit-mode to prevent the receiver from saturating for prolonged periods. Further, the loss introduced by the T/R-switch between the antenna and the receiver in receive-mode is small enough to avoid substantial reduction in the signal to noise ratio, which would otherwise reduce the range of the system.
In the present embodiments, the T/R-switch possesses the ability to switch from 5 maximum isolation in the transmit state to minimum attenuation in the receive state in a time comparable to the transmission process, in order to enable the receiver to record reflections from close-in targets.
Notably, in the present embodiments the T/R-switch and transmitter are inserted in front of the receiver, in the receiver path. In a transmit state, the T/R-switch is 10 responsible for isolating the receiver from the transmitted signal such that the energy from the transmitted pulse is substantially radiated by the antenna. In the receive state, the transmitter itself presents a radio frequency (RF) short circuit, thus substantially preventing echoed or reflected signals collected by the antenna from dissipating in the transmitter circuitry. Simultaneously the T/R-switch ensures that the received signals 15 are delivered to the receiver with minimal dissipation.
Thus, the T/R switch of the preferred embodiments relates to transceivers in which a transmit/receive switch connects an antenna to the transmitter while transmitting a signal and connects the same antenna to the receiver while receiving the reflected signal.

20 The described embodiments of the invention specifically relate to a T/R-switch with wide instantaneous bandwidth, such as a pulsed system where the delay between the radiation of the transmitted signal and the detecting of the reflected signal is comparable to the duration of the transmission process. -The bypass circuit enables the T/R switch to be relatively unaffected by changes in the antenna impedance due to changing conditions in the surrounding medium.
The receiver used in conjunction with the transmit receive switch of any of the previously described embodiments may comprise an analogue to digital converter (ADC) to allow digital sampling of a received signal. Preferably, a sensitivity time control (STC) and/or automatic gain control (AGC) is provided upstream of the STC
and/or AGC to match the received analogue signal to the dynamic range of the ADC.
Use of a soft limiter in the receiver is also preferable due to the possibility of large transient signals. A first order high pass filter may be implemented by use of an inductor across the input of the STC or AGC, in order to speed recovery of the receiver electronics during decay of differential transients caused by antenna relaxation. Such differential transients can have substantial low frequency components outside a

21 frequency band of interest, and thus a high pass filter at the input to the STC or AGC
assists in removing such low frequency components.
While the present embodiments have been described with reference to a ground penetrating monostatic radar for use in a borehole environment, it is to be appreciated that devices embodying the invention may have application elsewhere. For example, in borehole radar, perimeter and area surveillance such as radar arrays mounted on fence posts or poles using directional antennas such as Hertz parabolic cylinders, surface ground penetrating radar, airborne ground penetrating radar, impulse response measurements, and other pulsed imaging systems, such as MM, time domain reflectometry, and non-destructive testing.

Claims (31)

CLAIMS:

1. A transmit/receive (T/R) switch comprising:
a first switch terminal for connection to a first terminal of an antenna;
a second switch terminal for connection to a first terminal of a transmitter;
and switch receiver terminals for connection to a receiver;
wherein the T/R switch is operable to implement a transmit state by connecting transmit signals from the second switch terminal to the first switch terminal, and by isolating the switch receiver terminals;
wherein the T/R switch is operable to implement a receive state by causing short circuiting of a transmitter connected to the second switch terminal such that signals from a second terminal of an antenna may be received at the second switch terminal via the short circuited transmitter; and wherein in the receive state the T/R switch is operable to pass signals received at the first switch terminal and the second switch terminal to the receiver terminals.

2. The T/R switch of claim 1, further comprising a bypass circuit between the first switch terminal and the second switch terminal on the one hand and the switch receiver terminals on the other hand, wherein the bypass circuit is configured to minimise transmission of undesired low-frequency/long time constant signals to the receiver terminals, while allowing transmission of desired high-frequency signals to the receiver terminals.

3. The T/R switch of claim 2 wherein the bypass circuit is configured to minimise transmission of differential transient signals by damping residual currents caused by antenna relaxation.

4. The T/R switch of claim 2 or claim 3 wherein the bypass circuit is a diplexer.

5. The T/R switch of any one of claims 2 to 4 wherein the bypass circuit is tuneable.

6. The T/R switch of any one of claims 2 to 5 wherein the bypass circuit is configured to impose a delay before the first and second switch terminals are connected to the receiver terminals, the delay being sufficient to allow post-transmission differential transients to decay below a receiver saturation level.

7. The T/R switch of any one of claims 1 to 6 wherein switching between the transmit state and the receive state is balanced switching for common mode rejection of switching transients.

8. The T/R switch of claim 7 wherein the balanced switching is provided by a controllable connection between the first switch terminal and the second switch terminal comprising a first switch element and a second switch element matched and in series, and having a ground connection between the first switch element and the second switch element.

9. The T/R switch of claim 7 or claim S wherein the balanced switching is provided by a third switch between the first switch terminal and the receiver terminals, and a fourth switch matched to the third switch between the second switch terminal and the receiver terminals.

10. The T/R switch of any one of claims 1 to 9, further comprising a transformer across the receiver terminals to remove common mode switching transients.

11. The T/R switch of any one of claims 1 to 9, further comprising a differential amplifier at the receiver terminals to remove common mode switching transients.

12. A transceiver comprising:
an antenna for transmitting and receiving signals, having a first antenna terminal and a second antenna terminal;
a transmitter for producing transmit signals in a transmit state and operable to be short circuited in a receive state, the transmitter having a first transmitter terminal and a second transmitter terminal;
a receiver for receiving signals from the antenna; and a transmit/receive (T/R) switch according to any one of claims 1 to 11.

13. The transceiver of claim 12, wherein the transmitter comprises an N-channel metal oxide semiconductor (NMOS) transistor.

14. The transceiver of claim 12 or claim 13, wherein the second antenna terminal comprises ground, such that the antenna is a single feedpoint antenna.

15. The transceiver of claim 12 or claim 13, wherein the antenna comprises one of a damped antenna, an undamped antenna, a symmetric antenna, an asymmetric antenna, and a double feedpoint antenna.

16. The transceiver of any one of claims 12 to 15, wherein the antenna is matched to an expected medium of propagation.

17. The transceiver of any one of claims 12 to 15, wherein the antenna is matched more closely to a first expected medium of propagation having greater electrostatic susceptibility then to a second expected medium of propagation having lesser electrostatic susceptibility.

18. A method of operating a T/R switch, comprising:

in a transmit state connecting transmit signals received at a second switch terminal to a first switch terminal, and isolating switch receiver terminals; and in a receive state causing short circuiting of a transmitter connected to the second switch terminal, and passing received signals from the first switch terminal and the second switch terminal to the receiver terminals.

19. The method of claim 18, further comprising providing a bypass circuit between the first switch terminal and the second switch terminal on the one hand and the switch receiver terminals on the other hand, to minimise transmission of undesired low frequency/long time constant signals to the receiver terminals, while allowing transmission of desired high-frequency signals to the receiver terminals.

20. The method of claim 19 wherein the bypass circuit is configured to minimise transmission of differential transient signals by damping residual currents caused by antenna relaxation.

21. The method of claim 19 or claim 20 wherein the bypass circuit is a diplexer.

22. The method of any one of claims 19 to 21 comprising tuning the bypass circuit.

23. The method of any one of claims 18 to 22 comprising imposing a delay before connecting the first and second switch terminals to the receiver terminals, the delay being sufficient to allow post-transmission differential transients to decay below a receiver saturation level.

24. The method of any one of claims 18 to 23 comprising balanced switching of the T/R switch between the transmit state and the receive state, for co mm on mode rejection of switching transients.

25. The method of claim 24 wherein the balanced switching comprises substantially simultaneous switching of a first switch element and a second switch element matched and connected in series between the first switch terminal and the second switch terminal, and having a ground connection between the first switch element and the second switch element.

26. The method of claim 24 or claim 25 wherein the balanced switching comprises substantially simultaneous switching of a third switch between the first switch terminal and the receiver terminals, and a fourth switch matched to the third switch between the second switch terminal and the receiver terminals.

27. The method of any one of claims 18 to 26, further comprising providing a transformer across the receiver terminals to remove common mode switching transients.

28. The method of any one of claims 18 to 26, further comprising providing a differential amplifier at the receiver terminals to remove common mode switching transients.

29. A method of operating a transceiver, comprising:
in a transmit state, connecting transmit signals of a transmitter from a second switch terminal to a first switch terminal, and isolating switch receiver terminals;
and in a receive state, short circuiting the transmitter, passing a received signal from an antenna to the first switch terminal and via the short circuited transmitter to the second switch terminal, and passing the received signal from the first and second switch terminals to the receiver terminals.

30. A computer readable medium having recorded thereon computer executable instructions that, when executed on a computer, operate a T/R switch, the computer executable instructions comprising:
code for connecting transmit signals received at a second switch terminal to a first switch terminal in a transmit state;
code for isolating switch receiver terminals in the transmit state;
code for causing short circuiting of a transmitter connected to the second switch terminal in a receive state; and code for passing received signals from the first switch terminal and the second switch terminal to the receiver terminals in the receive state.

31. A computer readable medium having recorded thereon computer executable instructions that, when executed on a computer, operate a transceiver, the computer executable instructions comprising:
code for connecting transmit signals of a transmitter from a second switch terminal to a first switch terminal in a transmit state;
code for isolating switch receiver terminals in the transmit state;
code for short circuiting the transmitter in a receive state, such that a received signal from an antenna is passed to the first switch terminal and via the short circuited transmitter to the second switch terminal; and code for connecting the first and second switch terminals to the receiver terminals such that the received signal is passed from the first and second switch terminals to the receiver terminals.