CA2520421A1 - Vocoder asic - Google Patents

Abstract

A method and apparatus for implementing a vocoder in an application specific integrated circuit (ASIC) is disclosed. The apparatus contains a DSP core (4) that performs computations in accordance with a reduced instruction set (RISC) architecture. The circuit further comprises a specifically designed slave processor to the DSP
core (4) referred to as the minimization processor (6). The apparatus further comprises a specifically designed block normalization circuitry.

Claims (2)

1. A method for performing recursive convolution between a first sequence and a second sequence, comprising the steps of:
performing an initial convolution;
testing if a step index is even;
retrieving said first sequence from a first memory element;
retrieving said second sequence from a second memory element;
retrieving a partial convolution result from a third memory element when said step index is odd;
performing partial convolution in accordance with said retrieved first sequence, said retrieved second sequence and said retrieved partial convolution result;
storing the result of said partial convolution in said second memory element when said step index is odd; and processing the convolution result to minimize the difference between the sequences to render.

2. The method of Claim 1 further comprising the step of retrieving a previously generated convolution result from a circular buffer.