CA2465341A1 - Folded memory layers - Google Patents
Folded memory layers Download PDFInfo
- Publication number
- CA2465341A1 CA2465341A1 CA002465341A CA2465341A CA2465341A1 CA 2465341 A1 CA2465341 A1 CA 2465341A1 CA 002465341 A CA002465341 A CA 002465341A CA 2465341 A CA2465341 A CA 2465341A CA 2465341 A1 CA2465341 A1 CA 2465341A1
- Authority
- CA
- Canada
- Prior art keywords
- memory
- ribbon
- stack
- structures
- crossing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 abstract 3
- 238000003491 array Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 239000004020 conductor Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
- H10B99/10—Memory cells having a cross-point geometry
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Credit Cards Or The Like (AREA)
- Shaping Of Tube Ends By Bending Or Straightening (AREA)
- Insulated Conductors (AREA)
- Ropes Or Cables (AREA)
- Forging (AREA)
- Magnetic Heads (AREA)
- Supporting Of Heads In Record-Carrier Devices (AREA)
Abstract
In a ferroelectric or electret volumetric memory device with a memory material provided in sandwich between first and second electrode layers (2;4) with stripe-like electrodes forming word lines (2a) and bit lines (4a) of a matrix-addressable memory array (M), memory cells are defined in volumes of memory material in between two crossing word lines (2a) and bit lines (4a) and a plurality of memory arrays (M) are provided in a stacked arrangement. A
stack (S) of memory arrays (M) is formed by two or more ribbon-like structures (R), which are folded and/or braided into each other. Each ribbon-like structure (R) comprises a flexible substrate (3) of non-conducting material and at least one electrode layer (2,4) respectively provided on a surface of the substrate and comprising the parallel strip-like electrodes extending (2a,4a) along the ribbon-like structure (R). A layer of memory material (1) covers one of the electrode layers (2,4), whereby each memory array (M) of the stack (S) is formed by overlapping portions of a pair of adjacent ribbon-like structures (R
k, R k+1) crossing in substantially orthogonal relationship.
stack (S) of memory arrays (M) is formed by two or more ribbon-like structures (R), which are folded and/or braided into each other. Each ribbon-like structure (R) comprises a flexible substrate (3) of non-conducting material and at least one electrode layer (2,4) respectively provided on a surface of the substrate and comprising the parallel strip-like electrodes extending (2a,4a) along the ribbon-like structure (R). A layer of memory material (1) covers one of the electrode layers (2,4), whereby each memory array (M) of the stack (S) is formed by overlapping portions of a pair of adjacent ribbon-like structures (R
k, R k+1) crossing in substantially orthogonal relationship.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NO20015871A NO20015871D0 (en) | 2001-11-30 | 2001-11-30 | Memory device with braided layers |
| NO20015871 | 2001-11-30 | ||
| PCT/NO2002/000458 WO2003046924A1 (en) | 2001-11-30 | 2002-11-29 | Folded memory layers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2465341A1 true CA2465341A1 (en) | 2003-06-05 |
| CA2465341C CA2465341C (en) | 2006-05-16 |
Family
ID=19913088
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002465341A Expired - Fee Related CA2465341C (en) | 2001-11-30 | 2002-11-29 | Folded memory layers |
Country Status (13)
| Country | Link |
|---|---|
| EP (1) | EP1456850B1 (en) |
| JP (1) | JP2005510866A (en) |
| KR (1) | KR100603678B1 (en) |
| CN (1) | CN1596448A (en) |
| AT (1) | ATE309608T1 (en) |
| AU (1) | AU2002348540B2 (en) |
| CA (1) | CA2465341C (en) |
| DE (1) | DE60207298T2 (en) |
| DK (1) | DK1456850T3 (en) |
| ES (1) | ES2250724T3 (en) |
| NO (1) | NO20015871D0 (en) |
| RU (1) | RU2274913C2 (en) |
| WO (1) | WO2003046924A1 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6762950B2 (en) | 2001-11-30 | 2004-07-13 | Thin Film Electronics Asa | Folded memory layers |
| US7808024B2 (en) | 2004-09-27 | 2010-10-05 | Intel Corporation | Ferroelectric polymer memory module |
| JP4729989B2 (en) * | 2005-06-03 | 2011-07-20 | ソニー株式会社 | ANTENNA DEVICE, WIRELESS COMMUNICATION DEVICE, ITS CONTROL METHOD, COMPUTER-PROCESSED PROGRAM, AND RECORDING MEDIUM THEREOF |
| US7952525B2 (en) | 2005-06-03 | 2011-05-31 | Sony Corporation | Antenna device associated wireless communication apparatus and associated control methodology for multi-input and multi-output communication systems |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5969380A (en) * | 1996-06-07 | 1999-10-19 | Micron Technology, Inc. | Three dimensional ferroelectric memory |
| NO309500B1 (en) * | 1997-08-15 | 2001-02-05 | Thin Film Electronics Asa | Ferroelectric data processing apparatus, methods for its preparation and readout, and use thereof |
| NO308149B1 (en) * | 1998-06-02 | 2000-07-31 | Thin Film Electronics Asa | Scalable, integrated data processing device |
-
2001
- 2001-11-30 NO NO20015871A patent/NO20015871D0/en unknown
-
2002
- 2002-11-29 DK DK02782024T patent/DK1456850T3/en active
- 2002-11-29 AT AT02782024T patent/ATE309608T1/en not_active IP Right Cessation
- 2002-11-29 KR KR1020047008084A patent/KR100603678B1/en not_active IP Right Cessation
- 2002-11-29 CN CNA028238435A patent/CN1596448A/en active Pending
- 2002-11-29 CA CA002465341A patent/CA2465341C/en not_active Expired - Fee Related
- 2002-11-29 JP JP2003548255A patent/JP2005510866A/en not_active Abandoned
- 2002-11-29 DE DE60207298T patent/DE60207298T2/en not_active Expired - Fee Related
- 2002-11-29 ES ES02782024T patent/ES2250724T3/en not_active Expired - Lifetime
- 2002-11-29 RU RU2004119039/09A patent/RU2274913C2/en not_active IP Right Cessation
- 2002-11-29 EP EP02782024A patent/EP1456850B1/en not_active Expired - Lifetime
- 2002-11-29 WO PCT/NO2002/000458 patent/WO2003046924A1/en active IP Right Grant
- 2002-11-29 AU AU2002348540A patent/AU2002348540B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE60207298D1 (en) | 2005-12-15 |
| NO20015871D0 (en) | 2001-11-30 |
| JP2005510866A (en) | 2005-04-21 |
| DK1456850T3 (en) | 2006-03-20 |
| EP1456850A1 (en) | 2004-09-15 |
| DE60207298T2 (en) | 2006-07-20 |
| ATE309608T1 (en) | 2005-11-15 |
| CA2465341C (en) | 2006-05-16 |
| WO2003046924A1 (en) | 2003-06-05 |
| AU2002348540B2 (en) | 2007-02-15 |
| ES2250724T3 (en) | 2006-04-16 |
| RU2274913C2 (en) | 2006-04-20 |
| KR20040068557A (en) | 2004-07-31 |
| EP1456850B1 (en) | 2005-11-09 |
| CN1596448A (en) | 2005-03-16 |
| RU2004119039A (en) | 2006-01-10 |
| KR100603678B1 (en) | 2006-07-20 |
| AU2002348540A1 (en) | 2003-06-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKLA | Lapsed |