CA2428982A1 - Boundary addressable memory - Google Patents

Boundary addressable memory Download PDF

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Publication number
CA2428982A1
CA2428982A1 CA002428982A CA2428982A CA2428982A1 CA 2428982 A1 CA2428982 A1 CA 2428982A1 CA 002428982 A CA002428982 A CA 002428982A CA 2428982 A CA2428982 A CA 2428982A CA 2428982 A1 CA2428982 A1 CA 2428982A1
Authority
CA
Canada
Prior art keywords
bound value
bam
input data
addressable memory
upper bound
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002428982A
Other languages
French (fr)
Other versions
CA2428982C (en
Inventor
Alex Henderson
Walter Croft
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2428982A1 publication Critical patent/CA2428982A1/en
Application granted granted Critical
Publication of CA2428982C publication Critical patent/CA2428982C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Static Random-Access Memory (AREA)
  • Image Processing (AREA)
  • Logic Circuits (AREA)

Abstract

A boundary addressable memory (BAM) array comprises a plurality of BAM word modules, each BAM word module comprises a plurality of BAM cells for performing arithmetic comparisons between input data and an upper bound value and a lower bound value stored in each BAM cell to generate a matching signal indicating whether the input data is not greater than the upper bound value and not less than the lower bound value or whether the input data is not greater than the lower bound value and not less than the upper bound value.
CA002428982A 2000-11-07 2001-11-07 Boundary addressable memory Expired - Fee Related CA2428982C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US24679500P 2000-11-07 2000-11-07
US60/246,795 2000-11-07
PCT/US2001/046298 WO2002043069A2 (en) 2000-11-07 2001-11-07 Boundary addressable memory

Publications (2)

Publication Number Publication Date
CA2428982A1 true CA2428982A1 (en) 2002-05-30
CA2428982C CA2428982C (en) 2007-06-26

Family

ID=22932238

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002428982A Expired - Fee Related CA2428982C (en) 2000-11-07 2001-11-07 Boundary addressable memory

Country Status (4)

Country Link
CN (1) CN1329923C (en)
AU (1) AU2002239502A1 (en)
CA (1) CA2428982C (en)
WO (1) WO2002043069A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7035968B1 (en) 2001-09-24 2006-04-25 Netlogic Microsystems, Inc. Content addressable memory with range compare function
US7301961B1 (en) 2001-12-27 2007-11-27 Cypress Semiconductor Corportion Method and apparatus for configuring signal lines according to idle codes
US7272684B1 (en) 2002-06-26 2007-09-18 Netlogic Microsystems, Inc. Range compare circuit for search engine
US7206212B1 (en) 2002-08-13 2007-04-17 Netlogic Microsystems, Inc. Content addressable memory (CAM) device with entries having ternary match and range compare functions
US9960759B2 (en) * 2015-08-14 2018-05-01 Qualcomm Incorporated N-bit compare logic with single ended inputs

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3845465A (en) * 1973-01-12 1974-10-29 Us Air Force Associative storage apparatus for comparing between specified limits
US4627024A (en) * 1983-07-21 1986-12-02 Trw Inc. Window-addressable memory circuit
US4760374A (en) * 1984-11-29 1988-07-26 Advanced Micro Devices, Inc. Bounds checker
US5561429A (en) * 1986-04-16 1996-10-01 Raytheon Company Content limit addressable memory

Also Published As

Publication number Publication date
CN1329923C (en) 2007-08-01
AU2002239502A1 (en) 2002-06-03
WO2002043069A2 (en) 2002-05-30
WO2002043069A3 (en) 2003-02-20
CN1479925A (en) 2004-03-03
CA2428982C (en) 2007-06-26

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