CA2342065A1 - Multi-mode transmitter - Google Patents
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- CA2342065A1 CA2342065A1 CA 2342065 CA2342065A CA2342065A1 CA 2342065 A1 CA2342065 A1 CA 2342065A1 CA 2342065 CA2342065 CA 2342065 CA 2342065 A CA2342065 A CA 2342065A CA 2342065 A1 CA2342065 A1 CA 2342065A1
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Abstract
A network driver capable of switching between two circuit configurations, each compatible with a respective data signaling standard, including a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap; a source resistor connected between the first end of the primary coil and the second end of the primary coil; a switch coupled to the center tap for selecting between the first and second circuit configurations; the first circuit configuration including a push-pull current source arrangement; the second circuit configuration including a pull current source arrangement.
Description
BACKGROUND OF THE INVENTION
Field of the Invention The present invention relates to a driver system for transmitting a plurality of data signaling standards over a transmission line. More particularly, the present invention relates to a network driver system for transmitting both lOBase-T and 100Base-TX data signaling standards over a transmission line.
piscussion of the Related Art A local-area network ("LAN') is a shared-media communications architecture that enables information processing equipment (such as personal computers and work stations) to electronically share information. LANs are becoming increasingly more conunon in offices and throughout various industries, where networking enhances productivity by providing improved sharing of information and specialized equipment. The separate computers within a LAN
communicate with each other following a fixed protocol that defines the network operation.
The ISO Open Systems Interconnection Basic Reference Model defines a seven-layer 1 S model for data communication in a LAN. The lowest layer in the model is the physical layer which consists of modules that specify (a) the physical media which interconnects the network nodes and over which data is to be electronically transmitted, (b) the manner in which the network nodes interface to the physical transmission media, (c) the process for transferring data over the physical media, and (d) the protocol of the data stream.
In an effort to select a widely adopted standard for interoffice communication, the Institute of Electrical and Electronics Engineers (IEEE) Standard 802.3, Carrier Sense Multiple 1-1U~~1303931.1 Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, was adopted by several industry groups as one of the most widely used standards for the physical layer. Commonly referred to as Ethernet, IEEE Standard 802.3 deals with transferring data over twisted-pair cables or co-axial cables. The lOBase-T signaling standard is a communications protocol based on the IEEE Standard 802.3 and prescribes a rate of 10 megabits/second ("Mbps") for transferring data over twisted-pair cables.
The ever growing need to transfer increased amounts of information at faster rates, accompanied by advances in computer technology and the desire to transmit graphics, video and other high bandwidth data, has necessitated an advancement to higher data transfer rates than the 10-Mbps rate prescribed by the lOBase-T protocol. As a consequence, the 100Base-TX protocol has been established for extending IEEE Standard 802.3 to accommodate data at an effective transfer rate of 100 Mbps through twisted-pair cables. This 100Base-TX
protocol is referred to as fast Ethernet and is defined in IEEE 802.3u.
Fig. 1 illustrates an example of a conventional transmitter driver card circuit for driving a communications network at the 100Base-TX protocol. This current-sinking mode output driver circuit incorporates a typical series termination approach to a networking transmitter including precision series resistors R1 and R2 providing a series termination to the twisted-pair cable at the transmitter. R1 and RZ are connected between the driver card outputs TX+ and TX- and the positive voltage supply VDD. An isolation transformer connected to the driver card outputs TX+
and TX- provides immunity to adverse cable conditions, as required by the IEEE
802.3 specification.
This circuit operates by sinking current in one or both of circuit legs A and B. A 40 mA
current being sunk in one of the two legs forces a 1 Volt drop across the transformer primary (or secondary) when terminated by a load resistance RL of 100 Ohms (R3 in Fig. 1) and where Rs =
100 Ohms. A 20mA current sink by both legs A and B provides a zero differential output. This S configuration generates a differential signal that can swing +/- Vo~.,.
where Vo~,.I. is measured between driver card outputs TX+ and TX-. Accordingly, this circuit provides the three level (MLT-3) output waveform required for 100Base-TX shown in Fig. 3.
In the case where the transformer turns ratio is 1:1 and R,., is equal to Rs, the ideal maximum value of VoU.,. is two thirds of VDD. However, because ideal current sources are not realizable, the actual maximum for Vo~.~. is (VpD-VDS) x 2/3, where VDS is the minimum voltage drop across the current source. 100/lOBase applications of the conventional art typically utilize a VDD of 3.3 volts. In view of this voltage supply level, the Fig. 1 configuration will not support the output voltage swing required for the lOBase-T mode transmit, shown in Fig. 4, without changing the transformer turns ratio.
This conventional circuit arrangement of Fig. 1 suffers from relatively high total transmit power requirements as well as relatively high on-chip power dissipation. For example, a substantial current is required just for biasing the two source resistors R1 and R2. Moreover, the arrangement of Fig. 1 requires DC power to be dissipated in the termination portion of the circuit, further increasing the total transmit power of the driver. In the unbalanced state where Vo~.~ _ +/- Vour max, this circuit configuration requires 40 mA to develop I V
across R~, as described above. For exemplary purposes herein, we demonstrate a preferred embodiment with 1-uA/tJ0~971.1 4 R~ = RS = 100 Ohms. Ideally, to develop 1 V across the parallel combination of RL and RS (50 Ohms), only 20 mA would be needed.
Fig. 2 illustrates an example of a conventional transmitter circuit for driving a network at the lOBase-T protocol. In order to obtain a typical lOBase-T output of 2.SV
peak-to-peak, as shown in Fig. 4, the direct use of a 3.3V supply is not possible using the circuit shown in Fig. 1.
...
The isolating transformer of Fig. 1, however, can be used with a step-up turns ratio to in order to achieve the required lOBase-T output. However, such a 1:2 ratio transformer configuration results in undesirable higher current requirements and increased internal silicon power dissipation on the driver circuit card.
Fig. 2 illustrates a conventional solution to these problems. The circuit arrangement of Fig. 2 is essentially the same as the configuration of Fig. 1, only it includes a connection of the isolation transformer's primary coil center tap to VDD. This results in an auto-transformer functionality that effectively separates the primary coil into two halves that are connected, and mutually coupled inductively. Accordingly, when a voltage level is applied to a first half of the primary, the other half of the primary sees the complement of the voltage applied to the first half.
Thus, even without the primary coil being in a physical 1:2 ratio with the secondary coil, a doubling effect results at the output of the secondary coil to result in a 1:2 doubling effect. This circuit is driven by pulling current through one leg at a time. This configuration reduces the Vo~.,. swing required to be output by the circuit to satisfy the 1013ase-T
signaling requirements by a factor of two.
The advent of the 100 Mbps standard and a corresponding transition in the industry towards higher transmission rates has resulted in the development of hybrid driver systems that i -uni t3oav~ ~ . ~
operate on either the l OBase-T or the 100Base-TX standards. These two standards have a number of different electrical characteristics including: (1) 100Base-TX data on the line is ternary (MLT-3) with a peak to peak differential amplitude of approximately 2V
(as shown in Fig. 3), while l OBase-T data is binary with a peak to-peak differential amplitude of S approximately 5 V (as shown in Fig. 4).
One conventional solution that has been employed~in prior art dual-speed drivers does not involve combining the signal paths of the two speeds, but instead provides two separate physical connectors (such as two RJ-4S jacks). In this arrangement, one connector is utilized for lOBase-T data and the other utilized for 100Base-TX data. However, this solution has a number of disadvantages. First, the physical connectors are costly, both in terms of component costs and also in terms of physical layout spacing on a driver card. Secondly, because the jacks are identical in size, users are required to know in advance the speed of the network to which they are connecting to and must be careful about selecting which of the jacks they connect to the network line.
1 S Another prior art dual mode driver solution employs an electro-mechanical switch to switch between the two transmit modes. Such an arrangement is illustrated in Fig. S, showing a driver incorporating a MOS switch S 1 connected to the center tap of the isolation transformer's primary coil, for example. In 100Base-TX mode, the MOS switch is open and the circuit reverts to the configuration of Fig. 1. For lOBase-T operation, requiring a larger voltage swing, the MOS switch of Fig. S is closed and the circuit reverts to the configuration of Fig. 2. The current sinks can be implemented using mirrored, cascoded NMOS devices driven from a regulated-cascode PMOS device.
i-uaimoav~t.i The above described driver arrangements can thus be made to fit into the available voltage headroom of a 3.3 volts supply arrangement. However, continuing technological developments and advancements in digital circuitry are forcing these typical 3.3 volts supply systems to lower power supply levels, such as 2.5 volts and below. Eventually, voltage headroom problems will surface in view of the increasing complexity of the circuitry being developed.
A need exists for an improved dual mode network driver that solves the problems described herein by increasing output voltage swing and decreasing transmitter power consumption.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a network driver circuit capable of transmitting a plurality of data signaling standards that alleviates the problems associated with conventional network driver arrangements. In particular, a mufti-mode network driver of the present invention provides lOBase-T and 100Base-TX compatibility with a substantial reduction in power consumption and maximized output voltage swing over prior art arrangements.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the network driver capable of transmitting a plurality of data signaling standards includes a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap; a source resistor combination including a first resistor connected between the first end of the primary coil and the center tap and a second resistor connected between the center tap and the second end of the primary coil; a first current source having a first end coupled to a 1-NA/1J0~931.1 voltage supply and a second end coupled to the first end of the primary coil;
a second current source having a first end coupled to the first end of the primary coil and a second end coupled to ground; a third current source having a first end coupled to a voltage supply and a second end coupled to the second end of the primary coil; a fourth current source having a first end coupled to the second end of the primary coil and a second end coupled to ground; and a switch coupled to said center tap for selecting between first and second circuit configurations, wherein the first configuration transmits a first data signaling standard and the second configuration transmits a second data signaling standard.
In another aspect of the instant invention, the network driver capable of switching between two circuit configurations, each compatible with a respective data signaling standard includes a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap;
a source resistor connected between the first end of the primary coil and the second end of the primary coil; a switch coupled to the center tap for selecting between the first and second circuit configurations;
the first circuit configuration including a push-pull supply arrangement; and the second circuit configuration including a pull supply arrangement.
Additional features and advantages of the present invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
l~Ha/1JOJ9J1.1 It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
BRIEF DESCRIPTION OF THE ATTACHED DRAWINGS
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention that together with the description serve to explain the principles of the invention.
In the drawings:
Fig. 1 illustrates an example of a conventional transmitter circuit for driving a network at the 100Base-TX protocol;
Fig. 2 illustrates an example of a conventional transmitter circuit for driving a network at the lOBase-T protocol;
Fig. 3 illustrates the voltage waveform utilized for driving a network at the 100Base-TX
protocol;
Fig. 4 illustrates the voltage waveform utilized for driving a network at the lOBase-T
protocol;
Fig. 5 illustrates an example of a conventional mufti-mode transmitter circuit;
Fig. 6 illustrates an example of a transmitter circuit for driving a network at the 100Base-TX protocol according to the present invention;
1-NA/IJOJ9J1.1 Fig. 7 illustrates an example of a transmitter circuit for driving a network at the lOBase-T
protocol according to the present invention;
Fig. 8 illustrates an example of a mufti-mode transmitter circuit according to the present invention; and S Fig. 9 illustrates a block diagram of a circuit according to the present invention including an input circuit coupled to the transmitter circuit of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.
Fig. 6 illustrates an example of a transmitter circuit for driving a network at the 100Base-TX protocol according to the present invention. This arrangement includes, for example, P-channel current sources 601 and 603, and N-channel current sources 602 and 604 configured in a push/pull differential driver arrangement. Arranging the driver circuit this way results in a number of advantages over the conventional arrangements discussed above with regard to Figs.
1, 2, and S. First, it allows the source resistance RS (R4 in Fig. 6) to be applied between the driver output terminals TX+ and TX-, across the transformer primary. As a result, direct connections to the power supply, VDD or ground (GND), are not needed.
Accordingly, transmit supply power is conserved. This arrangement results in the transmit supply current of the driver being close to ideal (i.e., approximately 20mA in a preferred embodiment where R~ = RS = 100 Ohms).
1-unilJOJ9Jl.1 1 In the case of 100Base-TX, the output voltage swing requirement at the cable is approximately 2V peak-to-peak differential, as discussed above and as shown in Fig. 3. Using a 1:1 turns ratio signal transformer in the arrangement of Fig. 6, the voltage difference between driver outputs TX+ and TX-, ranges from +/- 1 volt. As shown in Fig. 3, there are three states in the 100Base-TX waveform: +1, 0, and -1. In a preferred embodiment utilizing a transformer with a 1:1 turns ratio, Rs = 100 ohms, R,., = 100 ohms, and Vo~,.~. _ +/- 1 V, a "+1" level would source 20mA from TX+ and sink 20mA to TX- in the arrangement of Fig. 6.
Conversely, a "-1"
level would sink 20mA to TX+ and source 20mA from TX- in the arrangement of Fig. 6. In the "O" state, no current would come from TX+ or TX-, but the bias voltage of TX+
and TX- is preferably maintained by the application of a bias voltage to the center tap.
Preferably, this bias voltage is generated via a capacitor-to-ground arrangement, resulting in the driver being self biased.
With a supply voltage VDD of 2.375 volts minimum, as in a preferred embodiment of the instant invention, the voltage drop across the P-channel current source 601 or 603 and the N-channel current source 602 or 604 will add up to 1.375 volts at the maximum value of Vour The output current in our example will be 20mA (1V across 50 ohms). Preferably, a small bias current is applied between current sources 601 and 602, as well as current sources 603 and 604 in order to keep the current sources idling instead of going to zero when they are "turned off' during the push-pull operation.
Fig. 7 illustrates an example of a transmitter circuit for driving a network at the lOBase-T
protocol according to the present invention. The component layout is similar to the arrangement of Fig. 6, only P-channel current sources 601 and 603 are not used (they are turned off) in this 1-4JA/ IJ0J9J t . I
circuit mode, as indicated by the dotted lines outlining their structure in Fig. 7. The driver output terminals TX+ and TX- are pulled up to the positive supply voltage (VDD) and N-channel current sources 602 and 604 are utilized in a current sink configuration.
Moreover, the Fig. 7 arrangement shows the center tap of the primary coil of the isolation transformer tied to VDD. A
further difference between the illustrated circuits of Figs. 6 and 7 is that in Fig. 7, the source resistance RS of Fig. 6 is separated into two equal resistances of RS/2, with a first resistance connected between a first end of the primary coil and the center tap and a second resistance connected between the center tap and a second end of the primary coil.
As described above, in the case of a lOBase-T arrangement, as shown in Fig. 4, the output differential peak-to-peak voltage swing at the transmission cable is approximately 5 volts. More particularly, the output voltage swing is approximately 5 volts +/- 0.6 volts peak-to-peak differential or a single ended swing of 2.5 volts with a tolerance of +/- 0.3 volts. At a low supply voltage, there is negative headroom. In other words, even with ideal current (or voltage) sources, the supply voltage is less than the output voltage. This leaves virtually no room for voltage drops across the current sources. The effective turns ratio of the transformer can be changed to compensate for this problem. A preferred approach for varying the effective turns ratio of the transformer involves tying the center tap to a virtual ground such as positive supply voltage (VDD) and tying the two resistors RS/2 referred to above (RS and R6 in Fig. 7) between the center tap and the two ends of the primary as shown in Fig. 7. With one half of the primary of the signal transformer driven and the other half at a high impedance, the isolating transformer effectively has a 1:2 turns ratio.
t-IUD/ 1703971. 1 Fig. 8 illustrates an example of a mufti-mode transmitter circuit according to a preferred embodiment of the present invention. The mufti-mode driver arrangement of Fig.
8 combines the circuit arrangements and functionalities of the circuits illustrated in Figs. 6 and 7, as described above, into one driver coupled to a single isolating transformer for driving a common S load. This allows the same magnetics and wiring to be utilized for driving a network in both of the data signaling modes, lOBase-T and 100Base-TX, for example, while still enjoying the advantages over conventional arrangements discussed above with regard to the driving circuits shown in Figs. 6 and 7.
A switch, S1, is coupled between the center tap of the primary coil of the signal transformer and VDD in the Fig. 8 arrangement. This switch, S1, toggles between a Bias connection, which supplies a bias voltage to the center tap, and a VDD
connection, which supplies the supply voltage VDD to the center tap. Accordingly, when switch S
1 is in its "Bias"
orientation, the circuit reverts to the arrangement shown and described in connection with Fig. 6.
Similarly, when switch S 1 is in its "VDD" orientation, the circuit reverts to the arrangement 1 S shown and described in connection with Fig. 7. The 100Base-TX
configuration is established by opening switch S 1 which puts the circuit into the "Bias" orientation mode.
The orientation of switch S 1 alternates dynamically by moving between VDD and the center tap of the transmit transformer in accordance with the data signaling standard being transmitted.
The current sources in Figs. G, 7, and 8 are preferably constructed in the conventional way utilizing individual transistors which are controlled current sources, but this is not required by the present invention. These current sources, could be, for example, voltage controlled or current controlled. In a preferred embodiment, current sources 602 and 604 formed using N-I-WAi130~971.1 channel MOSFET transistors are preferably used; and current sources 601 and 603 formed using P-channel MOSFET transistors are preferably used.
The arrangement illustrated in Fig. 8 preferably also includes calibration circuitry 610 coupled across the load for monitoring the output level of the driver. The TP-PMD (Twisted Pair S - Physical Layer Media Dependent) portion of the FDDI (Fiber Distributed Data Interface) specification (ANSI standard X3.263 1995) sets forth a +/- S% VoU.i. tolerance level requirement for 100Base-TX transmitters. Accordingly, the calibration circuit 610 provided in the Fig. 8 arrangement is employed to ensure that all three levels shown in Fig. 3 are within the specified tolerance requirements. The calibration circuit 610 is preferably a closed loop control circuit that provides a real time in-circuit monitoring and adjusting of the output levels.
The output of the calibration circuit 610 adjusts the swing of the output driver, thereby meeting the tolerances mandated by the standards referred to above. This is necessary when the open loop gain of the transmit driver can not meet the tolerance set by these standards. An example of a calibration circuit that may be used in this arrangement is an A/D converter that monitors the driver output 1S levels. The output current and thus the voltage of the driver is adjusted by a control circuit as needed to maintain the tolerance levels discussed above.
Fig. 9 illustrates a block diagram of a circuit arrangement of the present invention including an input circuit coupled to the TX+ and TX- pads of any of the transmitter circuit arrangements of the present invention discussed above. The input circuit includes a digital-to-analog converter (DAC) 900. The DAC is preferably a complementary current mode DAC.
Even more preferably, the DAC is comprised of a plurality of n-channel current sources (i.e., N 1-N3) and a plurality of p-channel current sources (i.e., PI-P3). Fig. 9 illustrates an embodiment in I -LIA/ 1303931 . 1 1 4 which outputs of the p-channel current sources (i.e., P1-P3) are respectively coupled to P inputs of TX+ Pad 902, TX- Pad 904, as well as dummy load 906. The Fig. 9 arrangement also illustrates outputs of the n-channel current sources (i.e., Nl-N3) respectively coupled to N inputs of TX+ Pad 902, TX- Pad 904 and dummy load 906.
The operation of the circuitry of Fig. 9 will now be discussed. An input to DAC circuit 900 receives a digital representation of the output analog waveform which is appropriate for the particular data signaling standard that currently needs to be output from the transmitter circuit of the present invention. As known in the art, this DAC input may be an upper level function, such as a digital waveform generator. The DAC input values are decoded by DAC 900 to determine which current sources are connected or switched to the TX+ Pad 902, TX- Pad 904, or the dummy load 906. The dummy load 906 is a dump site for receiving current when that current does not need to be directed to either the TX+ Pad 902 or the TX- Pad 904.
Providing this dummy load 906 allows each current source within the DAC 900 to stay in an on-state, thereby minimizing switching time within the system because current source recovery (i.e., from an off to on state) is not required.
When the transmit output of the transmitter circuit of the present invention is +1, the TX+
Pad 902 is sourcing current from p-channel source P l and the TX- Pad is sinking current from n-channel source N3. In other words, the P1 and N3 current sources of DAC 900 are in an ON
state while all other current sources of DAC 900 are in an OFF state. When the transmit output of the transmitter circuit is 0 (zero), the P2 and N2 current sources of DAC
900 are in an ON
state while all other current sources of DAC 900 are in an OFF state. When the transmit output of the transmitter circuit is -1, the P3 and Nl current sources of DAC 900 are in an ON state I-un~I703971.1 while all other current sources of DAC 900 are in an OFF state. The OFF state referred to in the examples above is a low current state which allows for maintaining biasing in the DAC current sources to allow the increased response performance resulting from eliminating recovery delay, as described above.
The mufti-mode transmitter shown in Fig. 8 provides significant advantages over prior art arrangements in that it allows for operation at reduced supply voltage without physically changing the transformer turns ratio of 1:1, resulting in the ability to operate in a reduced overall transmit power supply level and to minimize the power consumption of the driver. The overall transmit supply current is further conserved in the 100Base-TX arrangement of the present invention by providing a push-pull supply arrangement rather than dissipating current in the source termination resistances, as in the conventional arrangements discussed above with regard to Fig. 1. As described in the examples above, this results in a substantial decrease in the transmit power level. Accordingly, the disclosed combination of a push-pull (H-bridge) drive for 104Base-TX signaling and a pull drive with the center tap of the transmit transformer pulled to the positive supply (VDD) for lOBase-T signaling enables the advantageous low supply operation of the present invention.
Conclusion While the invention has been described in detail and with reference to specific embodiments thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope thereof. For example, the concepts and arrangements disclosed herein could be extended for use in an even lower supply voltage environment or could also be extended to a 1000Basc-T
arrangement.
1-W1/17079J1.1 Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
1-un1I303931.t
Field of the Invention The present invention relates to a driver system for transmitting a plurality of data signaling standards over a transmission line. More particularly, the present invention relates to a network driver system for transmitting both lOBase-T and 100Base-TX data signaling standards over a transmission line.
piscussion of the Related Art A local-area network ("LAN') is a shared-media communications architecture that enables information processing equipment (such as personal computers and work stations) to electronically share information. LANs are becoming increasingly more conunon in offices and throughout various industries, where networking enhances productivity by providing improved sharing of information and specialized equipment. The separate computers within a LAN
communicate with each other following a fixed protocol that defines the network operation.
The ISO Open Systems Interconnection Basic Reference Model defines a seven-layer 1 S model for data communication in a LAN. The lowest layer in the model is the physical layer which consists of modules that specify (a) the physical media which interconnects the network nodes and over which data is to be electronically transmitted, (b) the manner in which the network nodes interface to the physical transmission media, (c) the process for transferring data over the physical media, and (d) the protocol of the data stream.
In an effort to select a widely adopted standard for interoffice communication, the Institute of Electrical and Electronics Engineers (IEEE) Standard 802.3, Carrier Sense Multiple 1-1U~~1303931.1 Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, was adopted by several industry groups as one of the most widely used standards for the physical layer. Commonly referred to as Ethernet, IEEE Standard 802.3 deals with transferring data over twisted-pair cables or co-axial cables. The lOBase-T signaling standard is a communications protocol based on the IEEE Standard 802.3 and prescribes a rate of 10 megabits/second ("Mbps") for transferring data over twisted-pair cables.
The ever growing need to transfer increased amounts of information at faster rates, accompanied by advances in computer technology and the desire to transmit graphics, video and other high bandwidth data, has necessitated an advancement to higher data transfer rates than the 10-Mbps rate prescribed by the lOBase-T protocol. As a consequence, the 100Base-TX protocol has been established for extending IEEE Standard 802.3 to accommodate data at an effective transfer rate of 100 Mbps through twisted-pair cables. This 100Base-TX
protocol is referred to as fast Ethernet and is defined in IEEE 802.3u.
Fig. 1 illustrates an example of a conventional transmitter driver card circuit for driving a communications network at the 100Base-TX protocol. This current-sinking mode output driver circuit incorporates a typical series termination approach to a networking transmitter including precision series resistors R1 and R2 providing a series termination to the twisted-pair cable at the transmitter. R1 and RZ are connected between the driver card outputs TX+ and TX- and the positive voltage supply VDD. An isolation transformer connected to the driver card outputs TX+
and TX- provides immunity to adverse cable conditions, as required by the IEEE
802.3 specification.
This circuit operates by sinking current in one or both of circuit legs A and B. A 40 mA
current being sunk in one of the two legs forces a 1 Volt drop across the transformer primary (or secondary) when terminated by a load resistance RL of 100 Ohms (R3 in Fig. 1) and where Rs =
100 Ohms. A 20mA current sink by both legs A and B provides a zero differential output. This S configuration generates a differential signal that can swing +/- Vo~.,.
where Vo~,.I. is measured between driver card outputs TX+ and TX-. Accordingly, this circuit provides the three level (MLT-3) output waveform required for 100Base-TX shown in Fig. 3.
In the case where the transformer turns ratio is 1:1 and R,., is equal to Rs, the ideal maximum value of VoU.,. is two thirds of VDD. However, because ideal current sources are not realizable, the actual maximum for Vo~.~. is (VpD-VDS) x 2/3, where VDS is the minimum voltage drop across the current source. 100/lOBase applications of the conventional art typically utilize a VDD of 3.3 volts. In view of this voltage supply level, the Fig. 1 configuration will not support the output voltage swing required for the lOBase-T mode transmit, shown in Fig. 4, without changing the transformer turns ratio.
This conventional circuit arrangement of Fig. 1 suffers from relatively high total transmit power requirements as well as relatively high on-chip power dissipation. For example, a substantial current is required just for biasing the two source resistors R1 and R2. Moreover, the arrangement of Fig. 1 requires DC power to be dissipated in the termination portion of the circuit, further increasing the total transmit power of the driver. In the unbalanced state where Vo~.~ _ +/- Vour max, this circuit configuration requires 40 mA to develop I V
across R~, as described above. For exemplary purposes herein, we demonstrate a preferred embodiment with 1-uA/tJ0~971.1 4 R~ = RS = 100 Ohms. Ideally, to develop 1 V across the parallel combination of RL and RS (50 Ohms), only 20 mA would be needed.
Fig. 2 illustrates an example of a conventional transmitter circuit for driving a network at the lOBase-T protocol. In order to obtain a typical lOBase-T output of 2.SV
peak-to-peak, as shown in Fig. 4, the direct use of a 3.3V supply is not possible using the circuit shown in Fig. 1.
...
The isolating transformer of Fig. 1, however, can be used with a step-up turns ratio to in order to achieve the required lOBase-T output. However, such a 1:2 ratio transformer configuration results in undesirable higher current requirements and increased internal silicon power dissipation on the driver circuit card.
Fig. 2 illustrates a conventional solution to these problems. The circuit arrangement of Fig. 2 is essentially the same as the configuration of Fig. 1, only it includes a connection of the isolation transformer's primary coil center tap to VDD. This results in an auto-transformer functionality that effectively separates the primary coil into two halves that are connected, and mutually coupled inductively. Accordingly, when a voltage level is applied to a first half of the primary, the other half of the primary sees the complement of the voltage applied to the first half.
Thus, even without the primary coil being in a physical 1:2 ratio with the secondary coil, a doubling effect results at the output of the secondary coil to result in a 1:2 doubling effect. This circuit is driven by pulling current through one leg at a time. This configuration reduces the Vo~.,. swing required to be output by the circuit to satisfy the 1013ase-T
signaling requirements by a factor of two.
The advent of the 100 Mbps standard and a corresponding transition in the industry towards higher transmission rates has resulted in the development of hybrid driver systems that i -uni t3oav~ ~ . ~
operate on either the l OBase-T or the 100Base-TX standards. These two standards have a number of different electrical characteristics including: (1) 100Base-TX data on the line is ternary (MLT-3) with a peak to peak differential amplitude of approximately 2V
(as shown in Fig. 3), while l OBase-T data is binary with a peak to-peak differential amplitude of S approximately 5 V (as shown in Fig. 4).
One conventional solution that has been employed~in prior art dual-speed drivers does not involve combining the signal paths of the two speeds, but instead provides two separate physical connectors (such as two RJ-4S jacks). In this arrangement, one connector is utilized for lOBase-T data and the other utilized for 100Base-TX data. However, this solution has a number of disadvantages. First, the physical connectors are costly, both in terms of component costs and also in terms of physical layout spacing on a driver card. Secondly, because the jacks are identical in size, users are required to know in advance the speed of the network to which they are connecting to and must be careful about selecting which of the jacks they connect to the network line.
1 S Another prior art dual mode driver solution employs an electro-mechanical switch to switch between the two transmit modes. Such an arrangement is illustrated in Fig. S, showing a driver incorporating a MOS switch S 1 connected to the center tap of the isolation transformer's primary coil, for example. In 100Base-TX mode, the MOS switch is open and the circuit reverts to the configuration of Fig. 1. For lOBase-T operation, requiring a larger voltage swing, the MOS switch of Fig. S is closed and the circuit reverts to the configuration of Fig. 2. The current sinks can be implemented using mirrored, cascoded NMOS devices driven from a regulated-cascode PMOS device.
i-uaimoav~t.i The above described driver arrangements can thus be made to fit into the available voltage headroom of a 3.3 volts supply arrangement. However, continuing technological developments and advancements in digital circuitry are forcing these typical 3.3 volts supply systems to lower power supply levels, such as 2.5 volts and below. Eventually, voltage headroom problems will surface in view of the increasing complexity of the circuitry being developed.
A need exists for an improved dual mode network driver that solves the problems described herein by increasing output voltage swing and decreasing transmitter power consumption.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a network driver circuit capable of transmitting a plurality of data signaling standards that alleviates the problems associated with conventional network driver arrangements. In particular, a mufti-mode network driver of the present invention provides lOBase-T and 100Base-TX compatibility with a substantial reduction in power consumption and maximized output voltage swing over prior art arrangements.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the network driver capable of transmitting a plurality of data signaling standards includes a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap; a source resistor combination including a first resistor connected between the first end of the primary coil and the center tap and a second resistor connected between the center tap and the second end of the primary coil; a first current source having a first end coupled to a 1-NA/1J0~931.1 voltage supply and a second end coupled to the first end of the primary coil;
a second current source having a first end coupled to the first end of the primary coil and a second end coupled to ground; a third current source having a first end coupled to a voltage supply and a second end coupled to the second end of the primary coil; a fourth current source having a first end coupled to the second end of the primary coil and a second end coupled to ground; and a switch coupled to said center tap for selecting between first and second circuit configurations, wherein the first configuration transmits a first data signaling standard and the second configuration transmits a second data signaling standard.
In another aspect of the instant invention, the network driver capable of switching between two circuit configurations, each compatible with a respective data signaling standard includes a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap;
a source resistor connected between the first end of the primary coil and the second end of the primary coil; a switch coupled to the center tap for selecting between the first and second circuit configurations;
the first circuit configuration including a push-pull supply arrangement; and the second circuit configuration including a pull supply arrangement.
Additional features and advantages of the present invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
l~Ha/1JOJ9J1.1 It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
BRIEF DESCRIPTION OF THE ATTACHED DRAWINGS
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention that together with the description serve to explain the principles of the invention.
In the drawings:
Fig. 1 illustrates an example of a conventional transmitter circuit for driving a network at the 100Base-TX protocol;
Fig. 2 illustrates an example of a conventional transmitter circuit for driving a network at the lOBase-T protocol;
Fig. 3 illustrates the voltage waveform utilized for driving a network at the 100Base-TX
protocol;
Fig. 4 illustrates the voltage waveform utilized for driving a network at the lOBase-T
protocol;
Fig. 5 illustrates an example of a conventional mufti-mode transmitter circuit;
Fig. 6 illustrates an example of a transmitter circuit for driving a network at the 100Base-TX protocol according to the present invention;
1-NA/IJOJ9J1.1 Fig. 7 illustrates an example of a transmitter circuit for driving a network at the lOBase-T
protocol according to the present invention;
Fig. 8 illustrates an example of a mufti-mode transmitter circuit according to the present invention; and S Fig. 9 illustrates a block diagram of a circuit according to the present invention including an input circuit coupled to the transmitter circuit of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.
Fig. 6 illustrates an example of a transmitter circuit for driving a network at the 100Base-TX protocol according to the present invention. This arrangement includes, for example, P-channel current sources 601 and 603, and N-channel current sources 602 and 604 configured in a push/pull differential driver arrangement. Arranging the driver circuit this way results in a number of advantages over the conventional arrangements discussed above with regard to Figs.
1, 2, and S. First, it allows the source resistance RS (R4 in Fig. 6) to be applied between the driver output terminals TX+ and TX-, across the transformer primary. As a result, direct connections to the power supply, VDD or ground (GND), are not needed.
Accordingly, transmit supply power is conserved. This arrangement results in the transmit supply current of the driver being close to ideal (i.e., approximately 20mA in a preferred embodiment where R~ = RS = 100 Ohms).
1-unilJOJ9Jl.1 1 In the case of 100Base-TX, the output voltage swing requirement at the cable is approximately 2V peak-to-peak differential, as discussed above and as shown in Fig. 3. Using a 1:1 turns ratio signal transformer in the arrangement of Fig. 6, the voltage difference between driver outputs TX+ and TX-, ranges from +/- 1 volt. As shown in Fig. 3, there are three states in the 100Base-TX waveform: +1, 0, and -1. In a preferred embodiment utilizing a transformer with a 1:1 turns ratio, Rs = 100 ohms, R,., = 100 ohms, and Vo~,.~. _ +/- 1 V, a "+1" level would source 20mA from TX+ and sink 20mA to TX- in the arrangement of Fig. 6.
Conversely, a "-1"
level would sink 20mA to TX+ and source 20mA from TX- in the arrangement of Fig. 6. In the "O" state, no current would come from TX+ or TX-, but the bias voltage of TX+
and TX- is preferably maintained by the application of a bias voltage to the center tap.
Preferably, this bias voltage is generated via a capacitor-to-ground arrangement, resulting in the driver being self biased.
With a supply voltage VDD of 2.375 volts minimum, as in a preferred embodiment of the instant invention, the voltage drop across the P-channel current source 601 or 603 and the N-channel current source 602 or 604 will add up to 1.375 volts at the maximum value of Vour The output current in our example will be 20mA (1V across 50 ohms). Preferably, a small bias current is applied between current sources 601 and 602, as well as current sources 603 and 604 in order to keep the current sources idling instead of going to zero when they are "turned off' during the push-pull operation.
Fig. 7 illustrates an example of a transmitter circuit for driving a network at the lOBase-T
protocol according to the present invention. The component layout is similar to the arrangement of Fig. 6, only P-channel current sources 601 and 603 are not used (they are turned off) in this 1-4JA/ IJ0J9J t . I
circuit mode, as indicated by the dotted lines outlining their structure in Fig. 7. The driver output terminals TX+ and TX- are pulled up to the positive supply voltage (VDD) and N-channel current sources 602 and 604 are utilized in a current sink configuration.
Moreover, the Fig. 7 arrangement shows the center tap of the primary coil of the isolation transformer tied to VDD. A
further difference between the illustrated circuits of Figs. 6 and 7 is that in Fig. 7, the source resistance RS of Fig. 6 is separated into two equal resistances of RS/2, with a first resistance connected between a first end of the primary coil and the center tap and a second resistance connected between the center tap and a second end of the primary coil.
As described above, in the case of a lOBase-T arrangement, as shown in Fig. 4, the output differential peak-to-peak voltage swing at the transmission cable is approximately 5 volts. More particularly, the output voltage swing is approximately 5 volts +/- 0.6 volts peak-to-peak differential or a single ended swing of 2.5 volts with a tolerance of +/- 0.3 volts. At a low supply voltage, there is negative headroom. In other words, even with ideal current (or voltage) sources, the supply voltage is less than the output voltage. This leaves virtually no room for voltage drops across the current sources. The effective turns ratio of the transformer can be changed to compensate for this problem. A preferred approach for varying the effective turns ratio of the transformer involves tying the center tap to a virtual ground such as positive supply voltage (VDD) and tying the two resistors RS/2 referred to above (RS and R6 in Fig. 7) between the center tap and the two ends of the primary as shown in Fig. 7. With one half of the primary of the signal transformer driven and the other half at a high impedance, the isolating transformer effectively has a 1:2 turns ratio.
t-IUD/ 1703971. 1 Fig. 8 illustrates an example of a mufti-mode transmitter circuit according to a preferred embodiment of the present invention. The mufti-mode driver arrangement of Fig.
8 combines the circuit arrangements and functionalities of the circuits illustrated in Figs. 6 and 7, as described above, into one driver coupled to a single isolating transformer for driving a common S load. This allows the same magnetics and wiring to be utilized for driving a network in both of the data signaling modes, lOBase-T and 100Base-TX, for example, while still enjoying the advantages over conventional arrangements discussed above with regard to the driving circuits shown in Figs. 6 and 7.
A switch, S1, is coupled between the center tap of the primary coil of the signal transformer and VDD in the Fig. 8 arrangement. This switch, S1, toggles between a Bias connection, which supplies a bias voltage to the center tap, and a VDD
connection, which supplies the supply voltage VDD to the center tap. Accordingly, when switch S
1 is in its "Bias"
orientation, the circuit reverts to the arrangement shown and described in connection with Fig. 6.
Similarly, when switch S 1 is in its "VDD" orientation, the circuit reverts to the arrangement 1 S shown and described in connection with Fig. 7. The 100Base-TX
configuration is established by opening switch S 1 which puts the circuit into the "Bias" orientation mode.
The orientation of switch S 1 alternates dynamically by moving between VDD and the center tap of the transmit transformer in accordance with the data signaling standard being transmitted.
The current sources in Figs. G, 7, and 8 are preferably constructed in the conventional way utilizing individual transistors which are controlled current sources, but this is not required by the present invention. These current sources, could be, for example, voltage controlled or current controlled. In a preferred embodiment, current sources 602 and 604 formed using N-I-WAi130~971.1 channel MOSFET transistors are preferably used; and current sources 601 and 603 formed using P-channel MOSFET transistors are preferably used.
The arrangement illustrated in Fig. 8 preferably also includes calibration circuitry 610 coupled across the load for monitoring the output level of the driver. The TP-PMD (Twisted Pair S - Physical Layer Media Dependent) portion of the FDDI (Fiber Distributed Data Interface) specification (ANSI standard X3.263 1995) sets forth a +/- S% VoU.i. tolerance level requirement for 100Base-TX transmitters. Accordingly, the calibration circuit 610 provided in the Fig. 8 arrangement is employed to ensure that all three levels shown in Fig. 3 are within the specified tolerance requirements. The calibration circuit 610 is preferably a closed loop control circuit that provides a real time in-circuit monitoring and adjusting of the output levels.
The output of the calibration circuit 610 adjusts the swing of the output driver, thereby meeting the tolerances mandated by the standards referred to above. This is necessary when the open loop gain of the transmit driver can not meet the tolerance set by these standards. An example of a calibration circuit that may be used in this arrangement is an A/D converter that monitors the driver output 1S levels. The output current and thus the voltage of the driver is adjusted by a control circuit as needed to maintain the tolerance levels discussed above.
Fig. 9 illustrates a block diagram of a circuit arrangement of the present invention including an input circuit coupled to the TX+ and TX- pads of any of the transmitter circuit arrangements of the present invention discussed above. The input circuit includes a digital-to-analog converter (DAC) 900. The DAC is preferably a complementary current mode DAC.
Even more preferably, the DAC is comprised of a plurality of n-channel current sources (i.e., N 1-N3) and a plurality of p-channel current sources (i.e., PI-P3). Fig. 9 illustrates an embodiment in I -LIA/ 1303931 . 1 1 4 which outputs of the p-channel current sources (i.e., P1-P3) are respectively coupled to P inputs of TX+ Pad 902, TX- Pad 904, as well as dummy load 906. The Fig. 9 arrangement also illustrates outputs of the n-channel current sources (i.e., Nl-N3) respectively coupled to N inputs of TX+ Pad 902, TX- Pad 904 and dummy load 906.
The operation of the circuitry of Fig. 9 will now be discussed. An input to DAC circuit 900 receives a digital representation of the output analog waveform which is appropriate for the particular data signaling standard that currently needs to be output from the transmitter circuit of the present invention. As known in the art, this DAC input may be an upper level function, such as a digital waveform generator. The DAC input values are decoded by DAC 900 to determine which current sources are connected or switched to the TX+ Pad 902, TX- Pad 904, or the dummy load 906. The dummy load 906 is a dump site for receiving current when that current does not need to be directed to either the TX+ Pad 902 or the TX- Pad 904.
Providing this dummy load 906 allows each current source within the DAC 900 to stay in an on-state, thereby minimizing switching time within the system because current source recovery (i.e., from an off to on state) is not required.
When the transmit output of the transmitter circuit of the present invention is +1, the TX+
Pad 902 is sourcing current from p-channel source P l and the TX- Pad is sinking current from n-channel source N3. In other words, the P1 and N3 current sources of DAC 900 are in an ON
state while all other current sources of DAC 900 are in an OFF state. When the transmit output of the transmitter circuit is 0 (zero), the P2 and N2 current sources of DAC
900 are in an ON
state while all other current sources of DAC 900 are in an OFF state. When the transmit output of the transmitter circuit is -1, the P3 and Nl current sources of DAC 900 are in an ON state I-un~I703971.1 while all other current sources of DAC 900 are in an OFF state. The OFF state referred to in the examples above is a low current state which allows for maintaining biasing in the DAC current sources to allow the increased response performance resulting from eliminating recovery delay, as described above.
The mufti-mode transmitter shown in Fig. 8 provides significant advantages over prior art arrangements in that it allows for operation at reduced supply voltage without physically changing the transformer turns ratio of 1:1, resulting in the ability to operate in a reduced overall transmit power supply level and to minimize the power consumption of the driver. The overall transmit supply current is further conserved in the 100Base-TX arrangement of the present invention by providing a push-pull supply arrangement rather than dissipating current in the source termination resistances, as in the conventional arrangements discussed above with regard to Fig. 1. As described in the examples above, this results in a substantial decrease in the transmit power level. Accordingly, the disclosed combination of a push-pull (H-bridge) drive for 104Base-TX signaling and a pull drive with the center tap of the transmit transformer pulled to the positive supply (VDD) for lOBase-T signaling enables the advantageous low supply operation of the present invention.
Conclusion While the invention has been described in detail and with reference to specific embodiments thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope thereof. For example, the concepts and arrangements disclosed herein could be extended for use in an even lower supply voltage environment or could also be extended to a 1000Basc-T
arrangement.
1-W1/17079J1.1 Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
1-un1I303931.t
Claims (12)
1. A network driver capable of transmitting a plurality of data signaling standards, comprising:
a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap;
a source resistor combination including a first resistor connected between the first end of the primary coil and the center tap and a second resistor connected between the center tap and the second end of the primary coil;
a first current source having a first end coupled to a voltage supply and a second end coupled to the first end of the primary coil;
a second current source having a first end coupled to the first end of the primary coil and a second end coupled to ground;
a third current source having a first end coupled to a voltage supply and a second end coupled to the second end of the primary coil;
a fourth current source having a first end coupled to the second end of the primary coil and a second end coupled to ground;
a switch coupled to said center tap for selecting between first and second circuit configurations, wherein the first configuration transmits a first data signaling standard and the second configuration transmits a second data signaling standard.
a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap;
a source resistor combination including a first resistor connected between the first end of the primary coil and the center tap and a second resistor connected between the center tap and the second end of the primary coil;
a first current source having a first end coupled to a voltage supply and a second end coupled to the first end of the primary coil;
a second current source having a first end coupled to the first end of the primary coil and a second end coupled to ground;
a third current source having a first end coupled to a voltage supply and a second end coupled to the second end of the primary coil;
a fourth current source having a first end coupled to the second end of the primary coil and a second end coupled to ground;
a switch coupled to said center tap for selecting between first and second circuit configurations, wherein the first configuration transmits a first data signaling standard and the second configuration transmits a second data signaling standard.
2. The network driver of claim 1, wherein the first configuration includes a bias voltage coupled to the center tap, and wherein the second configuration includes the voltage supply coupled to the center tap and the first and third current sources disabled.
3. The network driver of claim 1, further comprising:
a calibration circuit for monitoring the output level of the network driver.
a calibration circuit for monitoring the output level of the network driver.
4. The network driver of claim 1, wherein the first and third current sources are p-channel transistor arrangements and the second and fourth current sources are n-channel transistor arrangements.
5. The network driver of claim 1, wherein said switch is a programmable switch to dynamically switch between said first and second data signaling standards.
6. The network driver of claim 1, wherein said first and second data signaling standards are 10Base-T and 100Base-TX.
7. The network driver of claim 2, wherein the first configuration includes a bias voltage connected to the center tap, and wherein the second configuration includes the voltage supply connected to the center tap and the first and third current sources disabled.
8. A network driver capable of switching between two circuit configurations, each compatible with a respective data signaling standard, comprising:
a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap;
a source resistor connected between the first end of the primary coil and the second end of the primary coil;
a switch coupled to the center tap for selecting between the first and second circuit configurations;
the first circuit configuration including a push-pull current source arrangement;
the second circuit configuration including a pull current source arrangement.
a transformer having a primary and secondary coil, each of the primary and secondary coils having first and second ends, and the primary coil having a center tap;
a source resistor connected between the first end of the primary coil and the second end of the primary coil;
a switch coupled to the center tap for selecting between the first and second circuit configurations;
the first circuit configuration including a push-pull current source arrangement;
the second circuit configuration including a pull current source arrangement.
9. The network driver of claim 8, wherein the source resistor combination includes a first resistor connected between the first end of the primary coil and the center tap and a second resistor connected between the center tap and the second end of the primary coil.
10. The network driver of claim 8, wherein said switch is a programmable switch to dynamically switch between said first and second circuit configurations.
11. The network driver of claim 8, wherein said switch is connected to the center tap for selecting between the first and second circuit configurations.
12. The network driver of claim 8, wherein said data signaling standards are 10Base-T
and 100Base-TX.
and 100Base-TX.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US53245500A | 2000-03-23 | 2000-03-23 | |
| US09/532,455 | 2000-03-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2342065A1 true CA2342065A1 (en) | 2001-09-23 |
Family
ID=24121886
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2342065 Abandoned CA2342065A1 (en) | 2000-03-23 | 2001-03-21 | Multi-mode transmitter |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2342065A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104683024A (en) * | 2015-02-05 | 2015-06-03 | 武汉电信器件有限公司 | Multi-mode luminous power monitoring method and device |
-
2001
- 2001-03-21 CA CA 2342065 patent/CA2342065A1/en not_active Abandoned
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104683024A (en) * | 2015-02-05 | 2015-06-03 | 武汉电信器件有限公司 | Multi-mode luminous power monitoring method and device |
| CN104683024B (en) * | 2015-02-05 | 2017-08-29 | 武汉电信器件有限公司 | A kind of multi-modal optical power monitoring method and device |
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