CA2291884C - Click-free muting circuit for headset - Google Patents
Click-free muting circuit for headset Download PDFInfo
- Publication number
- CA2291884C CA2291884C CA 2291884 CA2291884A CA2291884C CA 2291884 C CA2291884 C CA 2291884C CA 2291884 CA2291884 CA 2291884 CA 2291884 A CA2291884 A CA 2291884A CA 2291884 C CA2291884 C CA 2291884C
- Authority
- CA
- Canada
- Prior art keywords
- microphone
- circuit
- transistor
- click
- headset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/60—Substation equipment, e.g. for use by subscribers including speech amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/60—Substation equipment, e.g. for use by subscribers including speech amplifiers
- H04M1/6033—Substation equipment, e.g. for use by subscribers including speech amplifiers for providing handsfree use or a loudspeaker mode in telephone sets
Abstract
A click-muting circuit for a headset microphone connected to a telephone, comprising a user operated mute switch, a click eliminator circuit connected across the microphone for gradually creating a short circuit across the microphone in response to closure of the mute switch, and a hard muting circuit connected in series wi th the microphone for disconnecting the microphone after the short circuit has been established.
Description
CLICK-FREE MUTING CIRCUIT FOR HEADSET
Field of the Invention The present invention relates in general to telephone headsets, and more particularly to a circuit for providing click-free muting of a telephone headset.
Background of the Invention to Headsets are useful for hands free telephony in circumstances in which a person requires the use of his or her hands for operation of a computer, switchboard, etc. Headsets are usually connected to the handset port of a telephone set through an interface box. The interface box allows the user to select whether the headset or the handset is activated. Prior art interface boxes vary greatly in complexity, but most 15 boxes include a headset volume control. Some such boxes are battery operated while others steal current from the microphone bias circuit.
One common problem associated with the use of telephone headsets is the generation of unpleasant clicking noises which occur when a mute button for the 2o headset microphone is depressed or released. Another problem is insufficient "hard"
muting.
According to one prior art approach, an AC coupled mute switch has been used to provide headset microphone muting. Unfortunately, this approach generally 25 fails to sufficiently attenuate the microphone signal (i.e. no "hard"
muting) and is not capable of performing headset switch detection which is a desirable feature of telephone headsets which can function also using a regular handset. DC coupled mute switches overcome the problem of headset switch detection but produce the aforenoted unpleasant click noise. Another approach involves the use of expensive 3o battery powered microphone amplifier muting circuits. These circuits are normally implemented within cumbersome interface boxes attached to the telephone, and often do not provide a hard muting function.
Field of the Invention The present invention relates in general to telephone headsets, and more particularly to a circuit for providing click-free muting of a telephone headset.
Background of the Invention to Headsets are useful for hands free telephony in circumstances in which a person requires the use of his or her hands for operation of a computer, switchboard, etc. Headsets are usually connected to the handset port of a telephone set through an interface box. The interface box allows the user to select whether the headset or the handset is activated. Prior art interface boxes vary greatly in complexity, but most 15 boxes include a headset volume control. Some such boxes are battery operated while others steal current from the microphone bias circuit.
One common problem associated with the use of telephone headsets is the generation of unpleasant clicking noises which occur when a mute button for the 2o headset microphone is depressed or released. Another problem is insufficient "hard"
muting.
According to one prior art approach, an AC coupled mute switch has been used to provide headset microphone muting. Unfortunately, this approach generally 25 fails to sufficiently attenuate the microphone signal (i.e. no "hard"
muting) and is not capable of performing headset switch detection which is a desirable feature of telephone headsets which can function also using a regular handset. DC coupled mute switches overcome the problem of headset switch detection but produce the aforenoted unpleasant click noise. Another approach involves the use of expensive 3o battery powered microphone amplifier muting circuits. These circuits are normally implemented within cumbersome interface boxes attached to the telephone, and often do not provide a hard muting function.
2 Summary of the Invention According to the present invention, a circuit is provided which is capable of headset detection and microphone mute switch closure detection and which overcomes the above-discussed disadvantages of the prior art. The circuit provides click-free switching, 80 dB muting and is of inexpensive construction. No extra power supply is required, and the circuit is capable of providing headset detection.
In accordance with an aspect of the present invention, there is provided a click-free muting circuit for a headset microphone connected to a telephone, comprising:
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch, said click eliminator circuit comprising at least one first transistor having a current conducting path connected across said microphone and a control terminal connected via a capacitance to said mute switch such that in response to said closure of the mute switch bias voltage on said control terminal gradually increases thereby turning on said transistor and causing current to flow through said current conducting path, and a resistance connected in parallel to said capacitance; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit.
In accordance with an aspect of the present invention, there is provided a click-free muting circuit for a headset microphone connected to a telephone, comprising:
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit, said hard muting circuit comprising at least one further transistor-having a current conduction path in series with said microphone and a control terminal connected to the current conducting path of said at least one first transistor such that current is drawn from said control terminal of said further transistor thereby turning off said further transistor and 2a disconnecting said microphone via the current conduction path of said further transistor, and at least one diode connected to a base terminal of said further transistor.
Brief Introduction to the Drawings A detailed description of the preferred embodiment is provided herein below, with reference to the following drawings, in which:
Figure 1 shows a telephone headset with mute switch connected to a telephone set, in accordance with the present invention;
Figure 2 is a block diagram showing connection of the headset with mute circuit to the telephone set of Figure 1;
Figure 3 is'a block diagram of the click-free muting circuit according to the preferred embodiment;
Figure 4 is a circuit diagram of the click-free muting circuit according to a first embodiment connected to the telephone set;
Figure 5 is a circuit diagram of the click-free muting circuit according to a preferred embodiment of the invention; and Figure 6 is a timing diagram showing differences in operation as between the embodiments of Figures 4 and 5.
In accordance with an aspect of the present invention, there is provided a click-free muting circuit for a headset microphone connected to a telephone, comprising:
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch, said click eliminator circuit comprising at least one first transistor having a current conducting path connected across said microphone and a control terminal connected via a capacitance to said mute switch such that in response to said closure of the mute switch bias voltage on said control terminal gradually increases thereby turning on said transistor and causing current to flow through said current conducting path, and a resistance connected in parallel to said capacitance; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit.
In accordance with an aspect of the present invention, there is provided a click-free muting circuit for a headset microphone connected to a telephone, comprising:
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit, said hard muting circuit comprising at least one further transistor-having a current conduction path in series with said microphone and a control terminal connected to the current conducting path of said at least one first transistor such that current is drawn from said control terminal of said further transistor thereby turning off said further transistor and 2a disconnecting said microphone via the current conduction path of said further transistor, and at least one diode connected to a base terminal of said further transistor.
Brief Introduction to the Drawings A detailed description of the preferred embodiment is provided herein below, with reference to the following drawings, in which:
Figure 1 shows a telephone headset with mute switch connected to a telephone set, in accordance with the present invention;
Figure 2 is a block diagram showing connection of the headset with mute circuit to the telephone set of Figure 1;
Figure 3 is'a block diagram of the click-free muting circuit according to the preferred embodiment;
Figure 4 is a circuit diagram of the click-free muting circuit according to a first embodiment connected to the telephone set;
Figure 5 is a circuit diagram of the click-free muting circuit according to a preferred embodiment of the invention; and Figure 6 is a timing diagram showing differences in operation as between the embodiments of Figures 4 and 5.
3 Detailed Description of the Preferred Embodiment In Figure 1, a standard telephone set 1 is shown with a handset 3 thereof resting in a handset cradle. The handset 3 is normally connected to the telephone set via a handset port 5 (e.g. RJ-11). In the illustrated embodiment, a headset 7 is connected to the telephone set 1 via headset port 5 A. The headset may also be connected to the handset port S and in that case, the bias circuit 21 (see below) must be designed in such a way that the bias circuit functions with both microphones; the handset microphone and the headset microphone. Headset 7 includes a pair of earpieces 11 and a microphone 13 (e.g. low voltage condenser microphone), in a usual manner.
With reference to Figure 2 in combination with Figure l, according to the present invention, a switch 15 is connected to a click-free muting circuit 17 which, in turn, is connected across the terminals of microphone 13. Thus, the circuit 17 is connected between the microphone 13 and the microphone audio line connector 19 of the telephone set 1.
2o Headset microphone bias circuit 21 provides bias current for the microphone 13, in a well known manner. A microphone amplifier 23 is connected differentially to the bias circuit 21 for amplifying the low voltage output signals therefrom.
An output of microphone amplifier 23 (analog_signal) is connectable to a phone chip (not shown) within the telephone set 1, in a well known manner. Although not shown, the earpieces 11 of the headset 7 and the earpiece of the handset 3 are normally connected together and to an output of the phone chip.
A headset detector circuit 25 is connected to the output of microphone bias circuit 21 for providing a signal (headset detect) to the phone chip for indicating that 3o headset 7 is connected to the set 1. Since many headsets are connected to telephones via a "quick-disconnect" plug, when the handset 3 is left in its cradle and the headset 7 1s dlscoz'lnected, it is still possible to use the telephone via the handset operation. Thr detector circuit ?5 also generates a signal (headset switch_detect) indicative of a momentary depression of the rrlute snitch 15 for interpretation by the phone chip ;~s a hookswitch event for invoking a telephone special feature (e_g. soft hold, call forward, etc.). The structure and operation of the circuit z5 is discussed in greater detail in co-assigned U.S. Patent No. 5833075 entitled ''Off Hoak Detector far Headset".
With reference to Figure 3, the muting circuit 17 is shown comprising a click IO eliminator circuit 17A and. a hard sxiuting circuit I7B. An implementation of the circuit 17 is shown according to the preferred embodiment with reference to the schematic diagram of fiigure g.
Tn operation, circuit I7 steals current from the bias circmt 21, so that no extra power supply is required. When the switch I~ is closed, the click eliminator circuit 17A slowly creates a short ciretut across the microphone 13, thereby suppressing any impulse click noise from being created. Once the click eliminator circuit I7A
has fully short circuited the microphone 13, hard muting circuit 17B completely disconnects the microphone I3, thereby resulting in a hard mute (80d$). When the switch 15 ~s 2U released, hard muting circuit 17B re-connects the microphone I3 and click eliminator circuit 17A slowly removes the short circuu across the ttucrophone 13 , thereby again suppressing unpulse switch noise during resumption of microphone operation after muting.
2~ More particularly, having regard to the embodiment illustrated in Figure 4, transistor Q3 is normally an (l.c. saturated by the bias voltage applied across its base-emitter' junction) as a result of the base-emitter voltage applied theseta via diodes pi, so that the microphone 13 is normally connected to the Line. The use of dual diode D 1 ensures two distinct states for operation of transistor Q3 (on and off), regardless of 30 variations in parameters of the microphone and transistor Q3. The transistors Q1 and Q2 are normally off (i.e_ the click eliminator cucuit 17A does not normally short circuit the microphone 13), capacitor Cl is normally charged to the voltage across R1 and capacitor C2 is normally charged to a low voltage which is insufficient to turn on transistor Q2. Upon closing switch 15, capacitor C2 begins to charge slowly through resistors R6, R4, RS and R7 and capacitor C 1 begins to discharge slowly thereby gradually turning on transistor Q2 so as to create a short circuit across the terminals of microphone 13. Shortly after the switch 15 is depressed, the voltage at the input of the detection circuit 21 begins to fall and the headset switch detect signal changes state so as to indicate mute switch detection. The duration of the headset switch detect signal is slightly longer than actual depression of the mute switch 15. The speed of the t0 click elimination circuit 17A is governed by the choice of capacitors C1, C2 and resistors R1, R6, RS and R7, and further regulated by the turning on of transistor Q 1.
More particularly, the equivalent resistance of transistor Q2 together with the remaining resistors forms a voltage divider with resistor R1. The current through transistor Q1 is small (in both on and off states) because resistor R1 is of high resistance (e.g. S l OK ohm). Once the short circuit is fully established (i.e. the click eliminator circuit 17A is fully on), Q3 is no longer forward biased (as a result of the short circuit through transistor Q2) and turns off, thereby completely disconnecting the microphone 13 from the line and yielding a hard mute (80dB).
2o Turning to Figure 5, a preferred embodiment of the click-free muting circuit is shown. The circuit of Figure 5 is identical to the circuit of Figure 4 but includes a pair of additional resistors R23 and R24. Resistor R23 is connected between the base and emitter of transistor Q2, while resistor 24 is connected across the dual diode D 1.
The addition of resistor 23 regulates the timing and duration of the headset switch detect signal generated by detection circuit 25 such that the duration of the signal becomes approximately the same as the duration of depression of the mute switch 15 but is delayed therefrom by a short amount (approximately 100ms in the preferred embodiment). The differences in timing of the headset_switch detect signal with and without R23 is set forth in Figure 6. As a consequence of the addition of resistor R23, transistor Q1 and resistors R2 and R3 can be eliminated (not shown as eliminated in Figure 5), resulting in a lower cost circuit. In this latter configuration operation is similar to the circuit of Figure 4 in that the duration of the headset switch detect signal becomes slightly longer than the actual duration of mute switch depression. Furthermore, the detection voltage range at the input of detection circuit 25 is somewhat smaller.
Resistor R24 is a zero Ohm resistance which can be used to replace the dual diode D 1 (again, the elimination of diodes D 1 is not shown in Figure 5), to reduce the cost of the circuit while providing essentially the same functionality. Since resistor to R24 exhibits zero resistance (theoretically), it can be eliminated so that either only one diode D 1 or no diode can be provided (not shown). If one or both diodes D 1 are eliminated in favour of resistor R24 (or no resistor whatsoever) then care must be taken to choose a transistor Q3 having few variations in its stated operating parameters.
Although the switch 15 is shown located at the headset 7, it is also contemplated that the switch could be located at a headset interface box (not shown) between the headset 7 and telephone set 1. In either case, provision of the local switch 15 relieves the user from having to reach over to the set in order to mute the 2o microphone 13. It is also contemplated that the switch 15 can be installed as a retrofit to existing headsets in the form of a series device which can dangle from the cable connecting the headset 7 to the telephone set 1 or interface box .
Other embodiments and variations are possible without departing from the sphere and scope of the invention as defined by the claims appended hereto.
With reference to Figure 2 in combination with Figure l, according to the present invention, a switch 15 is connected to a click-free muting circuit 17 which, in turn, is connected across the terminals of microphone 13. Thus, the circuit 17 is connected between the microphone 13 and the microphone audio line connector 19 of the telephone set 1.
2o Headset microphone bias circuit 21 provides bias current for the microphone 13, in a well known manner. A microphone amplifier 23 is connected differentially to the bias circuit 21 for amplifying the low voltage output signals therefrom.
An output of microphone amplifier 23 (analog_signal) is connectable to a phone chip (not shown) within the telephone set 1, in a well known manner. Although not shown, the earpieces 11 of the headset 7 and the earpiece of the handset 3 are normally connected together and to an output of the phone chip.
A headset detector circuit 25 is connected to the output of microphone bias circuit 21 for providing a signal (headset detect) to the phone chip for indicating that 3o headset 7 is connected to the set 1. Since many headsets are connected to telephones via a "quick-disconnect" plug, when the handset 3 is left in its cradle and the headset 7 1s dlscoz'lnected, it is still possible to use the telephone via the handset operation. Thr detector circuit ?5 also generates a signal (headset switch_detect) indicative of a momentary depression of the rrlute snitch 15 for interpretation by the phone chip ;~s a hookswitch event for invoking a telephone special feature (e_g. soft hold, call forward, etc.). The structure and operation of the circuit z5 is discussed in greater detail in co-assigned U.S. Patent No. 5833075 entitled ''Off Hoak Detector far Headset".
With reference to Figure 3, the muting circuit 17 is shown comprising a click IO eliminator circuit 17A and. a hard sxiuting circuit I7B. An implementation of the circuit 17 is shown according to the preferred embodiment with reference to the schematic diagram of fiigure g.
Tn operation, circuit I7 steals current from the bias circmt 21, so that no extra power supply is required. When the switch I~ is closed, the click eliminator circuit 17A slowly creates a short ciretut across the microphone 13, thereby suppressing any impulse click noise from being created. Once the click eliminator circuit I7A
has fully short circuited the microphone 13, hard muting circuit 17B completely disconnects the microphone I3, thereby resulting in a hard mute (80d$). When the switch 15 ~s 2U released, hard muting circuit 17B re-connects the microphone I3 and click eliminator circuit 17A slowly removes the short circuu across the ttucrophone 13 , thereby again suppressing unpulse switch noise during resumption of microphone operation after muting.
2~ More particularly, having regard to the embodiment illustrated in Figure 4, transistor Q3 is normally an (l.c. saturated by the bias voltage applied across its base-emitter' junction) as a result of the base-emitter voltage applied theseta via diodes pi, so that the microphone 13 is normally connected to the Line. The use of dual diode D 1 ensures two distinct states for operation of transistor Q3 (on and off), regardless of 30 variations in parameters of the microphone and transistor Q3. The transistors Q1 and Q2 are normally off (i.e_ the click eliminator cucuit 17A does not normally short circuit the microphone 13), capacitor Cl is normally charged to the voltage across R1 and capacitor C2 is normally charged to a low voltage which is insufficient to turn on transistor Q2. Upon closing switch 15, capacitor C2 begins to charge slowly through resistors R6, R4, RS and R7 and capacitor C 1 begins to discharge slowly thereby gradually turning on transistor Q2 so as to create a short circuit across the terminals of microphone 13. Shortly after the switch 15 is depressed, the voltage at the input of the detection circuit 21 begins to fall and the headset switch detect signal changes state so as to indicate mute switch detection. The duration of the headset switch detect signal is slightly longer than actual depression of the mute switch 15. The speed of the t0 click elimination circuit 17A is governed by the choice of capacitors C1, C2 and resistors R1, R6, RS and R7, and further regulated by the turning on of transistor Q 1.
More particularly, the equivalent resistance of transistor Q2 together with the remaining resistors forms a voltage divider with resistor R1. The current through transistor Q1 is small (in both on and off states) because resistor R1 is of high resistance (e.g. S l OK ohm). Once the short circuit is fully established (i.e. the click eliminator circuit 17A is fully on), Q3 is no longer forward biased (as a result of the short circuit through transistor Q2) and turns off, thereby completely disconnecting the microphone 13 from the line and yielding a hard mute (80dB).
2o Turning to Figure 5, a preferred embodiment of the click-free muting circuit is shown. The circuit of Figure 5 is identical to the circuit of Figure 4 but includes a pair of additional resistors R23 and R24. Resistor R23 is connected between the base and emitter of transistor Q2, while resistor 24 is connected across the dual diode D 1.
The addition of resistor 23 regulates the timing and duration of the headset switch detect signal generated by detection circuit 25 such that the duration of the signal becomes approximately the same as the duration of depression of the mute switch 15 but is delayed therefrom by a short amount (approximately 100ms in the preferred embodiment). The differences in timing of the headset_switch detect signal with and without R23 is set forth in Figure 6. As a consequence of the addition of resistor R23, transistor Q1 and resistors R2 and R3 can be eliminated (not shown as eliminated in Figure 5), resulting in a lower cost circuit. In this latter configuration operation is similar to the circuit of Figure 4 in that the duration of the headset switch detect signal becomes slightly longer than the actual duration of mute switch depression. Furthermore, the detection voltage range at the input of detection circuit 25 is somewhat smaller.
Resistor R24 is a zero Ohm resistance which can be used to replace the dual diode D 1 (again, the elimination of diodes D 1 is not shown in Figure 5), to reduce the cost of the circuit while providing essentially the same functionality. Since resistor to R24 exhibits zero resistance (theoretically), it can be eliminated so that either only one diode D 1 or no diode can be provided (not shown). If one or both diodes D 1 are eliminated in favour of resistor R24 (or no resistor whatsoever) then care must be taken to choose a transistor Q3 having few variations in its stated operating parameters.
Although the switch 15 is shown located at the headset 7, it is also contemplated that the switch could be located at a headset interface box (not shown) between the headset 7 and telephone set 1. In either case, provision of the local switch 15 relieves the user from having to reach over to the set in order to mute the 2o microphone 13. It is also contemplated that the switch 15 can be installed as a retrofit to existing headsets in the form of a series device which can dangle from the cable connecting the headset 7 to the telephone set 1 or interface box .
Other embodiments and variations are possible without departing from the sphere and scope of the invention as defined by the claims appended hereto.
Claims (7)
1. A click-free muting circuit for a headset microphone connected to a telephone, comprising:
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch, said click eliminator circuit comprising at least one first transistor having a current conducting path connected across said microphone and a control terminal connected via a capacitance to said mute switch such that in response to said closure of the mute switch bias voltage on said control terminal gradually increases thereby turning on said transistor and causing current to flow through said current conducting path, and a resistance connected in parallel to said capacitance; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit.
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch, said click eliminator circuit comprising at least one first transistor having a current conducting path connected across said microphone and a control terminal connected via a capacitance to said mute switch such that in response to said closure of the mute switch bias voltage on said control terminal gradually increases thereby turning on said transistor and causing current to flow through said current conducting path, and a resistance connected in parallel to said capacitance; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit.
2. The click-free muting circuit of claim 1, wherein said hard muting circuit comprises at least one further transistor having a current conduction path in series with said microphone and a control terminal connected to the current conducting path of said at least one first transistor such that current is drawn from said control terminal of said further transistor thereby turning off said further transistor and disconnecting said microphone via the current conduction path of said further transistor.
3. The click-free muting circuit of claim 1 wherein said at least one first transistor is a bipolar junction transistor.
4. A click-free muting circuit for a headset microphone connected to a telephone, comprising:
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit, said hard muting circuit comprising at least one further transistor-having a current conduction path in series with said microphone and a control terminal connected to the current conducting path of said at least one first transistor such that current is drawn from said control terminal of said further transistor thereby turning off said further transistor and disconnecting said microphone via the current conduction path of said further transistor, and at least one diode connected to a base terminal of said further transistor.
a user operated mute switch;
a click eliminator circuit connected across said microphone for gradually creating a short circuit across said microphone in response to closure of said mute switch; and a hard muting circuit connected in series with said microphone for disconnecting said microphone in response to said short circuit, said hard muting circuit comprising at least one further transistor-having a current conduction path in series with said microphone and a control terminal connected to the current conducting path of said at least one first transistor such that current is drawn from said control terminal of said further transistor thereby turning off said further transistor and disconnecting said microphone via the current conduction path of said further transistor, and at least one diode connected to a base terminal of said further transistor.
5. The click-free muting circuit of claim 4, wherein said click eliminator circuit further comprises at least one first transistor having a current conducting path connected across said microphone and a control terminal connected via a capacitance to said mute switch such that in response to said closure of the mute switch bias voltage on said control terminal gradually increases thereby turning on said transistor and causing current to flow through said current conducting path.
6. The click-free muting circuit of claim 5, further comprising a resistance connected in parallel to said capacitance.
7. The click-free muting circuit of claim 4 wherein said further transistor is a bipolar junction transistor.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9827184.4 | 1998-12-11 | ||
| GB9827184A GB2344711B (en) | 1998-12-11 | 1998-12-11 | Click-free muting circuit for headset |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2291884A1 CA2291884A1 (en) | 2000-06-11 |
| CA2291884C true CA2291884C (en) | 2006-01-31 |
Family
ID=10843975
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2291884 Expired - Lifetime CA2291884C (en) | 1998-12-11 | 1999-12-09 | Click-free muting circuit for headset |
Country Status (2)
| Country | Link |
|---|---|
| CA (1) | CA2291884C (en) |
| GB (1) | GB2344711B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2350256B (en) * | 1999-05-17 | 2001-05-30 | Mitel Corp | Click free mute switch circuit for telephones |
| JP7212935B2 (en) * | 2019-03-01 | 2023-01-26 | 株式会社オーディオテクニカ | headset |
| JP7305162B2 (en) * | 2019-06-19 | 2023-07-10 | 株式会社オーディオテクニカ | sound-electricity converter |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB592917A (en) * | 1945-06-08 | 1947-10-02 | Standard Telephones Cables Ltd | Improvements in or relating to volume control and mixing arrangements in broadcasting systems and the like |
| DE3108407A1 (en) * | 1981-03-06 | 1982-09-16 | Robert Bosch Gmbh, 7000 Stuttgart | "SOUND AUDIO" |
| US4675905A (en) * | 1985-04-12 | 1987-06-23 | Ampex Corporation | Multiple input silent audio switch |
| US5353347A (en) * | 1992-02-04 | 1994-10-04 | Acs Communications, Inc. | Telephone headset amplifier with battery saver, receive line noise reduction, and click-free mute switching |
| US5832075A (en) * | 1996-09-20 | 1998-11-03 | Mitel Corporation | Off-hook detector for headset |
| GB2342798B (en) * | 1998-10-16 | 2003-04-16 | Mitel Corp | Telephone headset click-free muting circuit |
-
1998
- 1998-12-11 GB GB9827184A patent/GB2344711B/en not_active Expired - Lifetime
-
1999
- 1999-12-09 CA CA 2291884 patent/CA2291884C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CA2291884A1 (en) | 2000-06-11 |
| GB2344711B (en) | 2004-02-25 |
| GB9827184D0 (en) | 1999-02-03 |
| GB2344711A (en) | 2000-06-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKEX | Expiry |
Effective date: 20191209 |