CA2218296A1 - Technique permettant de memoriser et de recouvrer une information relative a un controle d'erreur et appareil correspondant - Google Patents
Technique permettant de memoriser et de recouvrer une information relative a un controle d'erreur et appareil correspondantInfo
- Publication number
- CA2218296A1 CA2218296A1 CA002218296A CA2218296A CA2218296A1 CA 2218296 A1 CA2218296 A1 CA 2218296A1 CA 002218296 A CA002218296 A CA 002218296A CA 2218296 A CA2218296 A CA 2218296A CA 2218296 A1 CA2218296 A1 CA 2218296A1
- Authority
- CA
- Canada
- Prior art keywords
- sector
- check value
- data item
- error check
- storing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Correction Of Errors (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/424,771 US5630054A (en) | 1995-04-18 | 1995-04-18 | Method and apparatus for storing and retrieving error check information |
US08/424,771 | 1995-04-18 | ||
PCT/US1996/005342 WO1996033420A1 (fr) | 1995-04-18 | 1996-04-17 | Technique permettant de memoriser et de recouvrer une information relative a un controle d'erreur et appareil correspondant |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2218296A1 true CA2218296A1 (fr) | 1996-10-24 |
CA2218296C CA2218296C (fr) | 2005-06-28 |
Family
ID=23683795
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002218296A Expired - Fee Related CA2218296C (fr) | 1995-04-18 | 1996-04-17 | Technique permettant de memoriser et de recouvrer une information relative a un controle d'erreur et appareil correspondant |
Country Status (4)
Country | Link |
---|---|
US (1) | US5630054A (fr) |
EP (1) | EP0826153A1 (fr) |
CA (1) | CA2218296C (fr) |
WO (1) | WO1996033420A1 (fr) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6484269B1 (en) * | 1995-11-09 | 2002-11-19 | Emc Corporation | Data storage system and method with improved data integrity value calculation |
US6988235B2 (en) * | 2000-03-02 | 2006-01-17 | Agere Systems Inc. | Checksum engine and a method of operation thereof |
US7000034B2 (en) * | 2000-03-02 | 2006-02-14 | Agere Systems Inc. | Function interface system and method of processing issued functions between co-processors |
US6530043B1 (en) * | 2000-03-09 | 2003-03-04 | International Business Machines Corporation | Write data error checking in a PCI Bus system |
US6643821B2 (en) * | 2000-11-30 | 2003-11-04 | Stmicroelectronics, Inc. | Method and device for computing incremental checksums |
US6757845B2 (en) * | 2000-11-30 | 2004-06-29 | Bitmicro Networks, Inc. | Method and apparatus for testing a storage device |
US6317857B1 (en) * | 2001-01-12 | 2001-11-13 | Hewlett-Packard Company | System and method for utilizing checksums to recover data |
US7236501B1 (en) | 2002-03-22 | 2007-06-26 | Juniper Networks, Inc. | Systems and methods for handling packet fragmentation |
US7239630B1 (en) | 2002-03-22 | 2007-07-03 | Juniper Networks, Inc. | Dedicated processing resources for packet header generation |
US7212530B1 (en) | 2002-03-22 | 2007-05-01 | Juniper Networks, Inc. | Optimized buffer loading for packet header processing |
US7215662B1 (en) * | 2002-03-22 | 2007-05-08 | Juniper Networks, Inc. | Logical separation and accessing of descriptor memories |
US7283528B1 (en) | 2002-03-22 | 2007-10-16 | Raymond Marcelino Manese Lim | On the fly header checksum processing using dedicated logic |
DE10235381A1 (de) * | 2002-08-02 | 2004-02-19 | Robert Bosch Gmbh | Verfahren zum Überspielen wenigstens eines Datensatzes aus einer externen Datenquelle in eine Recheneinheit, sowie Recheneinheit |
US7676621B2 (en) * | 2003-09-12 | 2010-03-09 | Hewlett-Packard Development Company, L.P. | Communications bus transceiver |
JP4271602B2 (ja) * | 2004-03-04 | 2009-06-03 | 富士通株式会社 | 転送データの正当性を判定する装置および方法 |
JP4555834B2 (ja) * | 2004-12-27 | 2010-10-06 | 富士通株式会社 | 転送データの正当性を判定する装置及び方法 |
US7779330B1 (en) * | 2005-11-15 | 2010-08-17 | Marvell International Ltd. | Method and apparatus for computing checksum of packets |
US7721049B2 (en) * | 2006-03-27 | 2010-05-18 | Kabuhsiki Kaisha Toshiba | Disk drive write method |
US9002812B2 (en) * | 2012-04-01 | 2015-04-07 | Microsoft Technology Licensing, Llc | Checksum and hashing operations resilient to malicious input data |
KR20180055148A (ko) * | 2016-11-16 | 2018-05-25 | 에스케이하이닉스 주식회사 | 반도체장치 및 반도체시스템 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3887901A (en) * | 1974-04-29 | 1975-06-03 | Sperry Rand Corp | Longitudinal parity generator for mainframe memories |
DE3122381A1 (de) * | 1981-06-05 | 1982-12-23 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes |
US4667326A (en) * | 1984-12-20 | 1987-05-19 | Advanced Micro Devices, Inc. | Method and apparatus for error detection and correction in systems comprising floppy and/or hard disk drives |
US5212785A (en) * | 1990-04-06 | 1993-05-18 | Micro Technology, Inc. | Apparatus and method for controlling data flow between a computer and memory devices |
US5134619A (en) * | 1990-04-06 | 1992-07-28 | Sf2 Corporation | Failure-tolerant mass storage system |
US5233618A (en) * | 1990-03-02 | 1993-08-03 | Micro Technology, Inc. | Data correcting applicable to redundant arrays of independent disks |
US5195100A (en) * | 1990-03-02 | 1993-03-16 | Micro Technology, Inc. | Non-volatile memory storage of write operation identifier in data sotrage device |
US5214778A (en) * | 1990-04-06 | 1993-05-25 | Micro Technology, Inc. | Resource management in a multiple resource system |
US5191584A (en) * | 1991-02-20 | 1993-03-02 | Micropolis Corporation | Mass storage array with efficient parity calculation |
US5404454A (en) * | 1991-02-28 | 1995-04-04 | Dell Usa, L.P. | Method for interleaving computer disk data input-out transfers with permuted buffer addressing |
-
1995
- 1995-04-18 US US08/424,771 patent/US5630054A/en not_active Expired - Lifetime
-
1996
- 1996-04-17 CA CA002218296A patent/CA2218296C/fr not_active Expired - Fee Related
- 1996-04-17 WO PCT/US1996/005342 patent/WO1996033420A1/fr active Application Filing
- 1996-04-17 EP EP96912857A patent/EP0826153A1/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
CA2218296C (fr) | 2005-06-28 |
US5630054A (en) | 1997-05-13 |
WO1996033420A1 (fr) | 1996-10-24 |
EP0826153A1 (fr) | 1998-03-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |