CA2145549A1 - Configuration multi-standard - Google Patents

Configuration multi-standard

Info

Publication number
CA2145549A1
CA2145549A1 CA2145549A CA2145549A CA2145549A1 CA 2145549 A1 CA2145549 A1 CA 2145549A1 CA 2145549 A CA2145549 A CA 2145549A CA 2145549 A CA2145549 A CA 2145549A CA 2145549 A1 CA2145549 A1 CA 2145549A1
Authority
CA
Canada
Prior art keywords
huffman
data words
decoder
jpeg
coded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2145549A
Other languages
English (en)
Other versions
CA2145549C (fr
Inventor
Adrian Philip Wise
William Philip Robbins
Anthony Peter John Claydon
Martin William Sotheran
Anthony Mark Jones
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chartoleaux KG LLC
Original Assignee
Discovision Associates
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB9405914A external-priority patent/GB9405914D0/en
Application filed by Discovision Associates filed Critical Discovision Associates
Publication of CA2145549A1 publication Critical patent/CA2145549A1/fr
Application granted granted Critical
Publication of CA2145549C publication Critical patent/CA2145549C/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3871—Asynchronous instruction pipeline, e.g. using handshake signals between stages
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3873—Variable length pipelines, e.g. elastic pipeline
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/13—Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/91—Entropy coding, e.g. variable length coding [VLC] or arithmetic coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Image Processing (AREA)
  • Television Systems (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)
  • Color Television Systems (AREA)
CA002145549A 1994-03-24 1995-03-22 Configuration multi-standard Expired - Lifetime CA2145549C (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB9405914A GB9405914D0 (en) 1994-03-24 1994-03-24 Video decompression
GB9504047.3 1995-02-28
GB9504047A GB2288521B (en) 1994-03-24 1995-02-28 Reconfigurable process stage
GB9405914.4 1995-02-28

Publications (2)

Publication Number Publication Date
CA2145549A1 true CA2145549A1 (fr) 1995-09-25
CA2145549C CA2145549C (fr) 2001-02-20

Family

ID=26304581

Family Applications (3)

Application Number Title Priority Date Filing Date
CA002145219A Expired - Fee Related CA2145219C (fr) 1994-03-24 1995-03-22 Systeme de pipe-line incluant une phase modeleuse inversee, une phase de transformation cosinus inversee et une phase de traitement
CA002145549A Expired - Lifetime CA2145549C (fr) 1994-03-24 1995-03-22 Configuration multi-standard
CA002145426A Abandoned CA2145426A1 (fr) 1994-03-24 1995-03-23 Utilisation de jetons dans un systeme de decompression de video sur pipeline.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CA002145219A Expired - Fee Related CA2145219C (fr) 1994-03-24 1995-03-22 Systeme de pipe-line incluant une phase modeleuse inversee, une phase de transformation cosinus inversee et une phase de traitement

Family Applications After (1)

Application Number Title Priority Date Filing Date
CA002145426A Abandoned CA2145426A1 (fr) 1994-03-24 1995-03-23 Utilisation de jetons dans un systeme de decompression de video sur pipeline.

Country Status (5)

Country Link
JP (4) JP3302527B2 (fr)
KR (1) KR100291532B1 (fr)
CN (2) CN1137212A (fr)
CA (3) CA2145219C (fr)
GB (1) GB2288521B (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2794601B1 (fr) * 1999-06-02 2001-07-27 Dassault Automatismes Installation de communication pour une reception collective d'informations, notamment d'images de television numerique et/ou de donnees multimedia
EP1148727A1 (fr) * 2000-04-05 2001-10-24 THOMSON multimedia Méthode et appareil pour décoder un signal vidéo numérique dans un système de vidéo numérique avec insertion d'entêtes factices
KR100354768B1 (ko) 2000-07-06 2002-10-05 삼성전자 주식회사 영상 코덱 시스템, 그 시스템과 외부 호스트 시스템과의데이터 처리방법 및 그 시스템에서의 인코딩/디코딩제어방법
US8284844B2 (en) 2002-04-01 2012-10-09 Broadcom Corporation Video decoding system supporting multiple standards
KR100722428B1 (ko) * 2005-02-07 2007-05-29 재단법인서울대학교산학협력재단 리소스 공유 및 파이프 라이닝 구성을 갖는 재구성가능배열구조
US7873105B2 (en) 2005-04-01 2011-01-18 Broadcom Corporation Hardware implementation of optimized single inverse quantization engine for a plurality of standards
KR100711088B1 (ko) * 2005-04-13 2007-04-24 광주과학기술원 동화상 인코더를 위한 정수 변환 장치
KR100718135B1 (ko) 2005-08-24 2007-05-14 삼성전자주식회사 멀티 포맷 코덱을 위한 영상 예측 장치 및 방법과 이를이용한 영상 부호화/복호화 장치 및 방법
KR101354659B1 (ko) 2006-11-08 2014-01-28 삼성전자주식회사 멀티 코덱을 지원하는 움직임 보상 방법 및 장치
JP5698428B2 (ja) * 2006-11-08 2015-04-08 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 動き補償方法、記録媒体及び動き補償装置
KR101553648B1 (ko) 2009-02-13 2015-09-17 삼성전자 주식회사 재구성 가능한 구조의 프로세서
WO2011120233A1 (fr) * 2010-04-02 2011-10-06 富士通株式会社 Appareil et procédé de génération de code de couverture orthogonal (occ), et appareil et procédé de mappage d'occ
US8413166B2 (en) * 2011-08-18 2013-04-02 International Business Machines Corporation Multithreaded physics engine with impulse propagation
US10219006B2 (en) * 2013-01-04 2019-02-26 Sony Corporation JCTVC-L0226: VPS and VPS_extension updates
US9395990B2 (en) * 2013-06-28 2016-07-19 Intel Corporation Mode dependent partial width load to wider register processors, methods, and systems
JP6223323B2 (ja) * 2014-12-12 2017-11-01 Ｎｔｔエレクトロニクス株式会社 小数画素生成方法
EP3317973A4 (fr) * 2015-07-03 2019-03-06 INTEL Corporation Appareil et procédé de compression de données dans un dispositif vestimentaire
CN109284822B (zh) * 2017-07-20 2021-09-21 上海寒武纪信息科技有限公司 一种神经网络运算装置及方法
CN109901044B (zh) * 2017-12-07 2021-11-12 英业达科技有限公司 多电路板的中央处理单元差分测试系统及其方法
CN113591795B (zh) * 2021-08-19 2023-08-08 西南石油大学 一种基于混合注意力特征金字塔结构的轻量化人脸检测方法和系统

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0576749B1 (fr) * 1992-06-30 1999-06-02 Discovision Associates Système de données en pipeline
US4680581A (en) * 1985-03-28 1987-07-14 Honeywell Inc. Local area network special function frames
US5325092A (en) * 1992-07-07 1994-06-28 Ricoh Company, Ltd. Huffman decoder architecture for high speed operation and reduced memory
US5298896A (en) * 1993-03-15 1994-03-29 Bell Communications Research, Inc. Method and system for high order conditional entropy coding
US5699460A (en) * 1993-04-27 1997-12-16 Array Microsystems Image compression coprocessor with data flow control and multiple processing units

Also Published As

Publication number Publication date
KR950033896A (ko) 1995-12-26
CA2145426A1 (fr) 1995-09-25
GB2288521A8 (en) 1996-04-15
CA2145549C (fr) 2001-02-20
JPH0870453A (ja) 1996-03-12
JPH08116260A (ja) 1996-05-07
KR100291532B1 (ko) 2001-06-01
GB9504047D0 (en) 1995-04-19
GB2288521B (en) 1998-10-14
JPH11266460A (ja) 1999-09-28
CN1137212A (zh) 1996-12-04
JPH0918871A (ja) 1997-01-17
CN1235483A (zh) 1999-11-17
CA2145219A1 (fr) 1995-09-25
GB2288521A (en) 1995-10-18
CA2145219C (fr) 2001-11-27
JP3302527B2 (ja) 2002-07-15

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Effective date: 20150323