CA2112909A1 - Dynamic limiting circuit - Google Patents

Dynamic limiting circuit

Info

Publication number
CA2112909A1
CA2112909A1 CA 2112909 CA2112909A CA2112909A1 CA 2112909 A1 CA2112909 A1 CA 2112909A1 CA 2112909 CA2112909 CA 2112909 CA 2112909 A CA2112909 A CA 2112909A CA 2112909 A1 CA2112909 A1 CA 2112909A1
Authority
CA
Canada
Prior art keywords
signal
amplifier
input signal
level
dynamic range
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA 2112909
Other languages
French (fr)
Inventor
Walter Link
Stefan Schradi
Udo Link
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Deutsche Thomson Brandt GmbH
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2112909A1 publication Critical patent/CA2112909A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G7/00Volume compression or expansion in amplifiers
    • H03G7/002Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers
    • H03G7/005Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers using discontinuously variable devices, e.g. switch-operated
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3005Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers
    • H03G3/301Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers the gain being continuously variable
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G7/00Volume compression or expansion in amplifiers
    • H03G7/002Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers
    • H03G7/004Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers using continuously variable impedance devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Amplifiers (AREA)

Abstract

In prior art acoustic reproduction systems to the input of which signals are fed from tape players, record players, radio receivers and the like, listening enjoyment may be adversely affected by fast readjustment of the dynamics. It is proposed in the invention to limit the dynamics of an amplifier connected to a circuit of the invention only after a predetermined time after the level of an input signal has been exceeded. There is a time function element (16) to which is fed a signal which represents a measure of the difference between a predetermined level (VR) and the actual level of an input signal. On the other hand the time unit (16) causes the dynamics to be limited by controlling switching means (17) only after a predetermined time. It is thus possible to maintain linear amplification in cases of only brief excessive rises in the input signal. In the reproduction of audio signals, this has the special advantage that listening enjoyment is not adversely affected by only brief increases or excessive increases in the level.

Description

D91tO65 (G910834s) 211 2 9 0 9 Circuit arrangement for limiting dynamic range The present invention relates to a circuit arrangement for limiting dynamic range in accordance with the first part of claim 1.
A circuit arrangement for regulating or limiting the dynamic range usually serves for altering the amplification of an amplifier stage in dependence on the signal level of thé
signal which is to be amplified. On the one hand thereby, signals having a low level can be sufficiently amplified. On the other hand however, one avoids signals having a high leYel from leading to an excessively large output signal.
If the signal to be amplified is an acoustic signal, damage to the systems such as loudspeakers, headphones etc which are connected to the amplifier can be avoided by a limitation of the dynamic range.
A circuit arrangement for automatically regulating or limiting the dynamic range is known ~or example from DE-OS 30 27 715.
The circuit arrangement presented there has the effect that the amplification of the system utilised is reduced as quicldy as possible upon the occurrence of a sudden increase in amplitude.
In acoustic reproduclion systems, to which signals from tape reproduction devices, record players, broadcast receivers and the like are supplied at the input, there can be a loss of listening pleasure due to the rapid regulating of the dynamic range.
, The object of the pr~sent invention is to not limit the dynamic range for a mere short term high level of an input signal.
This object is achieved for a circuit arrangement of this category by the features of claim 1.
In accordance with the invention, it is proposed that the dynamic range of an amplifier connected to the circuit arrangement in accordance with the invention is only limited after a predetermined time following an input signal exceeding the level.
There is provided a timing member to which, on the one hand, a signal is supplied that represents a measure for the difference between a predetermined level and the actual level of the input signal. On the other hand, by controlling switching means, the timing member;
causes a limiting of the dynamic range to occur only after a predetermined time period.
Thereby, in the cases where the input signal only exceeds the level for short periods of time, a linear amplification can be maintained.
For the reproduction of audio signals, this has the particular advantage that there is no ; ~
detraction from the listening pleasure during mere short term increases in or overstepping of ~:
the level.
If the predetermined level is selected, in dependence upon an electro acoustic transducer connected to the amplifier device, in such a way that, above a corresponding sound D91/065 (G9108349) , 21 pressure, health problems can be expected due to the long term effect upon a listener, then these problems are avoided by the circuit arrangement in accordance with the invention.
Further features, advantages and details of the invention will be expla1ned in the following embodiments witb the help of the drawing. Tberein -~ -Fig. 1 shows the block circuit diagram of a first preferred embodiment;
Fig. 2 the circuit diagram of the embodiment illustrated in Fig. l;
. ~......
Fig. 3 the block circuit diagram of a second preferred embodiment; - ;
: .
Fig. 4 the circuit diagram of the embodiment illustrated in Fig. 3; - ~
, . . ..
Before going into the detail of the description of the embodiments, it is pointed out that tbe individually illustrated blocks in the Figures merely serve for a better understanding.
Usually, individual ones or several of these blocks are combined into units. These may be realised in integratesl or hybrid technology or as a program controlled micro-computer or as ~ ~ ~
a part of a program suitable for its control. ~ -;
However, the elements contained in the individual stages may also be executed separately. - -Hereinafter9 means ;md signal paths having the same significance are respectively provided with the same reference symbols and, once they have been described, they will only be gone into again in the further description in so far as this is necessary for an understanding -of the present invenlion.
The block circuit diagram of a first preferred embodiment is shown in Fig. 1. An audio `
reproduction device 10 contains a power amplifier 11 to which signals from non-illustrated stages are supplied via its input. The output signal of the power amplifier 11 is supplied on the one hand to a loudspeaker 12 or, more generally, to an electro acoustic transducer and, on the other hand, to the input of a smoothing member 13. The output signal of this smoothing member 13 then reaches a threshold value stage 14 and the control input of an ~ ~ -adJusting stage 15.
The r~eferénce voltage Ur is supplied as a threshold value to t~le threshold value stage 14 and ~ ~ ~
the output of the stage 14 is connected to a timing member 16 whose output signal leads to ~ ~ -the control input o~ a switch means 17. If its switch ~ontact is closed, then the first signal terminal l5a of the adjusting stage 15 is connected to earth. The second signal terminal lSb leads to the centre tap of a volume control l8 and to the volume control input 19 of the audiorepr~duction device 10.
The functioning of the embodiment in accordance with Fig. 1 will be explained with the help of Fig. 2 in which a preferred version of this embodiment is illustrated by means of a circui~ diagram.
The signal amplified by the power amplifier 11 is rectified, filtered and smoothed by the smoothing member 13. To this end, there is provided a semiconductor diode 13a to whose ~ -anode the amplified signal is applied. - ~

,~, . ~.

D91/065 (G9108349~ i 29 Q ~ 3 The signal rectified in this manner is smoothed by a load capacitor 13b and also a filter member which consists of a filter resistor 13c and a filter capacitor 13d.
Thereby, first terminals of the capacitors 13b, 13d are connected by the resistor 13c and ~ -second terminals of these capacitors lead to earth.
The signal smoothed in this manner is led to the input of the threshold value stage 14, more precisely expressed, to the first terminal of a first input resistor 14a. A second input resistor 14b, on whose first terminal the negative reference voltage Ur is present in this version, is connected by its second terminal to the second terminal of the first input resistor 14a. This common terminal is connected to the non-inverting input of an operational amplifier 14c whose inverting input is connected to earth The output of this operational amplifier 14c is connected on the one hand to the non-inverting input via a feedback resistor 14d and to the input of the timing member 16 on the other.
If the smoothed signal present on the first input resistor 14a exceeds a threshold value predetermined by the value of the reference voltage Ur, then the positive operating uoltage, which is supplied to the operational ampli~ler at a non-illustrated supply input, is present at the output of the threshold value stage 14.
In this embodiment, the timing member 16 following the threshold value stage 14 consists of a timing capacitor 16a which is connected at one terminal to earth and its second terminal is connected via a timing resistor 16b to the output of the timing member 14.
The choice of values for the components 16a and 16b determines a time constant, or a time period, after which the switching means 17, here consisting of a switching potentiometer 17a, a switching resistor 17b and a switching transistor 17c, is rendered conductive.
. . .
The first signal terminal lSa of the adjusting stage lS is connected then to earth via the `~
conductive transistor 17c. In this embodiment, the adjusting stage 15 consists of an npn -transistor lSc, which is provided at its base with an adjusting trimmer lSd that leads to the output of the smoothing member 13. The collector of the adjusting transistor 15c is connected via an adjusting resistor lSe to the volume control input 19 of the device 10. `
The controlling of the adjusting transistor 15c via its base acts, between its emitter and its collector, like a variable resistor which is connected in parallel with the volume control 18.
When the control level is high, this resistor is small which leads to the voltage on the volume control input 19 being reduced without operating the volume control 18. For high `
levels of the output signal of the power stage 11, this leads to a reduction of its amplification and thus to a limiting of the dynamic range.
The use of the following components has proved to be particularly suitable for realising the version of the first embodiment:
I)iode 13a: AA 143 (npn Ge; low threshold voltage), Capacitor 13b: 0.22 ~uF (electrolytic) Resistor 13c: 270 ohm, Capacitor 13d: 100 ~uF (electrolytic), Resistor 14a: 15 kohm, ~:, -' .~ ' '.

D91/065 (G9108349) 21 12 9 0 9 ~ ~

Resistor 14b: 11 kohm, Amplifier 14c: 741 (TTL), Resistor 14d: 46.2 kohm, ~ - -Transistor l5c: AC 187K (npn ~e; low threshold voltage), Trimmer 15d: 30 kohm, ~ ;
Resistor l5e: 1.6 kohm, Capacitor 16a: 330 ~F (electrolytic), - ~ ~ -Resistor 16b: 3.3 kohm, :
Potentiometer 17a: 199 ohm (500 ohm), Resistor 17b: 10 kohm, Transistor 17c: BC 548 (npn silicon), Potentiometer 18: 50kohm, Electro acoustic transducer 12: headphones having impedance of 30.6 Ohm With the use of these components, there results the attributes which will make hysteresis possible. That is to say, that for a rising level of the input signal, the threshold value stage 14 then emits a signal having a first value (here, the positive supply voltage) to the timing member when the smoothed signal at the non-inverting input of the operational amplifier ; ;~
14c exceeds a first threshold value.
The value of the signal furnished to the timing member 16 is maintained until such tirne as the smoothed signal at the non-inverting input of the operational amplifier 14c falls below a -second threshold value. A signal having a second value (here, negative supply voltage) is then furnished to the timing member l6.
The first value of the said signal causes the timing capacitor 16a to be charged and renders the switching transistor 17c conductive upon exceeding a predetermined voltage. ~; ~
The second value of the said signal causes the timing capacitor 16a to be discharged so that ~ ~;
the switching transistor 17c is blocked upon falling below the predetermined voltage.
For the avoidance of long term health damage, the threshold value stage 14 should respond in such a way that a longer lasting, ca 3 seconds, exceeding of a sound pressure level of 83 dl~ leads to a limiting of the dynamic range.
It has been shown that by using components in accordance with the enumerated component list and, in addition, ~ a reference voltage~ Ur of -3 volts at the input of the threshold value stage~l4, the voltage value of I00 mV has to be exceeded.
; .
Falling below~ a sound pressure level of 79 dE~, corresponding to 45 mV at the input of the -threshold~value stage 14, leads to the negative operating voltage being present at its output.
s This~causes a discharge of the tin~ing capacitor 16a and thus a withdrawaI of the dynamic range limiting.
The block clrcuit diagram of a second embodiment is illustrated in Fig. 3. - -The main difference relative to the first embodiment consists in that a difference value `;
between the smoothed input signal and the reference voltage serves as the control magnitude for the dynamic range limiting. In a ~lrst version, there is additionally provided an amplifier :: .:., ......

: : . - :.' . :~

D91/065 (G9108349) ~ 5 ` 21~2~9 stage, hereinafter referred to as an interm~diate amplifier 20, which is connected between a pre-amplifier 21 and the power amplifier 11. In this embodiment, the dynamic range of this additional amplifier stage is limited.
The output signal of the pre-amplifier 21 is supplied to the smoothing member 13 which supplies a rectified and smoothed signal to the threshold value stage 14 on the one hand, and, to a first signal terminal of a signal switch 27 on the other.
The reference voltage Ur, which moreover reaches the first signal terminal of a reference switch 28, is supplied as a threshold value to the threshold value stage 14. ~ ~ -The control inputs of the switches 27, 28 are connected to the outputs of the timing member 16. The second signal terminals of the switches 27 and 28 respectively lead to the non-inverting and the inverting input of a differential amplifier 29.
The differential amplifier 29 compares the rectified and smoothed signal voltage with the reference voltage Ur. An output signal, whose value is dependent on the difference of the voltages, is furnished from the differential amplifier 29 to a control input of the intermediate amplifier 20 whose amplification factor is reduced, with increasing difference, by the value of the output signal.
- . . .
A preferred version of this second embodiment is provided by the circuit diagram of Fig. 4.
As to the details hereof, these will only be gone into in so far as it is essential for the understanding of the present invention.
. ~ :
The switches 27 and 28 were realised by means of npn bipolar transistors. The differential amplifier 29 exhibits a known circuit which contains an operational amplifier. ;
The intermediate amplifier 20 comprises an operational amplifier 20a and a feedback resistor 20b. An input impedance is formed by the resistor 20c and a field effect transistor 20d whose gate forms the control input of the intermediate arnplifier and is connected to the output of the differential amplifier 29.
The reference voltage Ur is obtained by the voltage drop at the centre tap of a reference voltage resistor 30 which is connected between the positive supply voltage +Ub and earth.
The positive reference voltage thereby obtained is supplied to the inverting input of the operationalamplifier 14c.
In dependence on the voltage value of the intermediate amplifier 29, the field effect transistor 20d alters its value and thus the amplification of the intermediate amplifier 20, at whose input the output signa1 of the pre-amplifier 21 is present, is controlled. Since the output signal of the intermediate amplifier 20 is supplied to the power amplifier 11 as an input signal, the dynarnic range of the whole system, which comprises the device 10, is limited.
Versions of the second embodiment may exhibit at least one of the following variations~
- a field effect transistor may serve as the intermediate amplifier 20, which transistor is connected by the source and drain terminals between the positive supply voltage ~Ub and D91/065 (G9108349) 21~2 9 ~ 9 6 earth. It can be controlled via its gate terminal by a supèrposed signal consisting of the input signal and the diff~rence signal in such a way that an output signal, which can be supplied to the power amplifier l 1, is derivable at its drain terminal;
- furthermore, the difference signal may serve as a control signal for driving a field effect transistor as a variable resistor. The modulated input signal thereby obtained can be -supplied either to the power amplifier 11 or to an intermediate amplifier 20 having a fixed ;
preidetermined amplification factor.

- ~ ::: :-~, -'. ': ','- ., ' , ~

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Claims (5)

Claims
1. Circuit arrangment for limiting the dynamic range of an associated amplifier device (11, 21) to which an input signal having different levels is supplied, wherein there is provided a timing member (16) to which a signal is supplied that represents a measure for the difference between a predetermined level (Ur) and the actual level of a signal derived from the input signal on the one hand and that effects a limiting of thedynamic range only after a predetermined time period by controlling switching means (17; 27, 28) on the other hand, characterised in that, the associated amplifier device (11, 21) is provided with an appertaining amplification adjusting member (18) and that the limiting of the dynamic range is effected by an adjusting stage (15) which is connected to the amplification adjusting member (18).
2. Circuit arrangement in accordance with Claim 1, characterised in that, the associated amplifier device (11, 21) comprises a pre-amplifier (21) and a power amplifier (11) and that there is provided an intermediate amplifier (20) which is connected between the pre-amplifier (21) and the power amplifier (11) and its amplification factor is controlled by a signal whose value depends on the difference between the input signal and the reference signal (Ur).
3. Circuit arrangment in accordance with either of the Claims 1 or 2, characterised in that, the input signal corresponds to an acoustic signal, that the output signal of the associated amplifier device (11, 21) is supplied directly or indirectly to an electro acoustic transducer (12) and that the predetermined level (Ur) is determined in such a way that the relevant level of the input signal corresponds to a sound pressure produced by the electro acoustic transducer (12) whose long term effect leads to health problems for a listener.
4. Circuit arrangement in accordance with Claim 3, characterised in that, the associated amplifier device (11, 21) is part of an audio reproduction device (10) and the electro acoustic transducer (12) is constructed as an earpiece or headphones.
5. Circuit arrangement in accordance with any of the Claims 1 to 4, characterised in that, the limiting of the dynamic range exhibits a hysteresis function such that there results a reduction of the dynamic range for a first threshold value of the predetermined level (Ur) and an ensuing increase of the dynamic range for a second threshold value of the predetermined level (U1) wherein the first threshold value lies above the lower !
threshold value.
CA 2112909 1991-07-06 1992-01-24 Dynamic limiting circuit Abandoned CA2112909A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE9108349U DE9108349U1 (en) 1991-07-06 1991-07-06 Circuit arrangement for dynamic limitation
DEG9108349.4U 1991-07-06

Publications (1)

Publication Number Publication Date
CA2112909A1 true CA2112909A1 (en) 1993-01-21

Family

ID=6869037

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2112909 Abandoned CA2112909A1 (en) 1991-07-06 1992-01-24 Dynamic limiting circuit

Country Status (4)

Country Link
JP (1) JPH06508724A (en)
CA (1) CA2112909A1 (en)
DE (1) DE9108349U1 (en)
WO (1) WO1993001655A1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3364785D1 (en) * 1982-01-15 1986-09-04 Telefunken Fernseh & Rundfunk Circuit arrangement for generating a d.c. control voltage dependent upon an a.c. voltage
US4928307A (en) * 1989-03-02 1990-05-22 Acs Communications Time dependent, variable amplitude threshold output circuit for frequency variant and frequency invariant signal discrimination

Also Published As

Publication number Publication date
JPH06508724A (en) 1994-09-29
WO1993001655A1 (en) 1993-01-21
DE9108349U1 (en) 1991-11-14

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