CA2112252A1 - Arbitrary waveform generator architecture - Google Patents
Arbitrary waveform generator architectureInfo
- Publication number
- CA2112252A1 CA2112252A1 CA 2112252 CA2112252A CA2112252A1 CA 2112252 A1 CA2112252 A1 CA 2112252A1 CA 2112252 CA2112252 CA 2112252 CA 2112252 A CA2112252 A CA 2112252A CA 2112252 A1 CA2112252 A1 CA 2112252A1
- Authority
- CA
- Canada
- Prior art keywords
- waveform generator
- frequency
- arbitrary waveform
- register
- produce
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/03—Digital function generators working, at least partly, by table look-up
- G06F1/0321—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
- G06F1/0328—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers in which the phase increment is adjustable, e.g. by using an adder-accumulator
- G06F1/0335—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers in which the phase increment is adjustable, e.g. by using an adder-accumulator the phase increment itself being a composed function of two or more variables, e.g. frequency and phase
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2101/00—Indexing scheme relating to the type of digital function generated
- G06F2101/08—Powers or roots
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
A method of direct digital synthesis of linear frequency modulated wave forms comprising the steps of: at a given regular time, adding a fixed frequency increment word (1) to a frequency control value stored in a first register (4) to produce a lineally increasing frequency control word; adding the frequency control word stored in the first register (4) to a second register (8) to form a quadratically increasing phase word; converting the quadratically increasing phase word to an amplitude value using a lookup table stored in a memory means (9) to produce a lineally increasing frequency, and periodically resetting the frequency control word to produce a frequency sawtooth. Also a device for implementing the method being an arbitrary waveform generator comprising a pluraality of accumulators (4+5, 7+8), a memory means (9), a convertor means (10) and a clock means (6).
Description
' WO 93/00737 . PCI`/AU92/00305 21~ 2252 .
ARBITRARY WAVEFORM GENERATOR ARCHITECTURE
~' ;~' BACKGROUND OF THE INVENTION
This invention relates to a method of digitally generating linear frequency modulated continuous wave (FMCW) waveforms at high frequency for use in 5 such applications as high-freq~ency radar systems.
In its most general sense the invention can be applied to any system requiring virtually any waveform. In this discussion its application in HF radar systems will be used as an example.
.~
;j Signal sources used in HF radar systems require very high dynamic range, 10 low phase noise and amplitude accuracy over a wide frequency band. In many applications they also require fast frequency switching and known ~, phase characteristics. Typical signal sources use one of two methods to generate these signals - phase~ locked loop synthesis or direct digital ~; synthesis.
15 Phase locked loop methods, in their most simple form, suffer from poor phase noise andlor poor~ frequency resolution~ a relative large step between permissible frequenciss). Frequency sw~itchîng time can also be rather poor (long).~ Direct ~digital~synthesis methods are usually based on phase accumulator techniques or memory look-up techniques. These techniques 20 allow for both low phase~noise and~narrow 1requency resolution. However, . , ~ ~ ~
the phase accu~mulator design is optimised for the generation of a fixed frequenc~ tone~an~d~the memory; lookup technique suffers from large ~3 ~ computational overheads as~all data points must be calculated in advance.
This invention combines and ~extends thé phase accumulator technique to 25 provide a device~which can gerlerate arbitrary or pseudo-arbitrary waveforms.This is particularly important~in a real-time~system. The invention described here~ may~be used as a pseudo-arbitrary wavetorm generator with high capability and low com~putational overhead. ~
A common waveform used in HF radar systems is the linear frequency 30 modulated continuous wave ;~FMCW) waveform, where the frequency is swept linearly up or down~ over a programmable frequency span in a programmable ; ~
: : ~: ~
WO 93/00737 Pcr/Avg2/0030~
ARBITRARY WAVEFORM GENERATOR ARCHITECTURE
~' ;~' BACKGROUND OF THE INVENTION
This invention relates to a method of digitally generating linear frequency modulated continuous wave (FMCW) waveforms at high frequency for use in 5 such applications as high-freq~ency radar systems.
In its most general sense the invention can be applied to any system requiring virtually any waveform. In this discussion its application in HF radar systems will be used as an example.
.~
;j Signal sources used in HF radar systems require very high dynamic range, 10 low phase noise and amplitude accuracy over a wide frequency band. In many applications they also require fast frequency switching and known ~, phase characteristics. Typical signal sources use one of two methods to generate these signals - phase~ locked loop synthesis or direct digital ~; synthesis.
15 Phase locked loop methods, in their most simple form, suffer from poor phase noise andlor poor~ frequency resolution~ a relative large step between permissible frequenciss). Frequency sw~itchîng time can also be rather poor (long).~ Direct ~digital~synthesis methods are usually based on phase accumulator techniques or memory look-up techniques. These techniques 20 allow for both low phase~noise and~narrow 1requency resolution. However, . , ~ ~ ~
the phase accu~mulator design is optimised for the generation of a fixed frequenc~ tone~an~d~the memory; lookup technique suffers from large ~3 ~ computational overheads as~all data points must be calculated in advance.
This invention combines and ~extends thé phase accumulator technique to 25 provide a device~which can gerlerate arbitrary or pseudo-arbitrary waveforms.This is particularly important~in a real-time~system. The invention described here~ may~be used as a pseudo-arbitrary wavetorm generator with high capability and low com~putational overhead. ~
A common waveform used in HF radar systems is the linear frequency 30 modulated continuous wave ;~FMCW) waveform, where the frequency is swept linearly up or down~ over a programmable frequency span in a programmable ; ~
: : ~: ~
WO 93/00737 Pcr/Avg2/0030~
2 '~ 5 2 2 ~
sources it is necessary to approximate the desired waveform by a series o~
short fixed-frequency steps. This invention can produce true linear FMCW
waveforms. The technique may be further extended to produce more complex 5 waveforms of higher order, or these waveforms may be approximated by a piecewise linear approximation. This approximation, being a second order approximation, is inherently more accurate than the first order approximation of conventional phase accumulator techniques.
The continuous time equation for a single cycle of a sawtooth waveform 10 (linear FMCW ramp) is given by:
f(~) = 511~1[t {~I)o I 2T t}]
where T = the period of the waveform = 2~fo the starting;frequency of the ramp ~1 = 2~1fj the ending frequency of the ramp.
15 Converting this equation to an ~equivalent discrete time equation with sampling period ts ~and adding the constraint that there are an integer number ~N) of samples in a ramp period, reveals that it can be written more simply as:
~ :
f(n) = SlN[n(a + bn)l :
where ~ a =
20 ~ ~ ~ ` b -~ 2~N ~
This~analysis leads to the~discovery that a discrete digital synthesis ramp generator: may be implemented with~two levels of accumulation and a ;; sinusoidal look-up ROM if the~two phase registers are loaded with the initial values a + b and 2b~ r*spectiv~ly. ~ ~ ~
25 The technique of cascading accumulators can be extended to allow the - generation of hlgherorder~waveforms. In fact anywaveform s(t) = SlN(~t)) where ~(t) = ao+a1t + a2tZ + ...~+antn :
P~/AU / 9 2 / O 0 3 0 5 R CEI\/E~ 0 8 JAI'~ lg93 ~1122~2 can be generated with n cascaded accumulators. By including a cosine lookup ROM as well as a sine lookup ROM any waveform s(t) = eJ~(t) can be generated. Note also that the lookup ROM is not constrained to sinusoidal waveforms, but can be used to map any periodic function. In practice 5 implementing further stages of accumulation becomes difficult due to a need for greater arithmetic precision in the early stages of accumulation, and to account for propagation delays through the accumulator chain. The design presented here àpproximates higher order waveforms by a piecewise linear approximation.
According to perhaps one form of this invention there is proposed an arbitrary waveform generator comprising:
a plurality of accumulators each adapted to produce an output vatue from one or more input values;
1 5 one or more memory~means adapted to map the output of one or more accumulators to an ampl~tude value;
a converter means adapted to convert the amplitude value from digital form to analogue form;~ and~
a control means adapted to synchronise the operation of the waveform 2 0 generator.
In prsferenGe ~the input va~lues are stored in a plurality of input registers.
In preference thè ~converter; means is a digital to analogue converter that c onverts a digital ~signal from the digital section of the generator to an analogue~sbnal.; ~
2 5 In preference the~ memory~means is an addressable solid state memory device such as a rea~ only~memory device containing a look-up table for mapping a linear variation in; phase to~ a sinusoidal variation in amplitude. Alternatively, the merr~ory~means~couid be an EPROM, Beta card, DRAM or other similar memory device.~The memory device look-up table may contain other periodic 3~ ~functions. ~ ~ ~
In preferencè the control~ means is a microprocessor incorporating a clock means which is a~high purity oscillator. In order to interface to the very cemplex waveiorm scheduling requirements of on operational OTHR radar I ~
E~SU85TITUTE SHEEr¦
.
- W0 93/0073t ~ PCI /AU92/0030 ' control system a high performance microprocessor is required.
,, :
In preference there is provided a filter means which filters the output of the digital to analogue converter. In praetice this is a low pass filter.
In a further form of this invention there is proposed a method of direet digital5 synthesis of linear frequ~ney modulated waveforms eomprising the steps of:
at a given regular time, adding a fixed frequeney increment word to a frequency eontrol value stored in a first register to produce a linearly inereasing frequeney eontrol word;
adding the frequeney eontrol word stored in the first register to a seeond 10 register to form a quadratieally inereasing phase word;
eonverting the quadratieally inereasing phase word to an amplitude value ;'i ~ using a look-up~table stored in a memory means to produee a linearly inereaslng frequeney; and ~ ~ ~
periodieally resetting the frequeney eontrol word to produee a frequency 1 5 sawtooth. ~ ~ ~
In preferenee~the~ amptitude value is eonverted from a digital value to an analogue value~using a digital to analogue eonverter.
;~ In preferenee there is provided a~ tiiter means after the digital to analogue converter~and~in preference this is a low pass filter.
20 In preferenee there is provided a eloek means to provide the given regular : timeandcontrolthe~periodlc~resening~
' '~ DESCRIPTION OF THE PREFERRED EMBODIMENT
For~a b~er understanding ~of;this' invention~a~ preferred embodiment will now be described~with rèfèrenee to;the~attaehed drawing in whieh: -'25- ~ ~ FIG~ is a~schematic of an~ arbitrary~waveforrn generator consisting of two phase accu mulator stages.; ~
: ~
Ph~se accumulator signal synthesis is a digital technique whereby a fixed phase increment~is added~to a value stored in a phase register, giving rise to alinearly varying phase. ~As the instantaneous frequency is defined to be the ~ ~ ~ 30 time derivative~ of the phase, the phase~ accumulator thus generates a fixed ,~ ,,~;, - : .
, ~ ~
WO 93/00737 PCr/AU92/0030~S
frequenoy signat. This signal is mapped to an amplitude by a sinusoidal lookup table, which may then be converted to an analogue form by a digital-to-analogue converter.
Referring in detail to the figure, the inputs to the generator are a frequency increment word 1, an initial frequency 2 and an initial phase 3. The frequency register 4 is incremented in an adder 5 by the value of the increment word 1 on each reference clock pulse of a clock 6, giving a linear frequency progression. The llnearly chan~ing frequency output trom the ~requency register 4 is added in adder 7 to the phase register 8 on each clock pulse to produce a quadratic phase progression which is mapped by the ROM 9 to produce a linearly increasing frequency ramp. By resetting the control values at regular intervals the output becomes a repetitive frequency sawtooth A
digital to analogue converter 10~ converts the digital signal 11 to analogue form which is subsequently~passed through a low-pass filter 12 to produce the desired output.
Each ramp can be completely defined by four parameters or control values:
initial phase, initial frequency, trequency increment word and duration of ramp. Any of the first three parameters may be unused (taking the final value of the previous r~amp),~ which allows for~reater flexibility in waveform generation and reduces some computational overhead.
A logical extension;~ of this technique is to implement more stages of ` ~ accumulation to ~generate~ polynomials of higher order, allowing even more complex waveforms to be~generated directly. However, current technology imposes restrictions on the capabi!ity~of such higher-order polynomials, such 25 ~ ~ that it is presently more appropriate to generate these higher-order polynomials in a~piècewise linear approximation using short linear FMCW
ramps. ~
~; ' The method of controlllng this dual phase accumulator allows independent setting of the initia!~phase, initia! frequency, and frequency deviation rate It~; 30 also allows pseudo-arbitrary~waveforms to be generated relatively simply by ~means of piecewise~Onear approximation with short time intervals (possibly as short as 10-20 microseconds). This is a very powerful method of generating pseudo-arbitrary waveforms, as the length of the waveform sequence is dependent only on the~ storage requirements for the waveform definition, rather than on the storage requirements for the entire sequence (as in the :
WO 93/00737 ` PCI'/AU92/0030~ .
L~ " ~
memory lookup method of arbitrary waveform synthesis). It also allows real-time generation of data points, avoiding the long overheads of memory lookup techniques.
The waveform generator may be configured to either repetitively generate the 5 same ramp or produce a series of independent ramps. Pseudo-arbitrary waveforms can be generated by a piecewise linear approximation of ramps to the desired waveform instead of using a muleiple accumulator architecture of higher order. As each ramp segment is defined by four parameters only it is possible to reduce the minimum ramp duration to the time required to transfer 10 these four parameters to the appropriate registers. With current high performance microprocessors a minimum step size of 10 to 20 microseconds is a physically achievable value that will provide a good approximation to most desired waveforms. The pseudo-arbitrary waveform is implemented as a series of short frequency ramps approximating the desired waveform. The 15 total number of ramp segments tha~ can be put in a sequence has yet to be determined, but will number in the thousands and will be limited only by ~ ~ parameter storage~ requiremen~s. The speed of programming and j ~ implementing these ramps as well as the maximum number of ramps is determined only by the speed and~storage capabilities of the controlling 20 microprocessor.; ~This is a very~powerful method of producing pseudo-arbitrary waveforms and allows very~complex waveforms of long duration to be generated relative~ly simply~without recourse to multiple accumulator architectures.~
The `invention~offers~a number of advantages. The output frequency can be 25 ~ ~ ~changed~ very~ rapidly w~thout~impacting on the quality ot the output signal.
The~ non-pipe!ined~ nature of the ~design~allows the output frequency to change within ~a single~sampling cbck period.~ Furthermorc, any changes in frequency are~contr~lled to~provide non-discontinuous changes in phase and frequency $.~ ~ unless discontinuity is desired~, in whi¢h case the discontinuity is known and 30 can thus be contro~ lled; ~
In~the same manner as a singie phase accumulator is optimised for a fixed frequency tone, the ~dual accumulator is optimised for quadratic phase generation (i.e. Iinear FMCW). The addition of further stages of phase $~ accumulation provide;a mèthod for optimised generation of higher order ~, 35 waveforms. Being all ~digital the phase and amplitude are controlled at all times. This has~ particular importance in radar systems where a coherent $
W093/00737 7 21i2~5~ P~/AU92/0030~
detection process is implemented. Coherent detPction requires a known, repeatable phase progression and phase errors translate directly to errors in detection.
,.
, ,1 :
'1 ,, ~
; :
~: ' ::
`:
sources it is necessary to approximate the desired waveform by a series o~
short fixed-frequency steps. This invention can produce true linear FMCW
waveforms. The technique may be further extended to produce more complex 5 waveforms of higher order, or these waveforms may be approximated by a piecewise linear approximation. This approximation, being a second order approximation, is inherently more accurate than the first order approximation of conventional phase accumulator techniques.
The continuous time equation for a single cycle of a sawtooth waveform 10 (linear FMCW ramp) is given by:
f(~) = 511~1[t {~I)o I 2T t}]
where T = the period of the waveform = 2~fo the starting;frequency of the ramp ~1 = 2~1fj the ending frequency of the ramp.
15 Converting this equation to an ~equivalent discrete time equation with sampling period ts ~and adding the constraint that there are an integer number ~N) of samples in a ramp period, reveals that it can be written more simply as:
~ :
f(n) = SlN[n(a + bn)l :
where ~ a =
20 ~ ~ ~ ` b -~ 2~N ~
This~analysis leads to the~discovery that a discrete digital synthesis ramp generator: may be implemented with~two levels of accumulation and a ;; sinusoidal look-up ROM if the~two phase registers are loaded with the initial values a + b and 2b~ r*spectiv~ly. ~ ~ ~
25 The technique of cascading accumulators can be extended to allow the - generation of hlgherorder~waveforms. In fact anywaveform s(t) = SlN(~t)) where ~(t) = ao+a1t + a2tZ + ...~+antn :
P~/AU / 9 2 / O 0 3 0 5 R CEI\/E~ 0 8 JAI'~ lg93 ~1122~2 can be generated with n cascaded accumulators. By including a cosine lookup ROM as well as a sine lookup ROM any waveform s(t) = eJ~(t) can be generated. Note also that the lookup ROM is not constrained to sinusoidal waveforms, but can be used to map any periodic function. In practice 5 implementing further stages of accumulation becomes difficult due to a need for greater arithmetic precision in the early stages of accumulation, and to account for propagation delays through the accumulator chain. The design presented here àpproximates higher order waveforms by a piecewise linear approximation.
According to perhaps one form of this invention there is proposed an arbitrary waveform generator comprising:
a plurality of accumulators each adapted to produce an output vatue from one or more input values;
1 5 one or more memory~means adapted to map the output of one or more accumulators to an ampl~tude value;
a converter means adapted to convert the amplitude value from digital form to analogue form;~ and~
a control means adapted to synchronise the operation of the waveform 2 0 generator.
In prsferenGe ~the input va~lues are stored in a plurality of input registers.
In preference thè ~converter; means is a digital to analogue converter that c onverts a digital ~signal from the digital section of the generator to an analogue~sbnal.; ~
2 5 In preference the~ memory~means is an addressable solid state memory device such as a rea~ only~memory device containing a look-up table for mapping a linear variation in; phase to~ a sinusoidal variation in amplitude. Alternatively, the merr~ory~means~couid be an EPROM, Beta card, DRAM or other similar memory device.~The memory device look-up table may contain other periodic 3~ ~functions. ~ ~ ~
In preferencè the control~ means is a microprocessor incorporating a clock means which is a~high purity oscillator. In order to interface to the very cemplex waveiorm scheduling requirements of on operational OTHR radar I ~
E~SU85TITUTE SHEEr¦
.
- W0 93/0073t ~ PCI /AU92/0030 ' control system a high performance microprocessor is required.
,, :
In preference there is provided a filter means which filters the output of the digital to analogue converter. In praetice this is a low pass filter.
In a further form of this invention there is proposed a method of direet digital5 synthesis of linear frequ~ney modulated waveforms eomprising the steps of:
at a given regular time, adding a fixed frequeney increment word to a frequency eontrol value stored in a first register to produce a linearly inereasing frequeney eontrol word;
adding the frequeney eontrol word stored in the first register to a seeond 10 register to form a quadratieally inereasing phase word;
eonverting the quadratieally inereasing phase word to an amplitude value ;'i ~ using a look-up~table stored in a memory means to produee a linearly inereaslng frequeney; and ~ ~ ~
periodieally resetting the frequeney eontrol word to produee a frequency 1 5 sawtooth. ~ ~ ~
In preferenee~the~ amptitude value is eonverted from a digital value to an analogue value~using a digital to analogue eonverter.
;~ In preferenee there is provided a~ tiiter means after the digital to analogue converter~and~in preference this is a low pass filter.
20 In preferenee there is provided a eloek means to provide the given regular : timeandcontrolthe~periodlc~resening~
' '~ DESCRIPTION OF THE PREFERRED EMBODIMENT
For~a b~er understanding ~of;this' invention~a~ preferred embodiment will now be described~with rèfèrenee to;the~attaehed drawing in whieh: -'25- ~ ~ FIG~ is a~schematic of an~ arbitrary~waveforrn generator consisting of two phase accu mulator stages.; ~
: ~
Ph~se accumulator signal synthesis is a digital technique whereby a fixed phase increment~is added~to a value stored in a phase register, giving rise to alinearly varying phase. ~As the instantaneous frequency is defined to be the ~ ~ ~ 30 time derivative~ of the phase, the phase~ accumulator thus generates a fixed ,~ ,,~;, - : .
, ~ ~
WO 93/00737 PCr/AU92/0030~S
frequenoy signat. This signal is mapped to an amplitude by a sinusoidal lookup table, which may then be converted to an analogue form by a digital-to-analogue converter.
Referring in detail to the figure, the inputs to the generator are a frequency increment word 1, an initial frequency 2 and an initial phase 3. The frequency register 4 is incremented in an adder 5 by the value of the increment word 1 on each reference clock pulse of a clock 6, giving a linear frequency progression. The llnearly chan~ing frequency output trom the ~requency register 4 is added in adder 7 to the phase register 8 on each clock pulse to produce a quadratic phase progression which is mapped by the ROM 9 to produce a linearly increasing frequency ramp. By resetting the control values at regular intervals the output becomes a repetitive frequency sawtooth A
digital to analogue converter 10~ converts the digital signal 11 to analogue form which is subsequently~passed through a low-pass filter 12 to produce the desired output.
Each ramp can be completely defined by four parameters or control values:
initial phase, initial frequency, trequency increment word and duration of ramp. Any of the first three parameters may be unused (taking the final value of the previous r~amp),~ which allows for~reater flexibility in waveform generation and reduces some computational overhead.
A logical extension;~ of this technique is to implement more stages of ` ~ accumulation to ~generate~ polynomials of higher order, allowing even more complex waveforms to be~generated directly. However, current technology imposes restrictions on the capabi!ity~of such higher-order polynomials, such 25 ~ ~ that it is presently more appropriate to generate these higher-order polynomials in a~piècewise linear approximation using short linear FMCW
ramps. ~
~; ' The method of controlllng this dual phase accumulator allows independent setting of the initia!~phase, initia! frequency, and frequency deviation rate It~; 30 also allows pseudo-arbitrary~waveforms to be generated relatively simply by ~means of piecewise~Onear approximation with short time intervals (possibly as short as 10-20 microseconds). This is a very powerful method of generating pseudo-arbitrary waveforms, as the length of the waveform sequence is dependent only on the~ storage requirements for the waveform definition, rather than on the storage requirements for the entire sequence (as in the :
WO 93/00737 ` PCI'/AU92/0030~ .
L~ " ~
memory lookup method of arbitrary waveform synthesis). It also allows real-time generation of data points, avoiding the long overheads of memory lookup techniques.
The waveform generator may be configured to either repetitively generate the 5 same ramp or produce a series of independent ramps. Pseudo-arbitrary waveforms can be generated by a piecewise linear approximation of ramps to the desired waveform instead of using a muleiple accumulator architecture of higher order. As each ramp segment is defined by four parameters only it is possible to reduce the minimum ramp duration to the time required to transfer 10 these four parameters to the appropriate registers. With current high performance microprocessors a minimum step size of 10 to 20 microseconds is a physically achievable value that will provide a good approximation to most desired waveforms. The pseudo-arbitrary waveform is implemented as a series of short frequency ramps approximating the desired waveform. The 15 total number of ramp segments tha~ can be put in a sequence has yet to be determined, but will number in the thousands and will be limited only by ~ ~ parameter storage~ requiremen~s. The speed of programming and j ~ implementing these ramps as well as the maximum number of ramps is determined only by the speed and~storage capabilities of the controlling 20 microprocessor.; ~This is a very~powerful method of producing pseudo-arbitrary waveforms and allows very~complex waveforms of long duration to be generated relative~ly simply~without recourse to multiple accumulator architectures.~
The `invention~offers~a number of advantages. The output frequency can be 25 ~ ~ ~changed~ very~ rapidly w~thout~impacting on the quality ot the output signal.
The~ non-pipe!ined~ nature of the ~design~allows the output frequency to change within ~a single~sampling cbck period.~ Furthermorc, any changes in frequency are~contr~lled to~provide non-discontinuous changes in phase and frequency $.~ ~ unless discontinuity is desired~, in whi¢h case the discontinuity is known and 30 can thus be contro~ lled; ~
In~the same manner as a singie phase accumulator is optimised for a fixed frequency tone, the ~dual accumulator is optimised for quadratic phase generation (i.e. Iinear FMCW). The addition of further stages of phase $~ accumulation provide;a mèthod for optimised generation of higher order ~, 35 waveforms. Being all ~digital the phase and amplitude are controlled at all times. This has~ particular importance in radar systems where a coherent $
W093/00737 7 21i2~5~ P~/AU92/0030~
detection process is implemented. Coherent detPction requires a known, repeatable phase progression and phase errors translate directly to errors in detection.
,.
, ,1 :
'1 ,, ~
; :
~: ' ::
`:
Claims (26)
1. An arbitrary waveform generator comprising:
a plurality of accumulators each adapted to produce an output value from one or more input values;
one or more memory means adapted to map the output of one or more accumulators to an amplitude value;
a converter means adapted to convert the amplitude value from digital form to analogue form; and a control means adapted to synchronise the operation of the plurality of accumulators, the one or more memory means and the converter means.
a plurality of accumulators each adapted to produce an output value from one or more input values;
one or more memory means adapted to map the output of one or more accumulators to an amplitude value;
a converter means adapted to convert the amplitude value from digital form to analogue form; and a control means adapted to synchronise the operation of the plurality of accumulators, the one or more memory means and the converter means.
2. The arbitrary waveform generator of claim 1 further comprising a plurality of input registers adapted to store the input values.
3. The arbitrary waveform generator of claim 1 in which each accumulator comprises an adder means adapted to add two input values to produce an output value and a register means adapted to store said output value.
4. The arbitrary waveform generator of claim 3 in which one of the input values is the previous value stored in the register means.
5. The arbitrary waveform generator of claim 1 in which the memory means is addressable solid state memory.
6. The arbitrary waveform generator of claim 1 in which the memory means contains a look-up table for mapping the accumulator output to the amplitude value.
7. The arbitrary waveform generator of claim 1 in which the converter means is a digital to analogue conversion device.
8. The arbitrary waveform generator of claim 1 in which the control means is a microprocessor means adapted to provide a clock reference signal to which the waveform generator is synchronised.
9. The arbitrary waveform generator of claim 1 in which the control means comprises a microprocessor means, reference clock means and synchronising signal means working in cooperation to synchronise the operation of the waveform generator.
10. The arbitrary waveform generator of claim 1 further comprising a filter means adapted to filter the output of the converter means.
11. An arbitrary digital waveform generator comprising:
a plurality of accumulators each adapted to produce an output value from one or more input values;
one or more memory means adapted to map the output of one or more accumulators to an amplitude value; and a control means adapted to synchronise the operation of the plurality of accumulators and the one or more memory means.
a plurality of accumulators each adapted to produce an output value from one or more input values;
one or more memory means adapted to map the output of one or more accumulators to an amplitude value; and a control means adapted to synchronise the operation of the plurality of accumulators and the one or more memory means.
12. The arbitrary waveform generator of claim 11 in which each accumulator comprises an adder means adapted to add two input values to produce an output value and a register means adapted to store said output value.
13. The arbitrary waveform generator of claim 12 in which one of the input values is the previous value stored in the register means.
14. The arbitrary waveform generator of claim 11 in which the memory means contains a look-up table for mapping the accumulator output to the amplitude value.
15. An arbitrary waveform generator for generating a linear frequency ramp comprising :
first and second accumulators each adapted to produce an output value from two input values wherein one of the input values to the first accumulator is a frequency increment word and the output of the first accumulator is the input tothe second accumulator;
a memory means adapted to map the output of the second accumulator to a sinusoidally varying amplitude value; and a control means adapted to synchronise the operation of the plurality of accumulators, the one or more memory means and the converter means.
first and second accumulators each adapted to produce an output value from two input values wherein one of the input values to the first accumulator is a frequency increment word and the output of the first accumulator is the input tothe second accumulator;
a memory means adapted to map the output of the second accumulator to a sinusoidally varying amplitude value; and a control means adapted to synchronise the operation of the plurality of accumulators, the one or more memory means and the converter means.
16. The arbitrary waveform generator of claim 15 further including a converter means adapted to convert the amplitude value from digital form to analogue form.
17. The arbitrary waveform generator of claim 15 in which each accumulator comprises an adder means adapted to add the two input values to produce the output value and a register means adapted to store said output value and further characterised in that the value stored in the register means is one of the inputs to the adder means.
18. An arbitrary waveform generator for generating a linear frequency modulated continuous wave waveform comprising:
a control means incorporating a reference clock;
a first accumulator adapted to produce a linear frequency progression by incrementing a frequency register by the value of a frequency increment word once every reference clock cycle;
a second accumulator adapted to produce a quadratic phase progression by adding the linear frequency progression to a phase register once every clock cycle; and a memory means adapted to produce a linearly increasing frequency ramp from the quadratic phase progression by mapping from a sinusoidal look-up table.
a control means incorporating a reference clock;
a first accumulator adapted to produce a linear frequency progression by incrementing a frequency register by the value of a frequency increment word once every reference clock cycle;
a second accumulator adapted to produce a quadratic phase progression by adding the linear frequency progression to a phase register once every clock cycle; and a memory means adapted to produce a linearly increasing frequency ramp from the quadratic phase progression by mapping from a sinusoidal look-up table.
19. The arbitrary waveform generator of claim 18 further including a digital to analogue converter adapted to convert the linearly increasing frequency ramp from digital form to analogue form.
20. The arbitrary waveform generator of claim 18 in which the linearly increasing frequency ramp is defined by :
the frequency increment word;
an initial frequency value stored in the frequency register prior to a first clock cycle;
an initial phase value stored in the phase register prior to the first clock cycle;
and a duration of the ramp being the number of clock cycles for which increments occur.
the frequency increment word;
an initial frequency value stored in the frequency register prior to a first clock cycle;
an initial phase value stored in the phase register prior to the first clock cycle;
and a duration of the ramp being the number of clock cycles for which increments occur.
21. A method of direct digital synthesis of linear frequency modulated waveforms comprising the steps of:
at a given regular time, adding a fixed frequency increment word to a frequency control value stored in a first register to produce a linearly increasing frequency control word;
adding the frequency control word stored in the first register to a second register to form a quadratically increasing phase word;
converting the quadratically increasing phase word to an amplitude value using a look-up table stored in a memory means to produce a linearly increasing frequency; and periodically resetting the frequency control word to produce a frequency sawtooth.
at a given regular time, adding a fixed frequency increment word to a frequency control value stored in a first register to produce a linearly increasing frequency control word;
adding the frequency control word stored in the first register to a second register to form a quadratically increasing phase word;
converting the quadratically increasing phase word to an amplitude value using a look-up table stored in a memory means to produce a linearly increasing frequency; and periodically resetting the frequency control word to produce a frequency sawtooth.
22. The method of claim 21 further including the step of converting the amplitude value from digital form to analogue form in a converter means.
23. The method of claim 21 further including the step of filtering the output of the converter means.
24. The method of claim 21 in which the look-up table is a sinusoidal look-up table.
25. The method of claim 21 wherein the given regular time is provided by a reference clock means.
26. An arbitrary waveform generator as herein described with reference to the attached figure.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AUPK686191 | 1991-06-25 | ||
| AUPK6861 | 1991-06-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2112252A1 true CA2112252A1 (en) | 1993-01-07 |
Family
ID=3775494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2112252 Abandoned CA2112252A1 (en) | 1991-06-25 | 1992-06-23 | Arbitrary waveform generator architecture |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0591477A4 (en) |
| JP (1) | JPH07502151A (en) |
| CA (1) | CA2112252A1 (en) |
| WO (1) | WO1993000737A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105515551A (en) * | 2014-10-14 | 2016-04-20 | 苏州普源精电科技有限公司 | Signal generator with arbitrary wave editing function |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IL113676A (en) * | 1995-05-09 | 1999-05-09 | El Ar Electronics Ltd | Airport surface detection radar |
| EP1239640B1 (en) | 2000-12-20 | 2004-05-06 | Motorola, Inc. | Quadrature modulator with programmable pulse shaping |
| US9853365B2 (en) * | 2015-05-05 | 2017-12-26 | Texas Instruments Incorporated | Dynamic programming of chirps in a frequency modulated continuous wave (FMCW) radar system |
| CN113687613B (en) * | 2021-08-16 | 2023-04-11 | 深圳市安瑞国医科技有限公司 | Combined waveform generation method capable of adjusting parameters at will |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3435367A (en) * | 1967-08-24 | 1969-03-25 | Bendix Corp | Digitally controlled frequency synthesizer |
| US3555446A (en) * | 1969-01-17 | 1971-01-12 | Dana Lab Inc | Frequency synthesizer |
| US3582810A (en) * | 1969-05-05 | 1971-06-01 | Dana Lab Inc | Frequency synthesizer system |
| US3842354A (en) * | 1972-06-29 | 1974-10-15 | Sanders Associates Inc | Digital sweep frequency generator employing linear sequence generators |
| JPS6014368B2 (en) * | 1980-07-28 | 1985-04-12 | 株式会社 ナムコ | Arbitrary waveform generation circuit |
| US4791377A (en) * | 1987-10-20 | 1988-12-13 | Gte Government Systems Corporation | Direct frequency synthesizer |
| US4926130A (en) * | 1988-01-19 | 1990-05-15 | Qualcomm, Inc. | Synchronous up-conversion direct digital synthesizer |
-
1992
- 1992-06-23 EP EP93901022A patent/EP0591477A4/en not_active Withdrawn
- 1992-06-23 CA CA 2112252 patent/CA2112252A1/en not_active Abandoned
- 1992-06-23 JP JP5501199A patent/JPH07502151A/en active Pending
- 1992-06-23 WO PCT/AU1992/000305 patent/WO1993000737A1/en not_active Application Discontinuation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105515551A (en) * | 2014-10-14 | 2016-04-20 | 苏州普源精电科技有限公司 | Signal generator with arbitrary wave editing function |
| CN105515551B (en) * | 2014-10-14 | 2020-06-05 | 普源精电科技股份有限公司 | Signal generator with arbitrary wave editing function |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07502151A (en) | 1995-03-02 |
| EP0591477A4 (en) | 1995-05-24 |
| WO1993000737A1 (en) | 1993-01-07 |
| EP0591477A1 (en) | 1994-04-13 |
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| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Dead |