CA2100568C - Integrated mosfet resistance and oscillator frequency control and trim methods and apparatus - Google Patents
Integrated mosfet resistance and oscillator frequency control and trim methods and apparatus Download PDFInfo
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- CA2100568C CA2100568C CA002100568A CA2100568A CA2100568C CA 2100568 C CA2100568 C CA 2100568C CA 002100568 A CA002100568 A CA 002100568A CA 2100568 A CA2100568 A CA 2100568A CA 2100568 C CA2100568 C CA 2100568C
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B1/00—Details
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0231—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
Abstract
In an integrated circuit system, a filter and an oscillator are referenced to a common reference circuitry.through a suitable control loop to provide filter time constant and oscillator frequency references. The oscillator (Fig. 3) and the filter (Fig. 4) are implemented in a manner where the monolithic pattern elements setting the fundamental control parameters (time-period and time-constant respectively) are of the same type. Monolithic capacitors are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents (losc; Ix). The monolithic implementation of the Control Block (Fig. 3, Fig. 4 and Fig. 7) is such that by tuning the oscillator frequency to he appropriate value through setting of the respective control current (losc), the filter time-constants also are appropriately set to satisfy the Nyquist criteria for a sampling rate referenced to the oscillator frequency.
Description
WO 92/13387 PCT/US92/Ofl46i _ 1.~ ~n,~~yy~
N j. 'J t,' Si t RESISTANCE AND OSCILLATOR FREQUENCY CONTROL
AND
TRItd L2ETHODS AND APPARATUS
1 , ETRT,D OF THE INVEI TION
The present invention relates to the field of integrated circuit design, and more particularly to integrated circuits having on-chip,, one or more oscillators and/or resistance dependent circuits such as MOSFET resistance dependent circuits. ,
N j. 'J t,' Si t RESISTANCE AND OSCILLATOR FREQUENCY CONTROL
AND
TRItd L2ETHODS AND APPARATUS
1 , ETRT,D OF THE INVEI TION
The present invention relates to the field of integrated circuit design, and more particularly to integrated circuits having on-chip,, one or more oscillators and/or resistance dependent circuits such as MOSFET resistance dependent circuits. ,
2. PRIOR 1~LRT , In a Sample Data System, there is always the need to band limit the incoming analog signal and sample it periodically.
Band-limiting of the analog signal is pexformed through a suitable lowpass or a bandpass filter, and the periodic sampling is performed by sampling circuitry with an accurate periodic time-base. The periodic time base is generated from a suitable oscillator.
One form of monolithic implementation of a suitable filter is the continuous time active MOSFET-RC type. In an MOSFET-RC
filter, MOSFET transistors are used in the non-saturation region with a control voltage on the gate to generate an effective resistance. Processing tolerances of integrated MOSFET transistor and capacitor parameters may create +/- 50% variation in the filter time constants. To maintain tight tolerances on the filter time constants, it becomes necessary to have a control loop, referenced to a stable reference, to control the time constants of the filter over process and ambient changes. In implementations where the time-base oscillator is also specified to be implemented in a monolithic form with the filter, the same process tolerances will create +/- 50% variations on the oscillator frequency. To WO 9x/13387 PCfI'tJS92/Otl4b?
achieve an accurate and stable oscillation frequency, the , oscillator also needs to be referenced to a stable and accurate reference. The present invention provides a simple and unique way of achieving these ends in a monolithic devioe.
In prior art situations where it is necessary to have a trimmed current-to-voltage transfer function (T = V/I), most implementations develop a voltage Vo across a trimming resistor Rt by passing a current I through the resistor. By trimming the resistor Rt, an accurate voltage Vo is developed or an accurate current to voltage transfer function is achieved. Figure 1 shows a general implementation scheme. In integrated circuit implementations, the trimming resistor Rt may be formed as a series or parallel combination of multiple resistors with switches, as shown in Figure 2a and Figure 2b, respectively, or a single resistor may be used where trimming is performed through laser cutting as shown in Figure 2c. The switches may be active or passive. Active switches may either be bipolar or MOS
transistors or zener diodes. Passive switches may each just be a thin interconnect line, such as metal.
When MOS transistors are used as switches, a fair amount of sil'_can area is used up because large MOS switches need to be made to have their turn-on resistance small compared to the trim resistor, as otherwise, trimming is not acc~:rate. Bipolar switches have an inherent turn-on voltage Vsat, whereby they are non-ideal switches and hence create inaccurate trimming. Zener zapping and laser trimming are clumsy and expensive because of the sophisticated external hardware that is required. Both zener zapping and laser trimming have long term reliability problems, and are not reprogrammable.
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Band-limiting of the analog signal is pexformed through a suitable lowpass or a bandpass filter, and the periodic sampling is performed by sampling circuitry with an accurate periodic time-base. The periodic time base is generated from a suitable oscillator.
One form of monolithic implementation of a suitable filter is the continuous time active MOSFET-RC type. In an MOSFET-RC
filter, MOSFET transistors are used in the non-saturation region with a control voltage on the gate to generate an effective resistance. Processing tolerances of integrated MOSFET transistor and capacitor parameters may create +/- 50% variation in the filter time constants. To maintain tight tolerances on the filter time constants, it becomes necessary to have a control loop, referenced to a stable reference, to control the time constants of the filter over process and ambient changes. In implementations where the time-base oscillator is also specified to be implemented in a monolithic form with the filter, the same process tolerances will create +/- 50% variations on the oscillator frequency. To WO 9x/13387 PCfI'tJS92/Otl4b?
achieve an accurate and stable oscillation frequency, the , oscillator also needs to be referenced to a stable and accurate reference. The present invention provides a simple and unique way of achieving these ends in a monolithic devioe.
In prior art situations where it is necessary to have a trimmed current-to-voltage transfer function (T = V/I), most implementations develop a voltage Vo across a trimming resistor Rt by passing a current I through the resistor. By trimming the resistor Rt, an accurate voltage Vo is developed or an accurate current to voltage transfer function is achieved. Figure 1 shows a general implementation scheme. In integrated circuit implementations, the trimming resistor Rt may be formed as a series or parallel combination of multiple resistors with switches, as shown in Figure 2a and Figure 2b, respectively, or a single resistor may be used where trimming is performed through laser cutting as shown in Figure 2c. The switches may be active or passive. Active switches may either be bipolar or MOS
transistors or zener diodes. Passive switches may each just be a thin interconnect line, such as metal.
When MOS transistors are used as switches, a fair amount of sil'_can area is used up because large MOS switches need to be made to have their turn-on resistance small compared to the trim resistor, as otherwise, trimming is not acc~:rate. Bipolar switches have an inherent turn-on voltage Vsat, whereby they are non-ideal switches and hence create inaccurate trimming. Zener zapping and laser trimming are clumsy and expensive because of the sophisticated external hardware that is required. Both zener zapping and laser trimming have long term reliability problems, and are not reprogrammable.
~~?"L i i-I .r~ ~J U :J ~t~
3 For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop.
Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type.
This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents.
The monolithic implementation of the Control Block is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current, the filter time-constants also are appropriately set to satisfy the Nyquist criteria fax a sampling rate referenced to the oscillator frequency. Trimming and tuning are accomplishe~.~ by digital control to control the summing of appropriate current components after manufacture, such as by the programming of on-chip storage cells provided for this purpose.
WO 92/13387 PC'T/US92/Od467 .,rir,~,~1 4 BRTE~ D S.RTPTInN pF TH DRAWTN~~
Figure 1 is a general schematic representation of the use of a trimmable resistor to obtain an accurate Vo or an accurate current to voltage transfer function in the prior art.
Figure 2a through 2c are general schematic representations of forms of trimmable resistors to obtain an accurate Vo or an accurate current to voltage transfer function in the prior art, namely a series and a parallel combination of resistors with switches, and a single resistor for laser trimming, respectively, Figure 3 is a circuit diagram for the constant current relaxation oscillator used in the preferred embodiment of the present invention.
Figure 4 is a circuit diagram for the MOSFET-R gate control 'voltage generator used in the preferred embodiment of the present fnvention.
Figure 5 is a block diagram for the MOSFET-R and oscillator-F
control block used in the preferred embodiment of the present invention.
Figure 6 is a block diagram_for the temperature independent voltage and tuning current generator used in the preferred embodiment of the present invention.
Figure 7a is a block diagram for the temperature independent voltage source and PTAT current source used in the preferred embodiment of the present invention. .
Figure 7b is a circuit diagsam for the negative temperature coefficient current generator used in the preferred embodiment of the present invention.
Figure 7c is a circuit diagram for the temperature independent current generator used in the preferred embodiment of the present invention.
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Figure 7d is a circuit diagram for the current trimming block used in the preferred embodiment of the present invention.
Figure 7e is a circuit diagram for the tuning network used in the preferred embodiment of the present invention.
Figure 7f is a circuit diagram for the rea istor trimming block used in the preferred embodiment of the gresent invention.
WO 92/13387 PC:'T/US92IOOd67 '~~.4~~~~~~~
s LED DESCRIPTION OF THF T~NmrnN
In certain systems such as sampled data systems, both the filter time constants and the oscillator frequency used to generate the sampling frequency each need a suitable reference.
In accordance with the present invention, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameter s of the oscillator and the filter are time-period and time-constant respectively, both being derivatives of time, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type and construction.
This has the advantage of closer tracking through process and ambient variations. In the present implementation, the monolithic capacitor is used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively. The monolithic implementation of the Control Block is such that by tuning the ascillatar frequency to the appropriate value, the filter time-constants also get appropriately set. lY.e Control Block essentially consists of three distinct sub-blocks:
a) Constant Current Relaxation Oscillator b) MOSFET-R Gate, Control Voltage Generator c) Temperature Independent Voltage and Tuning Current Generator The Constant Current Relaxation Oscillator:
Referring to Figure 3, this oscillator operates on the principle that a pair of capacitors are alternately charged (each from a discharged state) through a constant current (Iosc) to a certain fixed voltage (Vref). When one of the capacitors reaches WO 92/13387 Pf,'d'lUS92/OQ467 FJ ~ ~~ V ;' pJ
Vref, a comparator detects the condition and then turns on the discharge circuitry for this capacitor. At the same time the other capacitor is released from the discharged state to charge up to Vref. The alternating periodic charging and discharging of the pair of capacitors gives the behavior of an oscillator. The advantage of using a pair of alternating capacitors is that the discharge times of the capacitors do not come into the time-period equation and hence non-critical capacitor discharge circuitry can be used, thereby reducing silicon area required.
The basic equation governing the opezation of the oscillator is:
Tosc = A C3~~ * Vref (Eq-1) Iosc Where:
Tosc m Time-period of oscillation A = constant of proportionality, (depends on circuit , design) Vref,= Fixed voltage to which capacitors charge.
Iosc = Constant current through capacitors to get charged to Vref Cap = Capacitor value (each capacitor), The above equation can also be written in terms of frequency.
Fosc = B Iosc (Eq-2) (B = 1 / A) Cap * Vref The MOSFET-R Gate Control Voltage Generator:
The purpose of the control loop is to generate a voltage that could be applied to all the gates of the filter MJSFET-RS so that the MOSFETs will exhibit the desired resistance between the sources and drains thereof dependent on the geometry of the MOSFETS, The control loop itself consists of a reference MOSFET-R
which is placed in the proper do operating environment. All the .( ~; :~ ;.. ~~ ti s ~~~r~
filter MOSFET-Rs are ratioed to this reference MOSFET-R through ratios of their respective channel lengths to that of the reference MOSFET-R channel length, such that the proper effective resistance is generated, which in turn, combining with the filter capacitors, set the proper filter time-constants. If there are variations due to ambient changes such as power supply and , temperature, the control loop automatically changes the gate voltage (VCNTRL) to keep the effective resistance of the MOSFET-Rs fixed.
Referring to Figure 4, the dotted block XX effectively generates voltages V2 and V3, which are ratioed off the fixed voltage Vref. The voltage to current generator consisting of amplifier A1, transistor MD (preferably a zero threshold device), resistor R1 and diode connected p-channel device MP1, creates a current I flowing through MP1 given by the relation I - Vref/R1.
The current I, mirrored by p-channel devices MP2 and MP3, is made to flow through resistors R2 and R3, respectively, to generate voltages V2 and V3 respectively, given by the relations V2 = IR2 and V3 = IR3, respectively. Replacement of I in the V2, V3 relations gives V2 = Vref (R2/R1) and V3 = Vref(R3fRl). It is noticed that V2, V3 are ratioed to Vref, through the resistor ratios R2/Rl and R3/R1 respectively, which in a monolithic implementation are accurately gFnerated. The dotted block XY is the control loop, consisting of voltage buffer A2, reference ~IOSFET-R MDREF, loop amplifier A3 and mirror n-channel transistor MN2. Voltage V2 is applied to node NI of MDREF through the voltage buffer A2. The voltage output V2 is isolated from nc:de N1 by the buffer A2. Voltage V3 is applied to the noninverting input of the loop amplifier A3, and through the high gain of A3 gets virtually applied to node N2 of M~REF. Thus a voltage difference Vp = V2 - V3 is applied across MDREF. V2 and V3 are such that CVO 92/13387 PCf/US92/t10467 n~~~p 1i V .1 lJ U
they place MDREF in the normal operating environment (voltage range) of the filter MOSFET-Rs, and Vp is the maximum signal level that the filter MOSFETs will see across them. It is important to have the normal operating environment setup because MOSFET-Rs are non-linear active devices and thus have different characteristics at different operating points. This essentially creates an accurate referencing scheme. The transistor MN2 pulls a current IRREF through MDREF. The action of the loop is such that the amplifier sets the voltage VCNTRZ to hold the relationship:
Reff = VP/ IRREF. (Eq-3) Where: Reff = the effective resistance of MDREF.
All filter MOSFET-R effective resistances are ratios of Reff.
The filter time-constant equation can be written as:
Trc m Vp * Cap/IRREF ~ (Vref * Cap/IRREF) * RZ/Rl (1-R3/R2) = M * (Vref * Cap/IRREF) (Eq-q) Also:
Reff = M * (Vref/iRREF) (Eq-5) From equations 1 through 9, it is seen that both Tosc and Trc are inversely proportional to a current parameter, Bence it is possible to have the currents Iose and IRREF ratioed from a common trimmable current Itrim. The frequency of the oscillator may be observed and the Itrim changed accordingly to set the oscillation frequency. This would automatically set the filter time-constants and tune the filter for,the proper cutoff characteristics. Once tuned, Tosc and Trc must remain stable over ambient changes such as power supply variations and temperature variations. The constants of proportionality (A, M) are ratios of identical components, and capacitors once fabricated have very tight tolerance to ambient changes. Only Vref and the currents Iosc and IRREF have to be tolerant to temperature and power supply variations. This means that Vref, Iosc and IRREF should be WO 92/ 13387 F'Cf/US92/0046 i <J < <~ r L~ l~
w ~~ ~ i~ ':~ ~i c~
temperature and power supply independent.
Temperature Independent Voltage and Tuning Current Generator:
The temperature independent voltage Vref is generated from a band-gap circuit with high power supply rejection ratio. A PTAT
(proportional to absolute temperature) current: is derived from the band--gap circuit, and is added to a current with a negative temperature coefficient (NTC). With a proper ratio of the PTAT
and the NTC currents, a temperature independent current (Itrim) is generated. Itrim is passed through a tuning network which generates the currents Ix and Iosc. Since Ix and Iosc are ratioed to Itrim, they are also temperature independent.
Combining equation 5 and equation 1:
Fosc ~ B * M * Ion * 1 ~ _ y IRREF Reff*Cap Reff*Cap Or, Tosc m Z * (Reff * Cap) It may be seen from Figures 3 and 4 and the description thereof that the constant current relaxation oscillator of Figure .
3 utilizes as its inputs a fixed reference voltage Vref and a control current Iose for direct control of the frequency of oscillator, and that the MOSFET-R gate control generator of Figure 9 utilizes as its inputs the same reference voltage Vref as well as the control current Ix. This reference voltage Vref as well as the control currents Ix and Iosc are generated by a temperature independent voltage and tuning current generator illustrated in block diagram form in Figure 5. Various sub-blocks making up the temperature independent voltage and tuning current generator illustrated in Figure 5 are shown in Figure 6. As shown therein, temperature independent voltage source and PTAT current source generates the reference voltage Vref as well as a current proportional to absolute temperature (PTAT). This, together with a negative temperature coefficient (NTC) current provided by the 11 : ; .~ ,, n : w ,.", E i .w Li: : i ?~: i~
negative temperature coefficient current generator are provided to a temperature independent current generator, which in turn provides a current Itrim to a tuning network which provides the currents Ix and Iosc.
The temperature independent voltage source and PTAT current source block of Figure 6, shown in detail in Figure 7a, is essentially a bandgap reference generator. l3ipolar devices Ql and Q2 each carry the same current but operate at different current densities as a result of the device Q2 having an area A times the area of the device Ql. Thus device Q2 operates at a lower current density than Q1, with the result that the voltage difference between the emitter of Q1 and the emitter of Q2 is a voltage directly proportional to absolute temperature. This voltage ..
appears across resistor R1, resulting in a current through RI (and Q2 as well as Q1) which is proportional to absolute temperature.
This current is mirrored by the device MP2, not only back to device t~1 to set the current in Q1, but also to devices MP3 and 1~4, the latter device being proportioned to provide the PTAT
current of appropriate scaling.
The current mirrored by device MP3 of Figure 7a is applied to a resistor tri:.,ming block having two outputs connected to the resistor R2 and device Q3 as shown, with the voltage Vref appearing between the upper end of resistor R2 and the collector of Q3. The resistor trimming block utilizes a plurality of control bits b0 through bn (and their inverse signals) to control the current proportional to absolute temperature and to break the same into two components, one passing through resistor R2 and one passing around the resistor to the emitter of device Q3, the sum of the two components being constant and thus the current Q3 being constant (but of course proportional to absolute temperature) so that the voltage drop across resistor R2 may be varied, or more WO 92!13387 PCf/US921t~0467 w .~. ~i ~i : i Vii :) 12 particularly, set as desired by the control bits. Since the voltage across transistor Q3, connected as a diode, will be a voltage having a substantial negative temperature coefficient, the voltage across resistor R2, which has a positive temperature coefficient, may be scaled by the control bits so that the reference voltage Vref is substantially temperature independent.
Thus the control bits may be used to make up for manufacturing tolerances and variations properly proportion the positive temperature coefficient voltage across resistor R2 with respect to the negative coefficient voltage across Q3 to provide a Vref trimmed to be temperature independent, basically at one bandgap ,.
voltage. The control bits b0 through bn, and the inverse thereof provided through inverters (not shown?, may be controlled in various ways. Obviausly, the control bits may be basic inputs to the integrated circuit, allowing external control or even on the fly variation of Vref and its temperature coefficient. In the preferred embodiment, the control bits b0 through bn are set as desired by on-chip floating gate storage cells which are programmed by the device manufacturer, preferably using multiple purpose device connections so that once properly programmed by temporarily setting the device into a test or programming mode, the same connections may subsequently be used by the user as user input and/or output terminals.
A typical resistor trimming circuit is specifically illustrated in Figure 7f. In particular, the current I (this is the current through device I~3 of Figure 7a) is mirrored through device t~11 of Figure 7f in appropriate proportions by devices Is~72 and 1~I3. As to the current IA through device L~12, the same will be a component of Ix or Iy depending on which of devices MS1 or HSB1 is on. Thus the current IA will be mirrored by devices I~1 and 1~2 to form a component of current I2 or alternatively will be 4V0 92/13337 PCTlUS92/Ott467 13 ~ a ,;~ ;'; °' ;; ~ .
~ w ~l ~~ :.; ii mirrored by devices MP3 and MP9 to form a component of current I1.
Similarly the current IB will be mirrored to provide a component of current I1 or of current I2 depending upon the state of bit b0.
Obviously, while only two bits, namely bits b0 and bl and the associated circuitry are illustrated in Figure 7f, additional control bits may readily be added by merely duplicating three devices and the control connections thereof, such as devices MSO, MSBO and MN3, to provide additional steerable current components IC, ID etc. Each current component, of course, could be equal, though it is more efficient to use a binary progression so that maximum trimmability may be achieved with minimum control hits.
It should be noted that the net effect of the trim circuit of Figure 7a is to set the voltage drop across the resistor R2 for a given current through Q3, the element in series with the resistor.
Changing the voltage drop across a resistor for a given current in an element in series therewith is equivalent to changing the resistance of the resistor. Thus the trim circuit of Figures 7a and 7f is electrically equivalent to changing the resistance of the resistor itself to accurately set the current to voltage transfer function as is done in the prior art by laser trimming techniques. However unlike laser trimming which must he done before the IC is packaged, which is irreversible, which requires mechanical alignment, etc., the trimming of the present invention can be done after packaging if so intended, can be changed and/or reversed, can be done as part of other electrical testing or trimming, etc., and therefore is easier, less expensive and conducive to better yields because of its changeability and reversibility.
The negative temperature coefficient current (NTC) generator ~f Figure 6, shown in detail in Figure 7b, creates the NTC current by forcing a voltage ~7be of a diode connected bipolar device fVO 92/13387 PCf/L~S92/UtD467 ' i~''2 ~
across a resistor. Transistors MN1 and MN2 operate in a manner so as to force the Vbe onto the resistor R. Transistors MP1 and MP2 just mirror equal currents from each other, thereby causing the circuit to be self biased. Transistor MP3 mirrors the current NTC
in the sourcing mode. Note that a completely complementary network is possible in which the N-channel transistors are swapped for the P-channel transistors and vice-versa and the bipolar transistor and the resistor referenced off the positive supply.
The current NTC = Vbe/R. Being a self biased network, a start-up circuit (not shown) is essential with this network.
The temperature independent current generator of Figure 6 is shown in block diagram form in Figure 7c. The generator consists primarily of two current trimming blocks of the type shown in Figure 7d, the difference between the two being that one operates on a set of control bits b0 through bn, and the other operates on the inverse thereof, both current trimming circuits taking an input current and providing an output current whose value degends on the setting of the trimming bits b0 through bn. Thus the NTRIM
'current trimming block receives the negative temperature coefficient current and provides a corresponding negative temperature coefficient current sink as controlled by the trim bits b0 through bn, whereas the PTRIM current trimming block receives the positive temperature coefficient current r~TAT and provides a corresponding positive temperature current sink trimmed by the inverse bits b0 through bn. Thus through the trim bits the relative weighting of the negative temperature coefficient current and the positive temperature coefficient current may be adjusted, preferably through floating gate storage cells controlling the bits, to provide the temperature independent trim current.
The two current trimming blocks of Figure 7c are shown in Figure 7d (the two as stated before differing only by way of the CVO 92/13387 P(_'T/US92/O(i46i ~ 5 ~ ., ~, '.; i ;~ a ~.J a > ~.%
control bits used) . Transistors t~B,I2 through i~IN mirror the current Iin (NTC o~ PTAT) from MN1 with appropriate ratios. The ratioed mirrored currents are added to form Itrim through the N-channel transistor switches MNS1 through I~3BN. For any particular N-channel switch which is off (the corresponding N-channel switch of the other current trimming block therefore being on), then that current ratio does not get added to Itrim. The number of bits used for trimming would depend on the resolution required for Itrim. Note also that an equivalent complementary network can be generated by swapping N-channel transistors for P-channel transistors. By using the current trimming block for generating suitable proportions of the PTAT and NTC currents and then adding the proportioned currents, it is possible to generate a temperature independent current. Using the trim bits to control one of the current trimming blocks, and complementary trim bits to control the other, equal components of the positive temperature coefficient current can be subtracted from Itrim as negative temperature coefficient current is added to Itrim, and vice versa.
flf course, if desired, independent and separate trim bits could also be used for both current trimming blocks to give greater flexibility for trimming the tE.nperature coefficient of Itrim, but more trim bits would be required, requiring either more storage cells for storing the trim information or requiring some ether additional independent control.
Figure 7e shows a circuit diagram for the tuning network of Figure 6. This network utilizes the temperature independent current Itrim as its input and consists of a current trimming sub-block dike that of Figure 7d) and some mirror transistors with proper ratios to generate the currents Iosc and Ix with the proper direction, e.g. sourcing and sinking. The trimming network used herein for the Itrim input current, while being temperature ~~~.~3~~u()J
independent, may not be of the proper magnitude. Thus the trim bits b0 through bn are used to set the magnitude of the currents Iosc and Ix. Since the currents Iosc and Ix have a fixed ratio between them, readily repeatable by the fixed device geometry, only one set of trim bits are required to set the proper value for Iosc and Ix, with the fixed ratio therebetween automatically being maintained.
Thus the oscillator time-period is directly proportional to the filter time-constants. Hence, a control loop has been disclosed in which tuning is performed on-chip without any external components, by observing the on-chip oscillator frequency. At the same time, the filter time-constants are tuned automatically. Since tuning is inherent (the oscillator frequency and the filter characteristics automatically track each other), it is possible to vary the trimming to have different sampling rates in a sample-data system, as the control scheme is such that the clock to filter cutoff frequency ratio will remain the same, thereby satisfying the Nyquist criteria and avoiding effects of aliasing over the whole tunable range. Temperature and power supply independent tuning parameters have been used to generate oscillatcr frequency and filter cutoff characteristics tolerant to ambient changes. Also trimming of currents using the various current trim circuits of the present invention is in one case equivalent to changing the resistance of a resistor and in another case is a true current trim, and thus the trim capability is provided without requiring~the use of prior art irreversible laiser trimming techniques. In the claims to follow, no distinction is made between source and sink currents, as circuits may readily be made to generate or be responsive to either form of current. , While the preferred embodiment of the present invention has been disclosed and described herein, it mill be obvious to those w2~ 92/133A7 PCT/L1S92/00467 17 ~ ~ " ~": « ~' :~
'_" 1 ~ ~~_. ~_.i 1.W.~
skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope thereof.
Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type.
This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents.
The monolithic implementation of the Control Block is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current, the filter time-constants also are appropriately set to satisfy the Nyquist criteria fax a sampling rate referenced to the oscillator frequency. Trimming and tuning are accomplishe~.~ by digital control to control the summing of appropriate current components after manufacture, such as by the programming of on-chip storage cells provided for this purpose.
WO 92/13387 PC'T/US92/Od467 .,rir,~,~1 4 BRTE~ D S.RTPTInN pF TH DRAWTN~~
Figure 1 is a general schematic representation of the use of a trimmable resistor to obtain an accurate Vo or an accurate current to voltage transfer function in the prior art.
Figure 2a through 2c are general schematic representations of forms of trimmable resistors to obtain an accurate Vo or an accurate current to voltage transfer function in the prior art, namely a series and a parallel combination of resistors with switches, and a single resistor for laser trimming, respectively, Figure 3 is a circuit diagram for the constant current relaxation oscillator used in the preferred embodiment of the present invention.
Figure 4 is a circuit diagram for the MOSFET-R gate control 'voltage generator used in the preferred embodiment of the present fnvention.
Figure 5 is a block diagram for the MOSFET-R and oscillator-F
control block used in the preferred embodiment of the present invention.
Figure 6 is a block diagram_for the temperature independent voltage and tuning current generator used in the preferred embodiment of the present invention.
Figure 7a is a block diagram for the temperature independent voltage source and PTAT current source used in the preferred embodiment of the present invention. .
Figure 7b is a circuit diagsam for the negative temperature coefficient current generator used in the preferred embodiment of the present invention.
Figure 7c is a circuit diagram for the temperature independent current generator used in the preferred embodiment of the present invention.
. ': , , .
;j ~ .. n i'J
i v ~a ~ !~ i: ~ 1~ J
Figure 7d is a circuit diagram for the current trimming block used in the preferred embodiment of the present invention.
Figure 7e is a circuit diagram for the tuning network used in the preferred embodiment of the present invention.
Figure 7f is a circuit diagram for the rea istor trimming block used in the preferred embodiment of the gresent invention.
WO 92/13387 PC:'T/US92IOOd67 '~~.4~~~~~~~
s LED DESCRIPTION OF THF T~NmrnN
In certain systems such as sampled data systems, both the filter time constants and the oscillator frequency used to generate the sampling frequency each need a suitable reference.
In accordance with the present invention, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameter s of the oscillator and the filter are time-period and time-constant respectively, both being derivatives of time, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type and construction.
This has the advantage of closer tracking through process and ambient variations. In the present implementation, the monolithic capacitor is used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively. The monolithic implementation of the Control Block is such that by tuning the ascillatar frequency to the appropriate value, the filter time-constants also get appropriately set. lY.e Control Block essentially consists of three distinct sub-blocks:
a) Constant Current Relaxation Oscillator b) MOSFET-R Gate, Control Voltage Generator c) Temperature Independent Voltage and Tuning Current Generator The Constant Current Relaxation Oscillator:
Referring to Figure 3, this oscillator operates on the principle that a pair of capacitors are alternately charged (each from a discharged state) through a constant current (Iosc) to a certain fixed voltage (Vref). When one of the capacitors reaches WO 92/13387 Pf,'d'lUS92/OQ467 FJ ~ ~~ V ;' pJ
Vref, a comparator detects the condition and then turns on the discharge circuitry for this capacitor. At the same time the other capacitor is released from the discharged state to charge up to Vref. The alternating periodic charging and discharging of the pair of capacitors gives the behavior of an oscillator. The advantage of using a pair of alternating capacitors is that the discharge times of the capacitors do not come into the time-period equation and hence non-critical capacitor discharge circuitry can be used, thereby reducing silicon area required.
The basic equation governing the opezation of the oscillator is:
Tosc = A C3~~ * Vref (Eq-1) Iosc Where:
Tosc m Time-period of oscillation A = constant of proportionality, (depends on circuit , design) Vref,= Fixed voltage to which capacitors charge.
Iosc = Constant current through capacitors to get charged to Vref Cap = Capacitor value (each capacitor), The above equation can also be written in terms of frequency.
Fosc = B Iosc (Eq-2) (B = 1 / A) Cap * Vref The MOSFET-R Gate Control Voltage Generator:
The purpose of the control loop is to generate a voltage that could be applied to all the gates of the filter MJSFET-RS so that the MOSFETs will exhibit the desired resistance between the sources and drains thereof dependent on the geometry of the MOSFETS, The control loop itself consists of a reference MOSFET-R
which is placed in the proper do operating environment. All the .( ~; :~ ;.. ~~ ti s ~~~r~
filter MOSFET-Rs are ratioed to this reference MOSFET-R through ratios of their respective channel lengths to that of the reference MOSFET-R channel length, such that the proper effective resistance is generated, which in turn, combining with the filter capacitors, set the proper filter time-constants. If there are variations due to ambient changes such as power supply and , temperature, the control loop automatically changes the gate voltage (VCNTRL) to keep the effective resistance of the MOSFET-Rs fixed.
Referring to Figure 4, the dotted block XX effectively generates voltages V2 and V3, which are ratioed off the fixed voltage Vref. The voltage to current generator consisting of amplifier A1, transistor MD (preferably a zero threshold device), resistor R1 and diode connected p-channel device MP1, creates a current I flowing through MP1 given by the relation I - Vref/R1.
The current I, mirrored by p-channel devices MP2 and MP3, is made to flow through resistors R2 and R3, respectively, to generate voltages V2 and V3 respectively, given by the relations V2 = IR2 and V3 = IR3, respectively. Replacement of I in the V2, V3 relations gives V2 = Vref (R2/R1) and V3 = Vref(R3fRl). It is noticed that V2, V3 are ratioed to Vref, through the resistor ratios R2/Rl and R3/R1 respectively, which in a monolithic implementation are accurately gFnerated. The dotted block XY is the control loop, consisting of voltage buffer A2, reference ~IOSFET-R MDREF, loop amplifier A3 and mirror n-channel transistor MN2. Voltage V2 is applied to node NI of MDREF through the voltage buffer A2. The voltage output V2 is isolated from nc:de N1 by the buffer A2. Voltage V3 is applied to the noninverting input of the loop amplifier A3, and through the high gain of A3 gets virtually applied to node N2 of M~REF. Thus a voltage difference Vp = V2 - V3 is applied across MDREF. V2 and V3 are such that CVO 92/13387 PCf/US92/t10467 n~~~p 1i V .1 lJ U
they place MDREF in the normal operating environment (voltage range) of the filter MOSFET-Rs, and Vp is the maximum signal level that the filter MOSFETs will see across them. It is important to have the normal operating environment setup because MOSFET-Rs are non-linear active devices and thus have different characteristics at different operating points. This essentially creates an accurate referencing scheme. The transistor MN2 pulls a current IRREF through MDREF. The action of the loop is such that the amplifier sets the voltage VCNTRZ to hold the relationship:
Reff = VP/ IRREF. (Eq-3) Where: Reff = the effective resistance of MDREF.
All filter MOSFET-R effective resistances are ratios of Reff.
The filter time-constant equation can be written as:
Trc m Vp * Cap/IRREF ~ (Vref * Cap/IRREF) * RZ/Rl (1-R3/R2) = M * (Vref * Cap/IRREF) (Eq-q) Also:
Reff = M * (Vref/iRREF) (Eq-5) From equations 1 through 9, it is seen that both Tosc and Trc are inversely proportional to a current parameter, Bence it is possible to have the currents Iose and IRREF ratioed from a common trimmable current Itrim. The frequency of the oscillator may be observed and the Itrim changed accordingly to set the oscillation frequency. This would automatically set the filter time-constants and tune the filter for,the proper cutoff characteristics. Once tuned, Tosc and Trc must remain stable over ambient changes such as power supply variations and temperature variations. The constants of proportionality (A, M) are ratios of identical components, and capacitors once fabricated have very tight tolerance to ambient changes. Only Vref and the currents Iosc and IRREF have to be tolerant to temperature and power supply variations. This means that Vref, Iosc and IRREF should be WO 92/ 13387 F'Cf/US92/0046 i <J < <~ r L~ l~
w ~~ ~ i~ ':~ ~i c~
temperature and power supply independent.
Temperature Independent Voltage and Tuning Current Generator:
The temperature independent voltage Vref is generated from a band-gap circuit with high power supply rejection ratio. A PTAT
(proportional to absolute temperature) current: is derived from the band--gap circuit, and is added to a current with a negative temperature coefficient (NTC). With a proper ratio of the PTAT
and the NTC currents, a temperature independent current (Itrim) is generated. Itrim is passed through a tuning network which generates the currents Ix and Iosc. Since Ix and Iosc are ratioed to Itrim, they are also temperature independent.
Combining equation 5 and equation 1:
Fosc ~ B * M * Ion * 1 ~ _ y IRREF Reff*Cap Reff*Cap Or, Tosc m Z * (Reff * Cap) It may be seen from Figures 3 and 4 and the description thereof that the constant current relaxation oscillator of Figure .
3 utilizes as its inputs a fixed reference voltage Vref and a control current Iose for direct control of the frequency of oscillator, and that the MOSFET-R gate control generator of Figure 9 utilizes as its inputs the same reference voltage Vref as well as the control current Ix. This reference voltage Vref as well as the control currents Ix and Iosc are generated by a temperature independent voltage and tuning current generator illustrated in block diagram form in Figure 5. Various sub-blocks making up the temperature independent voltage and tuning current generator illustrated in Figure 5 are shown in Figure 6. As shown therein, temperature independent voltage source and PTAT current source generates the reference voltage Vref as well as a current proportional to absolute temperature (PTAT). This, together with a negative temperature coefficient (NTC) current provided by the 11 : ; .~ ,, n : w ,.", E i .w Li: : i ?~: i~
negative temperature coefficient current generator are provided to a temperature independent current generator, which in turn provides a current Itrim to a tuning network which provides the currents Ix and Iosc.
The temperature independent voltage source and PTAT current source block of Figure 6, shown in detail in Figure 7a, is essentially a bandgap reference generator. l3ipolar devices Ql and Q2 each carry the same current but operate at different current densities as a result of the device Q2 having an area A times the area of the device Ql. Thus device Q2 operates at a lower current density than Q1, with the result that the voltage difference between the emitter of Q1 and the emitter of Q2 is a voltage directly proportional to absolute temperature. This voltage ..
appears across resistor R1, resulting in a current through RI (and Q2 as well as Q1) which is proportional to absolute temperature.
This current is mirrored by the device MP2, not only back to device t~1 to set the current in Q1, but also to devices MP3 and 1~4, the latter device being proportioned to provide the PTAT
current of appropriate scaling.
The current mirrored by device MP3 of Figure 7a is applied to a resistor tri:.,ming block having two outputs connected to the resistor R2 and device Q3 as shown, with the voltage Vref appearing between the upper end of resistor R2 and the collector of Q3. The resistor trimming block utilizes a plurality of control bits b0 through bn (and their inverse signals) to control the current proportional to absolute temperature and to break the same into two components, one passing through resistor R2 and one passing around the resistor to the emitter of device Q3, the sum of the two components being constant and thus the current Q3 being constant (but of course proportional to absolute temperature) so that the voltage drop across resistor R2 may be varied, or more WO 92!13387 PCf/US921t~0467 w .~. ~i ~i : i Vii :) 12 particularly, set as desired by the control bits. Since the voltage across transistor Q3, connected as a diode, will be a voltage having a substantial negative temperature coefficient, the voltage across resistor R2, which has a positive temperature coefficient, may be scaled by the control bits so that the reference voltage Vref is substantially temperature independent.
Thus the control bits may be used to make up for manufacturing tolerances and variations properly proportion the positive temperature coefficient voltage across resistor R2 with respect to the negative coefficient voltage across Q3 to provide a Vref trimmed to be temperature independent, basically at one bandgap ,.
voltage. The control bits b0 through bn, and the inverse thereof provided through inverters (not shown?, may be controlled in various ways. Obviausly, the control bits may be basic inputs to the integrated circuit, allowing external control or even on the fly variation of Vref and its temperature coefficient. In the preferred embodiment, the control bits b0 through bn are set as desired by on-chip floating gate storage cells which are programmed by the device manufacturer, preferably using multiple purpose device connections so that once properly programmed by temporarily setting the device into a test or programming mode, the same connections may subsequently be used by the user as user input and/or output terminals.
A typical resistor trimming circuit is specifically illustrated in Figure 7f. In particular, the current I (this is the current through device I~3 of Figure 7a) is mirrored through device t~11 of Figure 7f in appropriate proportions by devices Is~72 and 1~I3. As to the current IA through device L~12, the same will be a component of Ix or Iy depending on which of devices MS1 or HSB1 is on. Thus the current IA will be mirrored by devices I~1 and 1~2 to form a component of current I2 or alternatively will be 4V0 92/13337 PCTlUS92/Ott467 13 ~ a ,;~ ;'; °' ;; ~ .
~ w ~l ~~ :.; ii mirrored by devices MP3 and MP9 to form a component of current I1.
Similarly the current IB will be mirrored to provide a component of current I1 or of current I2 depending upon the state of bit b0.
Obviously, while only two bits, namely bits b0 and bl and the associated circuitry are illustrated in Figure 7f, additional control bits may readily be added by merely duplicating three devices and the control connections thereof, such as devices MSO, MSBO and MN3, to provide additional steerable current components IC, ID etc. Each current component, of course, could be equal, though it is more efficient to use a binary progression so that maximum trimmability may be achieved with minimum control hits.
It should be noted that the net effect of the trim circuit of Figure 7a is to set the voltage drop across the resistor R2 for a given current through Q3, the element in series with the resistor.
Changing the voltage drop across a resistor for a given current in an element in series therewith is equivalent to changing the resistance of the resistor. Thus the trim circuit of Figures 7a and 7f is electrically equivalent to changing the resistance of the resistor itself to accurately set the current to voltage transfer function as is done in the prior art by laser trimming techniques. However unlike laser trimming which must he done before the IC is packaged, which is irreversible, which requires mechanical alignment, etc., the trimming of the present invention can be done after packaging if so intended, can be changed and/or reversed, can be done as part of other electrical testing or trimming, etc., and therefore is easier, less expensive and conducive to better yields because of its changeability and reversibility.
The negative temperature coefficient current (NTC) generator ~f Figure 6, shown in detail in Figure 7b, creates the NTC current by forcing a voltage ~7be of a diode connected bipolar device fVO 92/13387 PCf/L~S92/UtD467 ' i~''2 ~
across a resistor. Transistors MN1 and MN2 operate in a manner so as to force the Vbe onto the resistor R. Transistors MP1 and MP2 just mirror equal currents from each other, thereby causing the circuit to be self biased. Transistor MP3 mirrors the current NTC
in the sourcing mode. Note that a completely complementary network is possible in which the N-channel transistors are swapped for the P-channel transistors and vice-versa and the bipolar transistor and the resistor referenced off the positive supply.
The current NTC = Vbe/R. Being a self biased network, a start-up circuit (not shown) is essential with this network.
The temperature independent current generator of Figure 6 is shown in block diagram form in Figure 7c. The generator consists primarily of two current trimming blocks of the type shown in Figure 7d, the difference between the two being that one operates on a set of control bits b0 through bn, and the other operates on the inverse thereof, both current trimming circuits taking an input current and providing an output current whose value degends on the setting of the trimming bits b0 through bn. Thus the NTRIM
'current trimming block receives the negative temperature coefficient current and provides a corresponding negative temperature coefficient current sink as controlled by the trim bits b0 through bn, whereas the PTRIM current trimming block receives the positive temperature coefficient current r~TAT and provides a corresponding positive temperature current sink trimmed by the inverse bits b0 through bn. Thus through the trim bits the relative weighting of the negative temperature coefficient current and the positive temperature coefficient current may be adjusted, preferably through floating gate storage cells controlling the bits, to provide the temperature independent trim current.
The two current trimming blocks of Figure 7c are shown in Figure 7d (the two as stated before differing only by way of the CVO 92/13387 P(_'T/US92/O(i46i ~ 5 ~ ., ~, '.; i ;~ a ~.J a > ~.%
control bits used) . Transistors t~B,I2 through i~IN mirror the current Iin (NTC o~ PTAT) from MN1 with appropriate ratios. The ratioed mirrored currents are added to form Itrim through the N-channel transistor switches MNS1 through I~3BN. For any particular N-channel switch which is off (the corresponding N-channel switch of the other current trimming block therefore being on), then that current ratio does not get added to Itrim. The number of bits used for trimming would depend on the resolution required for Itrim. Note also that an equivalent complementary network can be generated by swapping N-channel transistors for P-channel transistors. By using the current trimming block for generating suitable proportions of the PTAT and NTC currents and then adding the proportioned currents, it is possible to generate a temperature independent current. Using the trim bits to control one of the current trimming blocks, and complementary trim bits to control the other, equal components of the positive temperature coefficient current can be subtracted from Itrim as negative temperature coefficient current is added to Itrim, and vice versa.
flf course, if desired, independent and separate trim bits could also be used for both current trimming blocks to give greater flexibility for trimming the tE.nperature coefficient of Itrim, but more trim bits would be required, requiring either more storage cells for storing the trim information or requiring some ether additional independent control.
Figure 7e shows a circuit diagram for the tuning network of Figure 6. This network utilizes the temperature independent current Itrim as its input and consists of a current trimming sub-block dike that of Figure 7d) and some mirror transistors with proper ratios to generate the currents Iosc and Ix with the proper direction, e.g. sourcing and sinking. The trimming network used herein for the Itrim input current, while being temperature ~~~.~3~~u()J
independent, may not be of the proper magnitude. Thus the trim bits b0 through bn are used to set the magnitude of the currents Iosc and Ix. Since the currents Iosc and Ix have a fixed ratio between them, readily repeatable by the fixed device geometry, only one set of trim bits are required to set the proper value for Iosc and Ix, with the fixed ratio therebetween automatically being maintained.
Thus the oscillator time-period is directly proportional to the filter time-constants. Hence, a control loop has been disclosed in which tuning is performed on-chip without any external components, by observing the on-chip oscillator frequency. At the same time, the filter time-constants are tuned automatically. Since tuning is inherent (the oscillator frequency and the filter characteristics automatically track each other), it is possible to vary the trimming to have different sampling rates in a sample-data system, as the control scheme is such that the clock to filter cutoff frequency ratio will remain the same, thereby satisfying the Nyquist criteria and avoiding effects of aliasing over the whole tunable range. Temperature and power supply independent tuning parameters have been used to generate oscillatcr frequency and filter cutoff characteristics tolerant to ambient changes. Also trimming of currents using the various current trim circuits of the present invention is in one case equivalent to changing the resistance of a resistor and in another case is a true current trim, and thus the trim capability is provided without requiring~the use of prior art irreversible laiser trimming techniques. In the claims to follow, no distinction is made between source and sink currents, as circuits may readily be made to generate or be responsive to either form of current. , While the preferred embodiment of the present invention has been disclosed and described herein, it mill be obvious to those w2~ 92/133A7 PCT/L1S92/00467 17 ~ ~ " ~": « ~' :~
'_" 1 ~ ~~_. ~_.i 1.W.~
skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope thereof.
Claims (32)
1. In an integrated circuit operative on an oscillator and a filter having RC time constants related to the frequency of oscillation of the oscillator, the improvement in the integrated circuit comprising:
an oscillator having a frequency of oscillation proportionate to an oscillator control current provided thereto;
a filter having RC time constants wherein the R values are set by setting the gate voltage of resistance determining MOSFET
devices in the filter circuit;
a MOSFET-R gate control generator coupled to the filter for generating a MOSFET-R gate control voltage for controlling the gate voltage of the resistance determining MOSFET devices in the filter circuit, the MOSFET-R gate control generator including a reference MOSFET having a source and drain voltage difference thereon representative of the voltage difference across the sources and drains of the resistance determining MOSFET devices in the filter circuit, the reference MOSFET having a gate voltage thereon controlled to provide a current therethrough proportional to a MOSFET-R gate control generator control current provided to the MOSFET-R gate control generator, the MOSFET-R gate control voltage being responsive to the gate voltage of the reference MOSFET; and, a current generator coupled to the oscillator and the MOSFET-R gate control generator for generating the oscillator control current and the MOSFET-R gate control generator control current, respectively.
an oscillator having a frequency of oscillation proportionate to an oscillator control current provided thereto;
a filter having RC time constants wherein the R values are set by setting the gate voltage of resistance determining MOSFET
devices in the filter circuit;
a MOSFET-R gate control generator coupled to the filter for generating a MOSFET-R gate control voltage for controlling the gate voltage of the resistance determining MOSFET devices in the filter circuit, the MOSFET-R gate control generator including a reference MOSFET having a source and drain voltage difference thereon representative of the voltage difference across the sources and drains of the resistance determining MOSFET devices in the filter circuit, the reference MOSFET having a gate voltage thereon controlled to provide a current therethrough proportional to a MOSFET-R gate control generator control current provided to the MOSFET-R gate control generator, the MOSFET-R gate control voltage being responsive to the gate voltage of the reference MOSFET; and, a current generator coupled to the oscillator and the MOSFET-R gate control generator for generating the oscillator control current and the MOSFET-R gate control generator control current, respectively.
2. The improvement of claim 1 wherein the reference MOSFET
has source and drain voltages thereon substantially equal to the voltages on the sources and drains of the resistance determining MOSFET devices in the filter circuit, and wherein the MOSFET-R
gate control voltage is substantially equal to the gate voltage of the reference MOSFET.
has source and drain voltages thereon substantially equal to the voltages on the sources and drains of the resistance determining MOSFET devices in the filter circuit, and wherein the MOSFET-R
gate control voltage is substantially equal to the gate voltage of the reference MOSFET.
3. The improvement of claim 1 wherein the current generator is a means for generating the oscillator control current and the MOSFET-R gate control generator control current with a fixed ratio therebetween, whereby the RC time constants of the filter will track variations in the period of oscillation of the oscillator.
4. The improvement of claim 3 for use in a sampled data system having a sample rate derived from the oscillator frequency wherein the RC time constants of the filter are chosen in relation to the period of oscillation of the oscillator and track variations in the period of oscillation of the oscillator so as to satisfy the Nyquist criteria for the sampling rate throughout the variations in the period of oscillation of the oscillator.
5. The improvement of claim 3 wherein the current generator is a means for generating a trim current, and wherein the current generator further includes:
first means for generating a plurality of current components each mirrored from the trim current:
second means for summing selected apes of the current components to control the oscillator control current and the MOSFET-R gate control generator control current in proportion to the sum; and, digital control means responsive to control bits to select which of the current components are summed;
whereby the oscillator control current and the MOSFET-R gate control generator control current may be controlled by control of the control bits.
first means for generating a plurality of current components each mirrored from the trim current:
second means for summing selected apes of the current components to control the oscillator control current and the MOSFET-R gate control generator control current in proportion to the sum; and, digital control means responsive to control bits to select which of the current components are summed;
whereby the oscillator control current and the MOSFET-R gate control generator control current may be controlled by control of the control bits.
6. The improvement of claim 5 further comprised of programmable floating gate storage cells coupled to the digital control means for providing the control bits to the digital control means responsive to the programming of the programmable floating gate storage cells.
7. The improvement of claim 3 wherein the oscillator control current and the MOSFET-R gate control generator control current are both substantially temperature independent.
8. The improvement of claim 3 wherein the current generator is comprised of:
a first current generator portion for providing a current having a positive temperature coefficient;
a second current component generator portion for providing a current component having a negative temperature coefficient; and, means for combining current components ratioed from the currents generated by the first and second current generator portions to provide a substantially temperature independent current from which the oscillate control current and the MOSFET-R
gate control generator control current are ratioed.
a first current generator portion for providing a current having a positive temperature coefficient;
a second current component generator portion for providing a current component having a negative temperature coefficient; and, means for combining current components ratioed from the currents generated by the first and second current generator portions to provide a substantially temperature independent current from which the oscillate control current and the MOSFET-R
gate control generator control current are ratioed.
9. The improvement of claim 3 wherein the current generator is comprised of:
a first current generator portion far providing a current having a positive temperature coefficient;
a second current generator portion for providing a current having a negative temperature coefficient; and, means for selectively combining current components ratioed from the currents generated by the first and second current generator portions to provide a trim current from which the oscillator control current and the MOSFET-R gate control generator control current are ratioed, the means fox selectively combining current components providing a trim current having a substantially fixed magnitude and a selectively variable temperature sensitivity dependent upon the selective combination of the current components.
a first current generator portion far providing a current having a positive temperature coefficient;
a second current generator portion for providing a current having a negative temperature coefficient; and, means for selectively combining current components ratioed from the currents generated by the first and second current generator portions to provide a trim current from which the oscillator control current and the MOSFET-R gate control generator control current are ratioed, the means fox selectively combining current components providing a trim current having a substantially fixed magnitude and a selectively variable temperature sensitivity dependent upon the selective combination of the current components.
10. The improvement of claim 9 wherein the means for selectively combining current components ratioed from the currents generated by the first and second current component generators to provide a trim current from which the oscillator control current and the MOSFET-R gate control generator control current are ratioed comprises digital control means responsive to control bits to select which of the current components are summed.
11. The improvement of claim 10 further comprised of programmable floating gate storage cells coupled to the digital control means for providing the control bits to the digital control means responsive to the programming of the programmable floating gate storage cells.
12. In a sampled data integrated circuit having a sample rate referenced to the frequency of oscillation of an oscillator and a filter having RC time constants related to the frequency of oscillation of the oscillator, the improvement in the integrated circuit comprising:
an oscillator having a frequency of oscillation proportional to an oscillator control current provided thereto;
a filter having RC time constants wherein the R values are set by setting the gate voltage of resistance determining MOSFET
devices in the filter circuit;
a MOSFET-R gate control generator coupled to the filter for generating a MOSFET-R gate control voltage for controlling the gate voltage of the resistance determining MOSFET devices in the filter circuit, the MOSFET-R gate control generator including a reference MOSFET having a source and drain voltage difference thereon representative of the voltage difference across the sources and drains of the resistance determining MOSFET devices in the filter circuit, the reference MOSFET having a gate voltage thereon controlled to provide a current therethrough proportional to a MOSFET-R gate control generator control current provided to the MOSFET-R gate control generator, the MOSFET-R gate control voltage being responsive to the gate voltage of the reference MOSFET; and, a current generator coupled to the oscillator and the MOSFET-R gate control generator for generating the oscillator control current and the MOSFET-R gate control generator control current, respectively, with a fixed ratio therebetween so as to track variations in the period of oscillation of the oscillator, the RC
time constants of the filter being chosen in relation to the period of oscillation of the oscillator sa as to satisfy the Nyquist criteria for the sampling rate throughout the variations in the period of oscillation of the oscillator.
an oscillator having a frequency of oscillation proportional to an oscillator control current provided thereto;
a filter having RC time constants wherein the R values are set by setting the gate voltage of resistance determining MOSFET
devices in the filter circuit;
a MOSFET-R gate control generator coupled to the filter for generating a MOSFET-R gate control voltage for controlling the gate voltage of the resistance determining MOSFET devices in the filter circuit, the MOSFET-R gate control generator including a reference MOSFET having a source and drain voltage difference thereon representative of the voltage difference across the sources and drains of the resistance determining MOSFET devices in the filter circuit, the reference MOSFET having a gate voltage thereon controlled to provide a current therethrough proportional to a MOSFET-R gate control generator control current provided to the MOSFET-R gate control generator, the MOSFET-R gate control voltage being responsive to the gate voltage of the reference MOSFET; and, a current generator coupled to the oscillator and the MOSFET-R gate control generator for generating the oscillator control current and the MOSFET-R gate control generator control current, respectively, with a fixed ratio therebetween so as to track variations in the period of oscillation of the oscillator, the RC
time constants of the filter being chosen in relation to the period of oscillation of the oscillator sa as to satisfy the Nyquist criteria for the sampling rate throughout the variations in the period of oscillation of the oscillator.
23. In an integrated circuit having integrated circuit portions, the operation of which is dependent on a reference current provided thereto, the improvement in the integrated circuit comprising:
first means for generating a controlled current;
second means coupled to the first means for summing selected current components ratioed from the current generated by the first means to provide the reference current; and, digital control means responsive to control hits to select which of the current components are summed;
whereby the reference current may be controlled by control of the control bits.
first means for generating a controlled current;
second means coupled to the first means for summing selected current components ratioed from the current generated by the first means to provide the reference current; and, digital control means responsive to control hits to select which of the current components are summed;
whereby the reference current may be controlled by control of the control bits.
14. The improvement of claim 13 further comprised of programmable floating gate storage cells coupled to the digital control means for providing the control bits to the digital control means responsive to the programming of the programmable floating gate storage cells.
15. A method of trimming the apparent current to voltage transfer function of a resistor comprising the steps of:
providing a resistor for which the apparent current to voltage transfer function is to be varied;
providing a first current on which the current to voltage transfer function of the resistor is to be based;
providing means for generating a plurality of current components, each ratioed to the first current; and, steering selected ones of the current components through the resistor to provide the voltage drop thereacross for the desired apparent current to voltage transfer function of the resistor.
providing a resistor for which the apparent current to voltage transfer function is to be varied;
providing a first current on which the current to voltage transfer function of the resistor is to be based;
providing means for generating a plurality of current components, each ratioed to the first current; and, steering selected ones of the current components through the resistor to provide the voltage drop thereacross for the desired apparent current to voltage transfer function of the resistor.
16. The method of claim 15 wherein the plurality of current components are of a relative magnitude corresponding approximately to a binary progression.
17. The method of claim 15 further comprising a conduction path in parallel to the resistor, and wherein the current components not passing through the resistor are passed through the parallel conduction path, whereby the total current passing through the parallel combination of the resistor and the parallel conduction path has a fixed relation to the first current independent of the fraction thereof passing only through the resistor.
18. The method of claim 17 further comprising the steps of:
providing controllable switch means for steering selected ones of the current components through the resistor and the remaining current components through the parallel conduction path;
providing programmable storage means for controlling the controllable switch means: and programming the programmable storage means to provide the desired apparent current to voltage transfer function of the resistor.
providing controllable switch means for steering selected ones of the current components through the resistor and the remaining current components through the parallel conduction path;
providing programmable storage means for controlling the controllable switch means: and programming the programmable storage means to provide the desired apparent current to voltage transfer function of the resistor.
19. The method of claim 18 wherein the programmable storage means is a floating gate MOSFET storage means.
20. A method of trimming a current comprising the steps of:
providing a first current having a fixed relationship to the desired trimmed current;
providing means for generating a plurality of current components, each ratioed to the first current; and, summing selected ones of the current components to provide the desired trimmed current.
providing a first current having a fixed relationship to the desired trimmed current;
providing means for generating a plurality of current components, each ratioed to the first current; and, summing selected ones of the current components to provide the desired trimmed current.
21. The method of claim 20 further comprising the steps of:
providing controllable switch means for selecting which of the current components are to be summed; and, controlling the switch means to sum the desired current components.
providing controllable switch means for selecting which of the current components are to be summed; and, controlling the switch means to sum the desired current components.
22. The method of claim 21 further comprising the steps of:
providing programmable storage means for controlling the controllable switch means; and programming the programmable storage sum the desired current components.
providing programmable storage means for controlling the controllable switch means; and programming the programmable storage sum the desired current components.
23. The method of claim 22 wherein the programmable storage means is a floating gate MOSFET storage means.
24. The method of claim 23 wherein the plurality of current components are of a relative magnitude corresponding approximately to a binary progression.
25. Apparatus for trimming the apparent current to voltage transfer function of a resistor comprising:
a resistor for which the apparent current to voltage transfer function is to be varied;
generating means for generating a first current on which the current to voltage transfer function of the resistor is to be based;
ratioing means responsive to the generating means for generating a plurality of current components, each ratioed to the first current:
a conduction path in parallel to the resistor and, steering means for steering selected ones of the current components through the resistor to provide the voltage drop thereacross for the desired apparent current to voltage transfer function of the resistor, and for steering the remaining ones of the current components through the parallel conduction path, whereby the desired apparent current to voltage transfer function of the resistor is obtained and also the total current passing through the parallel combination of the resistor and the parallel conduction path has a fixed relation to the first current independent of the fraction thereof passing only through the resistor.
a resistor for which the apparent current to voltage transfer function is to be varied;
generating means for generating a first current on which the current to voltage transfer function of the resistor is to be based;
ratioing means responsive to the generating means for generating a plurality of current components, each ratioed to the first current:
a conduction path in parallel to the resistor and, steering means for steering selected ones of the current components through the resistor to provide the voltage drop thereacross for the desired apparent current to voltage transfer function of the resistor, and for steering the remaining ones of the current components through the parallel conduction path, whereby the desired apparent current to voltage transfer function of the resistor is obtained and also the total current passing through the parallel combination of the resistor and the parallel conduction path has a fixed relation to the first current independent of the fraction thereof passing only through the resistor.
26. The apparatus of claim 25 wherein the plurality of current components are of a relative magnitude corresponding approximately to a binary progression.
27. The apparatus of claim 25 wherein the steering means comprises controllable switch means for steering selected ones of the current components through the resistor and the remaining current components through the parallel conduction path, and further comprising programmable storage means for controlling the controllable switch means.
28. The apparatus of claim 27 wherein the programmable storage means is a floating gate MOSFET storage means.
29. Apparatus for trimming a current comprising:
means for generating a first current having a fixed relationship to the desired trimmed current;
means for generating a plurality of current components, each ratioed to the first current;
summing means for summing selected ones of the current components to provide the desired trimmed current; and, controllable switch means for selecting which of the current components are to be summed
means for generating a first current having a fixed relationship to the desired trimmed current;
means for generating a plurality of current components, each ratioed to the first current;
summing means for summing selected ones of the current components to provide the desired trimmed current; and, controllable switch means for selecting which of the current components are to be summed
30. The apparatus of claim 29 further comprising programmable storage means for controlling the controllable switch means.
31. The apparatus of claim 29 wherein the programmable storage means is a floating gate MOSFET storage means.
32. The apparatus of claim 31 wherein the plurality of current components are of a relative magnitude corresponding approximately to a binary progression.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US64403391A | 1991-01-22 | 1991-01-22 | |
| US644,033 | 1991-01-22 | ||
| PCT/US1992/000467 WO1992013387A1 (en) | 1991-01-22 | 1992-01-21 | Integrated mosfet resistance and oscillator frequency control and trim methods and apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2100568A1 CA2100568A1 (en) | 1992-07-23 |
| CA2100568C true CA2100568C (en) | 2000-11-07 |
Family
ID=24583172
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002100568A Expired - Fee Related CA2100568C (en) | 1991-01-22 | 1992-01-21 | Integrated mosfet resistance and oscillator frequency control and trim methods and apparatus |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP0659310B1 (en) |
| JP (1) | JP3168425B2 (en) |
| KR (1) | KR0134113B1 (en) |
| CA (1) | CA2100568C (en) |
| DE (1) | DE69226656T2 (en) |
| SG (1) | SG47923A1 (en) |
| WO (1) | WO1992013387A1 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5701099A (en) * | 1995-11-27 | 1997-12-23 | Level One Communications, Inc. | Transconductor-C filter element with coarse and fine adjustment |
| GB2349995A (en) | 1999-05-14 | 2000-11-15 | Ericsson Telefon Ab L M | An oscillator in which when the frequency is adjusted the level is also adjusted |
| DE10125164C1 (en) | 2001-05-23 | 2003-01-16 | Infineon Technologies Ag | Semiconductor chip with trimmable oscillator |
| JP4491405B2 (en) * | 2004-11-15 | 2010-06-30 | 三星電子株式会社 | Bias current generation circuit without resistance element |
| JP5490549B2 (en) * | 2010-01-22 | 2014-05-14 | ローム株式会社 | Semiconductor integrated circuit and differential amplifier and buffer amplifier using the same |
| CN113741618B (en) * | 2021-09-29 | 2022-05-17 | 电子科技大学 | Rear end trimming control circuit |
| CN114115417B (en) * | 2021-11-12 | 2022-12-20 | 中国兵器工业集团第二一四研究所苏州研发中心 | Band gap reference circuit |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL8401370A (en) * | 1984-05-01 | 1985-12-02 | Philips Nv | FILTER SWITCHING. |
| US4717845A (en) * | 1987-01-02 | 1988-01-05 | Sgs Semiconductor Corporation | TTL compatible CMOS input circuit |
| US4874964A (en) * | 1987-05-28 | 1989-10-17 | Sony Corporation | Current generating circuit |
| US4918338A (en) * | 1988-10-04 | 1990-04-17 | North American Philips Corporation | Drain-biassed transresistance device for continuous time filters |
-
1992
- 1992-01-21 EP EP92904783A patent/EP0659310B1/en not_active Expired - Lifetime
- 1992-01-21 DE DE69226656T patent/DE69226656T2/en not_active Expired - Fee Related
- 1992-01-21 SG SG1996005384A patent/SG47923A1/en unknown
- 1992-01-21 KR KR1019930702088A patent/KR0134113B1/en not_active IP Right Cessation
- 1992-01-21 JP JP50538492A patent/JP3168425B2/en not_active Expired - Fee Related
- 1992-01-21 WO PCT/US1992/000467 patent/WO1992013387A1/en active IP Right Grant
- 1992-01-21 CA CA002100568A patent/CA2100568C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CA2100568A1 (en) | 1992-07-23 |
| KR930703733A (en) | 1993-11-30 |
| DE69226656T2 (en) | 1999-04-15 |
| EP0659310A4 (en) | 1994-12-01 |
| JPH06507279A (en) | 1994-08-11 |
| EP0659310B1 (en) | 1998-08-12 |
| WO1992013387A1 (en) | 1992-08-06 |
| DE69226656D1 (en) | 1998-09-17 |
| KR0134113B1 (en) | 1998-04-29 |
| JP3168425B2 (en) | 2001-05-21 |
| SG47923A1 (en) | 1998-04-17 |
| EP0659310A1 (en) | 1995-06-28 |
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| Date | Code | Title | Description |
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| EEER | Examination request | ||
| MKLA | Lapsed |