CA2074809A1 - Passivated silicon substrate - Google Patents

Passivated silicon substrate

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Publication number
CA2074809A1
CA2074809A1 CA002074809A CA2074809A CA2074809A1 CA 2074809 A1 CA2074809 A1 CA 2074809A1 CA 002074809 A CA002074809 A CA 002074809A CA 2074809 A CA2074809 A CA 2074809A CA 2074809 A1 CA2074809 A1 CA 2074809A1
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CA
Canada
Prior art keywords
silicon
layer
silicon dioxide
hydrazine
dioxide layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002074809A
Other languages
French (fr)
Inventor
Marc J. Madou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commtech International
Original Assignee
Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2074809A1 publication Critical patent/CA2074809A1/en
Abandoned legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

A passivated silicon substrate structure (10) is set forth. A
silicon substrate has a surface region (14) covered by a silicon dioxide layer (18) no more than about 1,000 Angstroms thick. A
silicon oxynitride layer (20) of no more than about 300 Angstroms thick covers the silicon dioxide layer. The silicon oxynitride layer is produced by reaction of ammonia, hydrazine or methyl amine with an initially thicker silicon dioxide layer. A silicon nitride layer (22) covers the silicon oxynitride layer. The silicon nitride layer is at least about 250 Angstroms thick. It is produced by chemical vapor deposition. A passivation layer as set forth above provides electric insulation and is highly resistant to moisture attack.

Description

~ W~91/11827 2 ~7 ~ b9`;i' i :, :
Descri~tion `

PPSSIVATED_~LICON SUBSTR~E
.

`' ' ~.
Technical Field ~Ae present invention relates to a silicon ~' chip which has been passivated in 2 manner which renders it highly resistive to degradation in the :~. presence of high humidity and/or liouid water. The . process is useful in pre~aring silicon chips,~for - -.. . . .
~- ~ semiconductor processing applications and for producing microelectrochemical cells on or below the .. . .. .. . . . .. ..
' surface of silicon chips. ,,",;

~, Back~round Of ~he I~v~nSi~n ;, .J
~ It;is customary in the isi?icon wafer, - . .
`,~ ' '` '~processLng ,art to provide an inisulatlon layer for an ~' 20 ' ''underlying sillcon wafer. Such insulation layers can .;
`-' ~ 'c'omprise silicon dio~d2, isilicon nitride or silicon '~ ~ ''oxynitride. Generally one or the other of these ~''''' layers iis used although there are~instances,;set ,' forth, for'example, ~ .S. Patent 4;062;040,,issued ;~

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~,.....
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. , - ~: .

WO~1/11827 2 ~ 7 ~ P~T/US91/0~39~ ' ....

December 6, 1977 to S.A. Abbas and R.C. Dockerty, wherein o~e of the e dielectric layers (in the specific instance mentioned a silicon nitride layer) is deposited over another of th~se layers (in the instanoe mentioned a silicon dioxide layer).
If the silicon dioxide layer is produced, as is conventionally done, by reaction of the silicon chip with dry oxygen at a temperature of, for example, 800#C, and that the silicon nitride layer is made conventionally, for example by reaction OI ammonia and silane or of ammonia and tetrachlorosilane,~the thicknesses of each layer can be contro~led as is needed for the particular device being for~ulated.
It is also kn~wn to provide z silicon oxynitride layer, for example by annealing silicon nitride in an oxygen atmosphere, or by annealing silicon dioxide in an ammonia atmosphere, both at elevated temperature. What results is a thin layer of silicon oxynitride in the first instance below a silicon dioxid~ layer and in the secona instanc~ above a silicon dioxide layer. Such layers of silicon oxynitride'are invariably very thin due to th~ method of their formation.' Accordingly, their use is limited to those cases wherein one desires to have a very thin dielectric layer.
Silicon nitride layers made as discussed ''~ above are generally relatively permeable to vaporous ' water''a'nd liquid water (generally due to the existence 'of'small holes) which can pass through such 12yers and damage thé circuitry lying benéath them. The silicon `~-aioxide'12yers themsélves are rélatively permeable to ; wàter tagain genérally due to the existence of small holes) which can pass through such layers thereby ' I~ damaging'the devicé of which théy form a part. Thus, , , .

' :: ' .' ' ' .: ' . :, , , . . .

'-?, WQ 91/11827 ~Z~ ~1$~ ~ PCT/US91/00392 ~; .. .. .

. there is a ~ery real and aerious probleZ~ which the prior art has not solved which relates to protecting or passivating a silicon substrate in such a manner that resulting device c~n be utilized in a highly S humid or even liquid environment for long periods of time without appreciable damage.
Th'e present invention is directed to overcoming one or more of the problems as fiet forth above.
- Disclosure Of Invention A passivated silicon substrate is set forth in accordance with an embodiment of the invention.
The passivated su~strate comprises a silicon substrate ., having a surface region on which a passivation coating is required. A silicon dioxide layer covers the surface region, the silicon dioxide layer being no more than about 1,000 AngZstroms thick. A silicon oxynitride layer covers the silicon dioxide layer, the silicon oxynitride layer being-no more than about 300 Angstroms thick and having been produced by reaction OL ammonia, hydrazine or methyl amine with an ~: .,initially thicker silicon.,:dioxide layer.; A silicon nitride layer covers the silicon oxynitride layer. ''' :~ . 25 The silicon nitride layer is at least'about 250 `., Angstro~s thick and is produced by chemical vapor deposi~ion. ,~
~ . . , In accordance.with:another embodiment of .`~, , .,.j.,,the present,invention a method is set--forth of ~``30 - -Z . paZssivating:,,a:silicon substrate.;:;~hé method comprises .providing a silison dioxide layer of a desirèd`initial :~'-.thickness on the surface-of-the substrate whereat a -- , `-- .~.. passiva,tion covering is~desired ~ 'The silicon dioxide ~i layer is reacted.. with.ammonia,:hydrazine 'or methyl 35 amine.to form a silicon oxynitride layer over the "~

-, , : . ................ ..........: i ... . . . .......... . .

' ", ' ': ' ;
2 ~ 7 ~ 2 0 ~ PCT/U591/0~39~

. silicon dioxide layer. The silicon dioxide layer, a~ter the reacting, is from about 10 to about 1,000 Angstroms in thickness. The resulting ~iliaon oxynitride layer is from about 10 to about 300 Angstroms in thickness. A silicon nitride layer at least about 250 Angstroms i~ thickness is chemically vapor depos'ited over the silicon oxynitride layer.
A passivated silicon substrate in accordance with the present invention has a unique advantage of being substantially moisture impermeable because of the p-esence of the intermediate silicon oxynitride layer. Thus, such silicon substrates can be utilized in highly moist environments for long periods of time without deterioration due to the moisture. At the same ~ime, the thicknes.s of the silicon dioxide layer and tne thickness of the silico~ nitride layer can be controlled as desired by the device fabricator so as to be appropriate ~or whatever device is being fabricated. Such a passivation technique is ' 20 particularly useful in those situations wherein a ,~ silicon substrate is to be directly exposed to water i contzininy solutions (liquids). Such can be the case i ~, if~the device is a,microelectrochemical cell-:which ',. lies.upon, or in a well leading into the surface of, a ,~ 25 silicon wafer or chip., - -, .~. Brief Description Of ~he ~rawinas ,. ;. . - ,~The,present-invention will be better understoo,d by reference to the figures of'the drawings ~; ,, ,-wherein.like.~nu,~bers denote like parts` throughout and ,,. ,,,wh,erein~
; ; .; j,,";.,, - Figure 1~,illustr2tes, in`'cross-se'ctional ylew, a:silicon substrate passivated'in-accordance ~, ,,,wlth the present invention;,and. -'-~
.",~.. -,.-. ~-,.,.i ~ J r '''', .. . . . .

'"
"
'' ,: .,.' ~ . : ~' 207~
~.~ W~9l/11827 PST/U~91/oO392 :,., ,;

Fi~ure 2 illu~trates, in cros~-sectional view, a microchemical sencor passivated in accordance with a~ e~bodiment of the pxe~ent inv~ntion.

~çs~ Mode For ~arrYing ~ut InYçntion~
' Adverting to Figure,1 there-i~ illustrated a passivated silicon substrate structure 10 in accordance with an embodiment of the present invention. The passivated silicon substrate structure 10 includes a.silicon substrate 12 having a surface region-14 on which a passivation coating 16 is required.
. . A silicon dioxide layer,18 covers the surface region 14. The silico~ dioxide lay~r 18 is generally no more than about 1,000 Angstroms thick, and is . preferably in the rang~ fro,m about 50 Angstroms thick -~ to 2bout 300 Angstroms thick.
A silicon oxy~itride layer 20 covers the ~' . silicon dioxide layer 18. The silicon oxynitride layer is generally at.least about lU Angstroms thick -~
and is no more than about 300 Angstroms thick. It is ;~ produced by reaction o ammonia, hydrazine or methyl amine, preferably ammo~ia, with.an initizlly,thicker ;.~ silicon,dioxide layer i8.. .~. The reaction with the ~: , , . , , .,, , ....... , ~ .
.` 25 ammonia.is carried out.by flowing very pure,ammonia , j - ,.. . .. . . . -. over the silicon dioxice layer 18 at a temperature .~.' which.falls within a range from about.l,OOO#C.to about ..... . . ..... .. .
1,400#C.. Suitably, .the.temperature can~be.about '', , -,,1,350~C. The ammonia ls,,,general-ly flowed~'over the .. ~ 30 wafer at about atmospheric,.pressure but pressure and '~ flow rat~ are not critical. Other reactive chemicals `,' which might-inter~ere ~ith the,reaction must be excluded during the reaction-with ammonia. However, ~' chemically inert gases such as nitrogen, argon, helium : . ,, ' ' : : . ' , .
-: , . ., . ~ ~ , , . . ... ..
:' '" ": , ' ~ ' . :. ' ' ,: ' : ' ' , , , ' - : ' :

2074:g~
WO91/11~7 ' PCT/US91/0039 and the like can be pre~ent. Hydrazine or ~ethyl a~ine ~ay ~ubstitute for the am~onia. Mixture8 of two or Jnore such comp~unds ~an also be used.
A silicon nltride layer 22'co~ers the silicon oxy~itride layer 20~ the ~ilicon,,nltrid2 layer 22 being at least about 250 Angstroms, preferably at leact about 500 Angstroms thick and having been produced by chemical vapor deposition. Such chemical :- vapor deposition can be carried out in any of the ways known in the art. .For example, silicon nitride deposition ~ay be affected at temperatures which fall within the range from about 600#C to about 1,100#C in accordance with reactions such as the following:

,, 3SiH4 ~ 4N~3 & Si3N4 + 12H2 3SiC1~ r 4NH3 & - Si3N4 + 12HCl .
Hydrazine or methyl amine can substitute for the ., a~monia. Mixtures of all or any two such chemicals . can also be utilized. However, ammonia is the ~:: p-eferred chemical for this purpose. ' :~,.. ~ .. .. -: -- The silicon dioxide layer 18 can be made by convèntional 'procédures, for example by reactlng dry ~ oxygen with underlying-'siiicon substrat~ 12, for '~ 25 ... ~.- example at a'temperature whi~h-~alls within a'range .. -- from'about 600#C to about 1,'OOO#C. Alternatively, silicon dioxide can be deposited''from silane or .^~silicon tetrachlor'i'de in-accordanc~'with the following reactions.at temperatures which-:fall within a range ~ from,about 800#C-to'about l,lOO#C~

-; -SiH4: t '~H2''`~ ~2C2' ' & ' Si2 , 3H2CO
SiC14 + -2H2 ' 2C2 & SiO2 + iHCl + 2CO

. ,' , ~',:' ,. , , ' .: .' ',,, ' '. : ' , WO 91111827 2 0 7 ~ ~/USgl/00392 . ,!

Alternatively, silicon dioxide cazl be deposi~ed from silans oxidation at a teDIperature in the range from about 300~C to about 500#C acaording to the equation:

Si~4 ~ 2 & SlO2 ~ 2H2 Figure 2 illustrates an embodiment wherein the technique has been utilized to passivate the surface of an electrochemical cell having a well 24 which includes an electrode 26 and is filled with a water containing electrolytic ~edium 28. For example, the electrolytic medium can be a liquid solution, a gel, or a solid polymer electrolyte which includes a significant portion of water. A conductor 30 fills 2 passivated passage 32 and comes from a backside 3a of the silicon substrate 12 to th~ electrode 26. The passivation also serves to insulate the conductor 30 from the substrate 12.

Industxial ApplicabilitY
The present in~ention provides a passivated silicon substrate 10 useful in the semiconductor industry, particularly for the making of integrated circuits, transistors and the like. It is also useful for the manufacture of microelectrochemical cells and half cells.
While the invention hzs been described in connection with specific émbodiments thereof, it will be under tood that it is capable of further modification, and this applica~ion is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within Xnown or customary practice in the art to which the invention pertains .:
, . .,, ~ , .

- , . .

.

wo 9~ 827 2 ~ 7 ~ P~T/US~ fl39~ ~

and as may be applied to the essential ~eatures hereinbefore ~et forth, and a~ fall within the scope of the invention and the limits of the appended c laims .

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', ' ' , ' ' " ' " ' ' . ' ' ' ' ' ':

Claims (8)

Claims That Which Is Claimed Is:
1. A passivated silicon substrate, comprising:
a silicon substrate having a surface region on which a passivation coating is required;
a silicon dioxide layer covering said surface region, said silicon dioxide layer being no more than about 1,000 Angstroms thick;
a silicon oxynitride layer covering said silicon dioxide layer, said silicon oxynitride layer being no more than about 300 Angstroms thick and having being produced by reaction of NH3, hydrazine or methyl amine with an initially thicker silicon dioxide layer; and a silicon nitride layer covering said silicon oxynitride layer, said silicon nitride layer being at least about 250 Angstroms thick and having been produced by chemical vapor deposition.
2. A passivated substrate as set forth in claim 1, wherein said chemical vapor deposition is carried out by contacting ammonia, hydrazine or methyl amine and SiH4 or SiC14 with said silicon oxynitride layer at a temperature which falls within a range from about 600#C to about 1,100#C.
3. A passivated substrate as set forth in claim 2, wherein said reaction with NH3, hydrazine or methyl amine is carried out by contacting said ammonia, hydrazine or methyl amine with an initially thicker silicon dioxide layer at a temperature which falls within a range from about 1,000# to about 1,400#.
4. A passivated substrate as set forth in claim 1, wherein said reaction with NH3, hydrazine or methyl amine is carried out by contacting said ammonia, hydrazine or methyl amine with an initially thicker silicon dioxide layer at a temperature which falls within a range from about 1,000# to about 1,400#.
5. A method of passivating a silicon substrate, comprising:
providing a silicon dioxide layer of a desired initial thickness on the surface of the substrate whereat a passivation covering is required;
reacting the silicon dioxide layer with NH3, hydrazine or methyl amineto form a silicon oxynitride layer over said silicon dioxide layer, the silicon dioxide layer after said reacting being from about 50 Angstroms to about 1,000 Angstroms in thickness and the resulting silicon oxynitride layer being from about 10 Angstroms to about 300 Angstroms in thickness;
chemically vapor depositing a silicon nitride layer at least about 250 Angstroms in thickness over said silicon oxynitride layer.
6. A method as set forth in claim 5, wherein said chemical vapor deposition is carried out by contacting ammonia, hydrazine or methyl amine and SiH4 or SiCl4 with said silicon oxynitride layer at a temperature which falls within a range from about 600#C to about 1,100#C.
7. A method as set forth in claim 6, wherein said reaction with NH3 is carried out by contacting said ammonia, hydrazine or methyl amine with an initially thicker silicon dioxide layer at a temperature which falls within a range from about 1,000# to about 1,400#.
8. A method as set forth in claim 5, wherein said reaction with NH3 is carried out by contacting said ammonia, hydrazine or methyl amine with an initially thicker silicon dioxide layer at a temperature which falls within a range from about 1,000# to about 1,400#.
CA002074809A 1990-01-29 1991-01-22 Passivated silicon substrate Abandoned CA2074809A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US47142390A 1990-01-29 1990-01-29
US471,423 1990-01-29

Publications (1)

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5304840A (en) * 1992-07-24 1994-04-19 Trw Inc. Cryogenic radiation-hard dual-layer field oxide for field-effect transistors
US5278077A (en) * 1993-03-10 1994-01-11 Sharp Microelectronics Technology, Inc. Pin-hole patch method for implanted dielectric layer
JP2836585B2 (en) * 1996-06-14 1998-12-14 日本電気株式会社 Method for manufacturing semiconductor device
AU5616899A (en) * 1998-07-17 2000-02-07 Infineon Technologies, Ag Passivation layer for power semiconductors with pn junctions appearing on the surface

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4051273A (en) * 1975-11-26 1977-09-27 Ibm Corporation Field effect transistor structure and method of making same
DE2967538D1 (en) * 1978-06-14 1985-12-05 Fujitsu Ltd Process for producing a semiconductor device having an insulating layer of silicon dioxide covered by a film of silicon oxynitride
JPS5691453A (en) * 1979-12-26 1981-07-24 Hitachi Ltd Manufacturing of semiconductor device
JPS6195515A (en) * 1984-10-16 1986-05-14 Nec Corp Forming of semiconductor active layer
US4901133A (en) * 1986-04-02 1990-02-13 Texas Instruments Incorporated Multilayer semi-insulating film for hermetic wafer passivation and method for making same
US4972250A (en) * 1987-03-02 1990-11-20 Microwave Technology, Inc. Protective coating useful as passivation layer for semiconductor devices

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Publication number Publication date
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