CA2064214A1 - Plated-through printed circuit board with resist and process for producing it - Google Patents

Plated-through printed circuit board with resist and process for producing it

Info

Publication number
CA2064214A1
CA2064214A1 CA 2064214 CA2064214A CA2064214A1 CA 2064214 A1 CA2064214 A1 CA 2064214A1 CA 2064214 CA2064214 CA 2064214 CA 2064214 A CA2064214 A CA 2064214A CA 2064214 A1 CA2064214 A1 CA 2064214A1
Authority
CA
Canada
Prior art keywords
layer
solution
printed circuit
process according
electroconductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA 2064214
Other languages
French (fr)
Inventor
Walter Kronenberg
Jurgen Hupe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BLASBERG-OBERFLACHENTECHNIK GmbH
Original Assignee
Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2064214A1 publication Critical patent/CA2064214A1/en
Abandoned legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/84Processes or apparatus specially adapted for manufacturing record carriers
    • G11B5/8404Processes or apparatus specially adapted for manufacturing record carriers manufacturing base layers

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Chemically Coating (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)

Abstract

In a process for producing plated-through single- or multi-layered printed circuit boards comprising a polymer base or ceramic which is coated, possibly on both sides, with at least one photoresist layer which temporarily exposes the electrically conductive circuit pattern, a metallic layer is deposited electrolytically or non-electrolytically on the surfaces of the base, including those which are not coated with a conducive metallic layer. The process is characterized in that (a) the surface of the base is drilled, subjected to a mechanical surface treatment, laminated with a suitable photoresist, illuminated and developed, in order to expose the circuit pattern, (b) the surfaces of the base are pretreated in an oxidizing solution, (c) the solvent residues are rinsed off the base, which is then placed in a solution containing a heterocyclic monomer, in particular pyrrol, thiophene, furan or their derivatives, which in polymer form is electrically conductive, (d) the base is then placed in an acidic solution in which an electrically conductive polymer layer is formed, the solvent residues are rinsed off, and the drilled holes and circuit pattern are metallized preferably electrolytically or non-electrolytically.

Description

206`~21~
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AND PROCESS FOR MANUFACT~KING SAME

The present invention relates to a process for manufacturing through-hole plated single-layer or multi-layer printed circuit boards based on a polymeric substrate material or on ceramics provided optionally on both sides with at least one photoresist layer temporar-ily exposing the electroconductive circuit pattern by galvanic or electroplating or electroless plating with a metal layer also on those surfaces which have not been coated with a conductive metal layer; the inYention further relates to the printed circuit boards them-selves.
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Through-hole plated printed circuit boards so far have been essentially produced by chemical metal deposition on catalytically activated surfaces of a substrate material. Multi-layer printed circuit boards are also prepared in this manner. The metal layers having been deposited without external current (electro-less) ~re then further reinforced, if desired, by metal-electroplating (galvanic metal deposition). This technology enables high-quality printed circuit boards to be manufactured. The catalytic activation o~ the surface i9 generally effected by means of ionic or non-ionic noble metal-contàining catalysts which, morè
speci~ically are based on palladium and tin. However, .
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20~2~4.,, systems containing no noble metals, for example based on copper, may also be used. In some cases, there has also been known the use o~ catalytically active layer3 which have been applied by a physical method, for example by vapor deposition.

The methods have been described in the pretinent literature, for example in ~ermann, ~andbuch der Leiter-plattentechnik, Eugen G. Leuze Verlag, Saulgau. The wet-chemical catalysis employed in practice with the use of systems containing noble metals or containing no noble metals generally proceeds by the following route:

1. Cleaning/conditioning 2. Rinsing 3. Activatin~/initial etching 4. Rinsing 5. Pre-immersion solution 6. Application of the catalyst 7. Rinsing 8. Addition of an accelerator/reductor 9. Anew rinsing 10. Electroless metallization 11. Rinsing -~
12. Drying.

The quality of nucleation ~catalysis) and, hence, the guality of the final product, is very much depende~t on the methods o~ pre-treatment which precede catalysis.
This is particularly applicable to the conditioning 6tep wherein, on the one hand, the 6urfaces are cleaned ;~ while, on the other hand, the bore hole walls are ! prepared for the subsequent catalysis. The preparation l is effected by means o~ particular surfactants whiFh .1 . ~ .
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l 206~214 _ 3 _ occupy the entire sur~ace and have the marked property of adsorbing the catalyst nuclei. The actual catalyst appl~cation is followed by a treatment which i9 appro-priate to the system and either removes inter~ering by-products from the catalyst treatment or converts the nuclei applied in the catalyst into their catalytically active form. Then the step Or electroless metallization is carried out. In general, copper is deposited. Minor deviations from the pre-6cribed process parameters in one of the process steps will usually lead to a defect-ive metallization so that in many case~ the final product is unusable.
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Accordingly, one essential drawback inherent to these catalyst systems is the dependence of the nucleat-ion density on the pre-treatment, the particle size and the after-treatment step. The higher the nucleation density, the better is the initial deposition rate or the density of the beginning electroless copper-plating, which is equivalent to a high quality through-hole plating. However, defective spots called "voids" in technical ~argon, will tend very easily to occur, which voids will greatly reduce the quality of through-hole plating or even render the printed circuit boards unusable. But even under the optimum conditions a surface having been completely occupied with nuclei cannot be obtained. Moreover, the existing catalyst systems are susceptible to inadvertently imported alien ions. Thereby, the reproducibility of their mode of operation as well as the stability thereo~ are strongly deterlorated. Another disadvantage of the noble metal-containing catalyst systems is the high price o~ the metals used.
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The technology o~ prior art employlng an electro-less metallization, followed by optional rein~orcing by way of galvanic metal deposition, although it is being widely used, has some disadvantages which 80 ~ar had to be put with due to the lack of feasible alterna-tives. Above all, the purely chemical metal deposition from reductively-working electrolytes is very expensive and requires an accurate technique of analysis and precise control of the electrolyte. Said electrolytes also contain the by far most expensive chemicals. Never-theless, layers having been thus deposited are of a physically and mechanically poorer quality than metal layers obtained by electroplating. Another disadvantage of the technology employed so far resides in the uncer-tainty in the stabilization o~ the syste~s and, hence, also the uncertainty of whether the deposition rate and layer thickness in the bore hole walls are sufficiently reproducible. The electrolytes, due to their low stabi-lity, tend to undergo auto-decomposition. Moreover, said electrolytes, as a rule, contain formaldehyde as reducing agent which under aspects of industrial safety i8 to be avoided. Noreover, the reductively working ~-electrolytes contain larger amounts of complex-forming agents which are poorly biodegradable and, therefore, constitute a considerable pollution of the waste water.

It has been attempted for long to evade a chemical metallization and instead to employ a direct galvanic metal deposition. Such a process has been described, for example, in the U.S. Patent Specification No.
3,099,608 and in the German Published Unexamined Patent Application (DE-OS) 33 04 004- However, the processes descr1b~d thercin hav- not b--n put into any practical ,. . , . .. ~ , . .. .. .. ..
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20~2~4 USQ. Fairly utilizablQ results can be attained only with freshly prepared galvanically working electrolyte~.
Already shortly after the begin of the operation the quality of the obtained metal deposit decreases to such an extent that from then only unusable results will be attained. Moreover, rather long periods o~ time are required for the metal deposition. Upon use of the process described in U.S. Patent Specification No.
3,099,608 at least 20 minutes are required for the metal deposition. Furthermore, defective spots (voids) will very rapidly occur to an increasing degree in the metal-lization. Thereby, metal layers are formed on the hole walls which do insufficiently adhere.

In Applicant's German Published Unexamined Patent Application (DE-OS) 38 06 884 which has not been previously published there has been proposed a process for manufacturing through-hole plated printed circuit boards, said process allowing a safe, strongly adhering and continuous activation to be effected of the employed substrate material, reducing the number of process steps, thereby fa~t and inexpensively leading to pro-ducts which are excellent in quality. The process further ensures high certainty with respect to a repro-ducible mode of operation. The subseguent metallization is feasible not only by the electroless route as con-ventional, but also via a direct galvanic process. This process may be characterized by following general pro-cedures:
1. Oxidative pre-treatment;
2. Rinsing;
3. Catalysis;
4. Activation;
5. Rinsing;
6. Prerorab1y galvanic or eloctroless z-tallization.

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According to said process, the circult board pro vided with drilled through-holes is plated-through by an electroless or, preferably, galvanic, metal deposition.
The through-hole plated printed circuit boards then can be overlaid with a screen or photo print such as to produce a circuit pattern image upon exposure and development. Then, the circuit pattern is established in Pattern Plating by the galvanic deposition of metal-lic layers.

~ owever, this process has the drawback of that, in the first step of electroplating for through-hole plating the bore walls, the photographic process must be first carried out for establishing the circuit pattern image, which only then is followed by a further electro-plating step in which the c~rcuit pattern image is galvanically or electroless copper-plated.

Therefore, it is the object of the invention to provide a simplified process for manufacturing through-hole plated single-layer or multi-layer printed circuit boards in Pattern Plating, which process allows the two electroplating steps to be comb~ned to one step of electroplating, whereby the process is faciliated and rendered less expensive.

The object of the invention has been attained by a process which is characterized in that a) the surfaces of the substrate, after hole-drilling and a subsequent mechanical surface-treatment, are laminated with a suitable photoresist, exposed to light and developed 60 that the circuit pattern image is exposed, b) the surfaces of the substrate are pre~treated in a 601ution having oxidizing activity, ;. i, .. . .. .. . .. .... . ...
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c) after removal of the residual solution by rin8ing~
the substrate is introduced into a solution which contains at least one heterocyclic monomer, and more speci~ically pyrrole, thiophene, furane or derivative(s) thereof, wh~ch in a polymeric form is electrically conductive, d) the substrate is then transferred into an acidic solution whereby an electrically conductive poly-meric layer is formed, whereupon, if desired or required, any residual solution is removed by rinsing ~ and the through-holes and the circuit pattern image are metallized in one step by galvanic or, preferably, electroless metallization.
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In a further embodiment, the sequence of steps a) and b) is reversed, with ~tep a) being preceded by a step of rinsing and dry~ng and a mechanical surfaca clean~ng operation.

Furthermore, it is particularly advantageous that the step b) is preceded by process steps wherein the bored printed cirauit board is subjected to a process of initial etching and a surface pre-treatment of the circuit boards. Initia} etching is effected by an acidic solution having oxidative activity. The treat-ment of the bore hole walls which are not conductive is e~ected by using organia, preferably nitrogen-contain-ing 601vents or aqueous alkaline solutions thereof, which may optionally contain wetting agents.

The 601ution employed for the process step b) con-tains salts of permanganate, manganate, periodate and/or of a cerium(IV) compound. The oxidative pre-treatment a~ described in greater detail hereinbelow may be , ' .,, ., .
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carried out in a pH range of ~rom < 1 to 14 and at a temperature of from 20 C to ~5 C. The addition of ionic or non-ionic sur~actants in an amount of from 0.1 to 10 g/l improves the quality of the oxidative pre-treatment, is, however, not essential. The oxidative agents are present in a concentration ranging from 0.1 g/l to their solubility limits. The duration of pre-treatment may be between 0.2 and 20 minutes.

The solution employed for step c) preferably contains from 1 to 50% of pyrrole and further the complementary amount of solvents or solubility promoters and optionally also alkalizing additives. Of course, mixtures of solvents or solubility promoters may also be used. Usable as solvents or solubility promoters, respectively, are, e.g., water, methanol, ethanol, n-propanol, isopropanol, higher alcohols, polyalcohols, DMF (dimethyl formamide), ketones, more particularly methylethylketone, cumene sulfonate, N-methyl pyrrol-idone, Triglyme, Diglyme, alkali me'al salts of toluene sulfonates or their ethyl esters and aqueous alkaline solutions or mixtures thereof.

Subsequently to process step c), the articles to be metallized, such as printed circuit boards, are subject-ed to activation in the process step d). The activation may be carried out with o~idative substances such as, for example, alkali metal persulfates, alkali metal per-oxodisulfates, hydrogen peroxide, iron(III) salt~ such as ferric chloride, ferric 6ulfate, potassium hexacyano-ferrate(III), alkali metal periodates or 6imilar com-pounds in an acidic medium. There is also the possibi-lity to allow the activation to take place ~ust in an acidic medium, for which hydrochloric acid, sulfuric ~i ' .: :

' - i 9 ~ 20~ ~214 acid, phosphoric acid etc. may be used as acids. The actlvation may be erfQcted ln an acidic oxidizing medium as well as in an acldlc medlum wlth optlonal permanent air purglng.

Further galvanic processlng following the process steps a), b) and c) of the artlcles to bs metallized such as, e.g., printed circuit boards, i8 further illustrated ln the following sectlons.

In a preferred embodiment of the process according to the invention~ metals such as copper, nickel, gold, pailadium, tln, lead, tln/lead are used for the preparatlon of the metal layer.
; ' By means of the process according to the invention, , there is obtained a through-hole plated single-layer or multi-layer prlnted circuit board based on a polymeric substrate material or on ceramics provided optionally on both sides with at least one photoresist layer temporar-¦ ily exposing the electroconductive circuit pattern.
r This through-hole plated printed circuit board is ~i;- ~ characterized in that between the metal layer on the -; inner surface of the through-plated bore holes and the substrate material or the ceramics there is present a ¦ layer of polymerized electroconductive synthetic mate-~ rial. The layer composed of the electroconductive syn-: thetic material, more specifically, consists of poly-merized or copolymerized pyrrole. The layer of the synthetic polymer is preferred to have a thickness of from 0.1 to 10 ~m.
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As an intermediate product, there i5 formed a per-forated single-layer or multi-layer board based on a polymeric substrate material or on ceramics provided ., '' ...
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206~214 optionally on both sides with at least one photoresist layer exposing the electroconductive printed circuit image, while on the area contiguous to the bore hole a layer o~ a polymerized electroconductive synthetic material is located which preferably consists of polymerized pyrrole or pyrrole derivatives.

The substrate materials to be used include, more particularly, a glass fiber-reinforced epoxide resin, a polyimide and other solid polymers. Basically, any material is suitable which are capable of being coated with a metal layer when treated by the process steps according to the invention. The through-hole plated printed circuit boards are preparable by the process according to the invention basically on three different routes.

First, the metal may be deposited by aid of poly-merized electroconductive heterocyclic compounds such as pyrrole, thiophene and furan with concomitant use of electroless reductive electrolytes.

i A printed circuit board made of a substrate material such as glass fiber-reinforced epoxida resin ¦ which has been pre-treated by the pre-treatment method I according to the invention - which method will be de-scribed hereinbelow - i5 placed in a reductive electrolyte so that a metal, preferably copper, is ¦ chemically deposited.

¦ A different method of metal deposition employs polymeric electroconductive compounds, and more particularly pyrrole, thiophene and furan in the absence of electroless-working reductive electrolytes. Copper .

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-~~ 206~121 r ~ 11 is preferred to be deposited by this method. A printed circuit board made o~ a substrate material such as glass fiber-reinforced epoxide resin which has been pre-treated by the pre-treatment method according to the invention - which method will be described hereinbelow -is placed in a galvanic copper electrolyte 80 that a copper deposition is effected on the pre-treated copper backing of the printed circuit board as well as on the pre-treated bore hole walls.

The present invention combines the two electro-plating steps of prior art in that the substrate materials, having been provided already with a developed photoresist, are first subjected to catalysis and activation and then subjected to copper-plating, prefer-ably by the galvanic method, but otherwise by the electroless method, of the bore hole walls and of the circuit pattern image exposed by the photoresist.

Hereinbelow, the process steps of the process according to the invention will be explained in greater detail.
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; The process according to the invention may be characterized by the following general working steps:

a) Laminating circuit boards with photoresist, exposure, developing ¦ b) Oxidative pre-treatment c) Rinsing ! d) Catalysis f"~ e) Activating f) Rinsing g) Pickling ~ h) Galvanic or chemical copper plating.

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In a preferred embodiment o~ the process according to the invention, prior to the step b) comprising the oxidative pre-treatment there may be earried out a procedure for initially etching, a rinsing operation, a eleaning step and a cleaning and surfaee treatment of the bore holes, followed by a further rinsing step.

In a further embodiment, the sequence of steps a) and b) may be reversed, with step a) being preceded by a step of rinsing and drying and a mechanical surfae~
cleaning operation.

The copper-laminated bored-through circuit boards are first laminated with a suitable photoresist, expssed to light and developed so that, after the process step a), the circuit pattern image has been exposed. The initial etching of the printed circuit board is carried out in a commercially available acidic solution provided with oxidants, 60 that all accessible copper areas are 1 provided with a uniform finely textured surface. ;~

~ After the treatment, the surface should be free . from oxidie regions, from finger prints and from other , contamination~ and should exhibit a uniform bright color.
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:. The process step of cleaning and surface pre-treat-:.i .ment of the non-conductive areas of the printed circuit l board (bore hole ~alls) which, in addition to its clean-ing effect, also causes the non-conductive areas of the . printed circuit board to become activated and condition-ed, is earried ou* by means of an organic solvent, . preferably a nitrogen-eontaining solvent, or with an :~ agueous alkaline solution of the respeetive solvenes, .
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which optionally contain wetting agents. Thi~ process step does not only provide the activating and condition-ing effects, but in the case of multi-layer circuits also causes any contaminants, if present, of the copper i inlays on the bore hole walls to be prepared for the subsequent removel of the contaminants. The duration of treatment should generally be between 0.2 and 20 minutes and be carried out at temperatures of from 20 C to 80 C. The preceding steps provide an optimum pre-treatment of the printed circuit boards for the sub-; sequent process.

In order to prepare the printed circuit boards for a galvanic or chemical ~etallization, said printed circuit boards must be sub~ected to an oxidative pre-treatment, b). The oxidative pre-treatment may be carried out in a pH range of from < 1 to 14 and at a temperature of from 20 C to 95 C. The addition of ionic or non-ionic surfactants in an amount of from 0.1 to 10 g/l improves the quality of the oxidative pre-treatment, is, however, not essential. The oxidative l agents are present in a concentratlon ranging from 0.1 g/l to their solubility limit~. The duration of pre-treatment may be between 0.2 and 20 minutes. As the oxidants there may be used, fox example, cerium(IV) sulfate, alkali metal manganates, alkali metal per-manganates and alXali metal periodates. Potassium permanganate ~s preferred to be used.

As the oxidative medium for pre-treating the articles to be metallized under alkaline conditions ;~ ther~ i8 prepared an agueous solution containing 50 g/l of potassium permanganate and 50 g/l o~ sodium hydroxide. It i8 advantageous to add about 0.1 g/l of a .~
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non-ionic fluoro-surfactant to the solution. The print-ed circuit boards are pre~erably left in the tempered solution with slight motion for up to 10 minutes. After the pre-treatment the printed circuit boards are rinsed with water.

As the oxidativ~ medium for pre-treating the articles to be metallized under neutral conditions there i8 prepared an aqueous solution containing 12 g/l of potassium permanganate and 0.1 g/l of a non-ionic fluoro-surfactant, pH-regulating substances (sodium hydroxide, sulfuric acid etc.) being used for adjusting the pH of the solution to about 7. The printed circuit boards to be treated are preferably left in the solution tempered at about 65 C with slight motion for 5 minu-tes. After the oxidative pre-treatment the printed circuit boards are rinsed with water.

As the oxidizing medium for pre-treating the articles to be metallized under acidic conditions there is prepared an aqueous solution containing 10 g/l of potassium permanganate, 0.1 g/l of a non-ionic wettin~
agent and sulfuric acid so that the solution ha~ a pH
value of about 2. The printed circuit boards to be treated are preferably left in the solution with slight motion for about 1 minute. The termperature of the solution is preferably 20 C to 30 C. After the oxidative pre-treatment the printed circuit boards are rinsed with water.
-As the oxidizing ~edium, there is prepared an aqueous solution of 50 g/l of cerium(IV) sulfate, a non-ionic surfactant and sulfuric acid is prepared 80 that the pH value of th2 solution is < 1. The printed , .~

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:. , -``:` 20~4214 circuit boards to be treated are preferably le~t in the solution tempered at 20 C to 30 C with slight waving motions for about 5 minutes~ After the oxidative pre-treatment the printed circuit boards are rinsed with water.

As a further oxidizing medium, there i~ prepared an agueous solution o~ 50 g/l of sodium periodate, a non-ionic surfactant and sulfuric acid is prepared so that tha pH value of the ~olution i9 < 1. The printed circuit boards to be treated are preferably left in the tempered solution with slight waving motions for 5 minu-tes. After the oxidative pre-treatment the prlnted circuit boards are rinsed with water.
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For the catalysis process step c) there is employed a solution consisting of a heterocyclic compound, more specifically pyrrole, thiophene or furane, a water-miscible organio solvent such as methanol, ethanol, n-propanol, isopropanol, higher alcohols, polyalcohols, DMF (dimethyl ~ormamide), ketones, cumene sulfonate, N-methyl pyrrolidone, Triglyme, Diglyme, alkal~ matal salt of the toluene sulfonates or the ethyl esters, and aqueous alkal$ne solutions or mixtures thereof as solubility promoters/solubilizers for the heterocyclic compound and water. The substrates (printed circuit boards) to be metallized are placed in this solution.
Due to the high reactivity of the articles that have been oxidatively pre-treated, such as printed circuit boards, the concentration of the heterocyclic(s)-containing catalysis solution may be within a wide range ~o that solutions containing ~rom 0.1 to 50% of hetero-cyclics may be employed. However, it has been found that the optimum of catalyzing properties is exhibited . , .

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by solutions containing from 5 to 35% of hetero-cyclic~s). The residence time of the articles such as printed circuit boards in the catalyst solution may range from a few seconds to 20 minutes. ~he optimum ranga of residence times has been found to be between 0.2 and 5 minutes. During the treatment of the sub-strates such as printed circuit boards in the catalyst solutions, the substrates may be subjected to slight motion.

After the catalysis, th~ articles to be metallized, such as printed circuit boards, are subjected to an activation, d), as a preparation for the following metal deposition. The activation may be effected with oxid-izing sub tances such as, for example, alkali metal persulfates, alkali metal peroxodisulfates, hydrogen peroxide, iron(III) salts such as ferric chloride, ferric sulfate, potassium hexacyanoferrate(III), alkali metal periodates or similar compounds in an acidic medium. ~here is also the possibility to allow the activation to take place alone in an acidic medium, for which hydroch}oric acid, sulfuric acid, phosphoric acid etc. may be used as acids. The activation may also be effected in an ac~dic medium with permanent air purging.

For the activation in an acidic oxidizing medium of the articles to be metallized, the catalyzed substrate is kept in an aqueous solution containing 50 g/l of sodium peroxodisul~ate and 10 ml/l of sulfuric acid with slight waving motions for fro~ 0.2 to 5 ~inutes. A film of dark brown or black color is formed on the surface of the printed circuit board and on the bore hole walls.
After the activation, the activated substrate i8 rinsed w1th running water.

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Furthermore, the activation may be e~ected in an aqueous solution comprising 50 g/l o~ iron(III) eul~ate and 30 ml/l of sul~uric acid. A catalyzed substrate is preferably kept in this solution with slight waving motions within the periods of time mentioned above. A
dark-colored coating is formed on the entire surface.
After the activation, the activated substrate is rinsed with water.

The activation of the articles to be metallized is effected in an acidic medium consisting of 20% aqueous solution of sulfuric acid with slight waving motions and under permanent air purging within about 0.2 to 5 minutes. After the activation, the activated substra-te is rinsed with running water.

If a 5% aqueous hydrochloric acid solution is employed for activation, the substrate accordingly pre-treated is left in the solution with slight waving motions preferably ~or 0.2 to 10 minutes. Also aftsr the activation with 5% hydrochloric acid, the activated substrate is rinsed with water.

If an 8% aqueous phosphoric acid solution i~ used, the substrate ~o be activated is left in said ~olution with slight waving ~otions and under permanent air purging for 0.2 to 10 minutes. A~ter the activation, the activated substrate is rinsed with water.
., j The activation may also be carried out by keeping a -¦ substrate which has been pre-treated according to the ;~ invention is kept in an aqueous solution containing 60 g~l o~ sodium peroxodisul~ate and 40 ml/l o`f H2S04 with ~llght waving motions and under permanent air ., '`".,. ' -' . .
- 18 - 2Q~ ~2 ~ ~

purging for 0.2 to 10 minutQs. Also after this kind of actlvation, the activated substrate is rlnsed with water.

In a further preferred embodiment a catalyzed sub-strate ~s exposed to the action of an aqueous solution containing 100 ml/l of sulfuric acid and 25 ml/l of aqueous hydrogen peroxide solution (30%) with ælight waving motions under permanent air purging for about 3 minutes. Also here after the activation, the act-ivated substrate is rinsed with water.

; The amounts of grams and milliliters mentioned above are relative to a total of 1 liter of a~ueous solution.

Immediately after the activation, the articles such as printed circuit boards treated according to the above-described process may be subjected to an electro-less reductive metal deposition. It is preferred to galvanically deposit the metal immediately after the completion of the activation.
i For the electroless metallization there are employ-ed commercially available electrolytes, and preferably copper electrolytes such as, e.g., METALYT(R) ~U NV, under the conventional conditions as known to the artisan.

The electro-deposition of metals i8 also effected by using known galvanic electrolytes. Basically, all i metals or alloys may be deposited which are capable of being used or electro-plated. However, it is preferred to use copper electrolytes. Particularly preferred are ;l ~. .

. . . . . : . : . -: -- 19 - 2 0 S ~ 2 14 copper electrolyte solutions comprising sul~uric acid which have a content o~ ~rom 50 to 300 g/l of free sulfuric acid and a metal content of from 5 to 50 g/l.
However, electrolytes containing fluoroboric acid, hydrochloric acid, thiosulfate or pyrophosphate or cyanidic electrolytes as well as electrolytes based on sul~amines and organic sulfonic acids have proven to be suitable. The electrolytic deposition is effected under the conventional conditions, namely between 20 C and 70 C with current densities of hetween 0.1 to 20 A/dm2.
Surprisingly, the period required for the electro-deposition may be significantly shortened, if the galvanic copper deposition is carried out immediately after the activation according to the invention, so that in particularly favourable cases said period will amount to from 2 to 5 minutes. The metal layers obtained are un~form, continuous and, in addition, firmly adhering, which also do not show any defective spots in the so-called through-light test.
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The following examples show partial aspects of the invention:

EXAMPLE

- A 6ubstrate material made o~ a glass fiber-reinforced epoxide resin which has been copper-laminated on both of its ~urfaces is provided with bore holes and mechanically cleaned in the conventional manner. Then the substrate is treated in an aqueous solution contain-ing 50 g/l of potassium permanganate and 40 g/l of sodium hydroxide at 85 C for 1 minute, followed by rinsing, drying and slight brushing. Then a commsrcial-ly available photoresist is applied and exposed to light . i .
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and developed 80 that the circuit pattern image and the bores will be exposed for further metallization.

The substrate thus prepared is then immersed in an agueous catalyst solution containing 20% of pyrrole and 20% of isopropanol at room temperature with slight motion for about 1 minute. In the next treatment step, the printed circuit board is immersed in a solution con-taining 10 ml/l of sulfuric acid and 10 g/l of sodium peroxodisulfate in water. A conductive polymer film of dark brown to black color forms on the surface~ of the non-conductive areas. The treated board is then rinsed with running water, pickled with 5% aqueous sulfuric acid and electrolytically copper-plated in a commercial-ly available acidic copper bath. The temperature~ is 23 C, and the current density is 2.3 A/dm2. After about 60 minutes all of the conductor paths and bore holes were completely ~oated with a firmly adhering copper layer of about 28 ~m in thickness.

A substrate material made of a glass fiber-reinforced epoxide resin which has been copper-laminated on both of its surfaces is provided with bore holes and mechanically cleaned in the conventional manner. Then the substrate is provided with a co~; arcially available photoresist followed by direct exposure to light. After development, the conductor paths and bore holes to be metallized will be exposed for further metallization.

The substrate is then initially atched in an aqueous solution of hydrogen peroxide and sulfuric acid at about 30 C for 3 minutes, rinsed and introduced lnto ' ;

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the oxidative pre-treatment stage. The aqueous solution contains 12 g/l o~ potassium permanganate and 20 ml/l of concentrated sulfuric acid. The substrate board is left with slight motlon at room temperature for 2 minutes.
Then it is rinsed and immersed in an agueous solution of 10 g/l of citric acid. In the sub~equent step, an aqueous catalyst solution containing 10% of pyrrole, 28%
of diethyleneglycol and 0.1 ml/l of a fluoro-surfactant ~room temperature/l minute). Then, without rinsing, substrate board is immersed in a solution containing 50~
of sulfuric acid for 1 minute with air purging. The conductive polymer film is formed in the bore holes.
The treated board is then rinsed with running water and pickled with 5% sulfuric acid. ~he metallization i~
effected in a commerc~ally available acidic copper bath at 23 C and with a current density of 1.8 A/dm2. After about 20 minutes the circuit pattern image and bore holes were completely coated with a firmly adhering coppex layer of about 25 ~m in thickness.

.: .
Example 2 was repeated, however with the exceptions that the citric acid treatment was omitted and the catalyst solution comprised 4% of pyrrole and 1% of thiophene.

EXAMP~E 4 Example 2 was repeated, however with the exception that the permanganate oxidation step was replaced by a treatment in an aqueous golution containing 50 g/l of cerium(IV) sulfate and sulfuric acid at pH 1 and 25 C
for 4 minutes.

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,

Claims (18)

C L A I M S :
1. A process for manufacturing through-hole plated single-layer or multi-layer printed circuit boards based on a polymeric substrate material or on a ceramic material provided optionally on both sides with at least one photoresist layer temporarily exposing the electroconductive circuit pattern by electroplating or electroless plating with a metal layer also on those surfaces which have not been coated with a conductive metal layer, characterized in that a) the surfaces of the substrate, after hole-drilling and a subsequent mechanical surface-treatment, are laminated with a suitable photoresist, exposed to light and developed so that the circuit pattern image is exposed, b) the surfaces of the substrate are pre-treated in a solution having oxidizing activity, c) after removal of the residual solution by rinsing, the substrate is introduced into a solution which contains at least one heterocyclic monomer, and more specifically pyrrole, thiophene, furane or derivative(s) thereof, which in a polymeric form is electrically conductive, d) the substrate is then transferred into an acidic solution whereby an electrically conductive poly meric layer is formed, whereupon, if desired or required, any residual solution is removed by rinsing, and the through-holes and the circuit pattern image are metallized in one step by galvanic or, preferably, electroless metallization.
2. The process according to claim 1, characterized in that the step b) is preceded by process steps wherein the through-bored printed circuit boards are subjected to a process of initial etching and a surface preparat-ion of the non-conducting areas of the conductor plates.
3. The process according to any one of claims 1 or 2, characterized in that the sequence of steps a) and b) is reversed, with step a) being preceded by a step of rinsing and drying and a mechanical surface cleaning operation.
4. The process according to any one of claims 1 to 3, characterized in that the initial etching of the printed circuit board is effected by an acidic solution having oxidative activity.
5. The process according to any one of claims 1 to 4, characterized in that organic solvents or the aqueous alkaline solutions thereof which optionally contain wetting agents are employed for the surface preparation.
6. The process according to claim 5, characterized in that the organic solvents contain nitrogen.
7. The process for manufacturing through-hole plated single-layer or multi-layer printed circuit boards according to any one of claims 1 to 6, characterized in that the metal layer consists of one of the metals copper, nickel, gold, palladium, tin, lead, tin/lead.
8. The process according to any one of claims 1 to 7, characterized in that the solution of step b) contains oxidizing permanganate, manganate, periodate salts and/or cerium(IV) sulfate.
9. The process according to any one of claims 1 to 8, characterized in that the pH value of the oxidizing solution is between < 1 and 14.
10. The process according to any one of claims 1 to 9, characterized in that the oxidizing solution contains a surfactant.
11. A through-hole plated single-layer or multi-layer printed circuit board based on a polymeric substrate material or on a ceramic material provided optionally on both sides with at least one photoresist layer temporarily exposing the electroconductive circuit pattern, characterized in that between the metal layer of the area contiguous to the bore hole and the sub-strate material or ceramics a layer of electroconductive synthetic polymer is present.
12. The through-hole plated single-layer or multi-layer printed circuit board according to claim 11, character-ized in that the layer of the electroconductive syn-thetic polymer consist of polymerized or pyrrole or pyrrole derivatives.
13. The through-hole plated single-layer or multi-layer printed circuit board according to claims 11 or 12, characterized in that the layer of the electroconductive synthetic polymer is from 0.1 to 10 µm in thickness.
14. A bored single-layer or multi-layer printed circuit board based on a polymeric substrate material or on a ceramic material provided optionally on both sides with at least one photoresist layer temporarily exposing the electroconductive circuit pattern, wherein on the area contiguous to the bore hole a layer of electroconductive synthetic polymer is located.
15. An aqueous solution for carrying out step c) of the process according to claims 1 to 10, containing a monomer which upon polymerization yield a conductive polymer, solubilizers and solvents or mixtures thereof.
16. The solution according to claim 15, containing from 1 to 50% of pyrrole, furane and/or thiophene and from 99 to 50% of a solvent or solubilizer or from 99 to 50% of a mixture comprising a solvent and a solubilizer.
17. The solution according to any one of claims 15 or 16, characterized in that the solubilizers or solvents are water, methanol, ethanol, n-propanol, isopropanol, higher alcohols, polyalcohols, DMF (dimethyl formamide), ketones, cumene sulfonate, N-methyl pyrrolidone, Tri-glyme, Diglyme, alkali metal salt of toluene sulfonates or their ethyl esters and aqueous alkaline solutions or mixtures thereof.
18. Use of an aqueous solution containing from 1 to 50% of pyrrole, furane and/or thiophene and from 99 to 50% of a solvent or solubilizer or from 99 to 50% of a mixture comprising a solvent and a solubilizer.
CA 2064214 1989-08-31 1990-08-11 Plated-through printed circuit board with resist and process for producing it Abandoned CA2064214A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19893928823 DE3928823A1 (en) 1989-08-31 1989-08-31 Magnetic recording carrier prodn. - with carbon black-contg. layer measurement by microwave absorption
DEP3928823.3 1989-08-31

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CA2064214A1 true CA2064214A1 (en) 1991-03-01

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