CA2005323A1 - Sequential correlator for spread spectrum communication system - Google Patents
Sequential correlator for spread spectrum communication systemInfo
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- CA2005323A1 CA2005323A1 CA002005323A CA2005323A CA2005323A1 CA 2005323 A1 CA2005323 A1 CA 2005323A1 CA 002005323 A CA002005323 A CA 002005323A CA 2005323 A CA2005323 A CA 2005323A CA 2005323 A1 CA2005323 A1 CA 2005323A1
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- spread spectrum
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Abstract
Abstract A spread spectrum communications system includes a spread spectrum encoder wherein the input data signal is combined in an exclusive OR gate with the output of a digital function generator connected in a feedback arrangement which encodes an input data signal with a spreading code sequence. In general, a digital function generator provides an output signal, which after a predetermined time, is a predetermined function of the prior input to the digital function generator. At the receiver, the data is recovered in a spread spectrum correlator using a similar digital function generator and an exclusive OR gate, but connected in a feedforward arrangement. The correlator, using the digital function generator in a feedforward configuration, performs the inverse operation of the encoder, which uses the digital function generator in feedback configuration, in order to recover the data. A
spread spectrum system embodying the present invention will synchronize after a predetermined number of chip clocks have elapsed, sufficient to cause the respective digital function generators in the encoder and correlator to each provide an identical predetermined output pattern.
DOCKET NO. 1014
spread spectrum system embodying the present invention will synchronize after a predetermined number of chip clocks have elapsed, sufficient to cause the respective digital function generators in the encoder and correlator to each provide an identical predetermined output pattern.
DOCKET NO. 1014
Description
:~ ~3 0 ~ 3 ~ 3 SEQUENTIAL CORRELATOR FOR
SPREAD SPECTRUM COMMUNICATION SYSTEM
Field Of The Invention This invention relates to spread spectrum communicati4n systems. In particular, this inve~tion relates to a data correlator for use in spread spectrum communication systems.
Background Of The Invention Spread spectrum systems are well known. In a direct sequence spread spectrum data communi~ation system, the individual da~a bits are modulated with a code seguence, called a spreading code sequence. The individual bits in the spreading code sequence are called chips. In order to transmit each data bit in a spread spectrum communication system, each individual data bi~ is first multiplied by the spreading code ~equence in an exclusive OR gate.
Thus for example, for a data bit of zero, the spreading -1- DOCKET NO. 1014 ,' ' . '. : .
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Z1~ 3~3 ~de itself is transmitted; while for a data bit of one, the inverse of the spreading code i8 transmitted. Since the spreading code has a higher clock rate than the data, the resulting signal has a higher fre~uency content, i.e., a higher bandwid~h ~han ~he original data ~ignal.
Specifically, the clock rate of the spread spectrum signal will ba higher than that of the input data by the chosen spectrum spreading ratio. Thus, the spread spectrum signal energy content is more dispersed throughout the frequency spectrum. Spread spectrum communication systems are therefore less susceptible to noise and interference as well as having greater resistance to multipath distortion delays.
At the receiver, the spreadin~ code sequence is detected in order to recover the original transmitted data. The general problem in spread spectrum systems is to correlate the received signal with the original spreading code sequence. Detection of the spreading code typically corresponds to the reception of a first logic level, while detection of the inverse of the spreading cod~ corresponds to detection of the opposite logic level.
In the prior art, there are many types of code correlators for detecting a received spreading code.
SPREAD SPECTRUM COMMUNICATION SYSTEM
Field Of The Invention This invention relates to spread spectrum communicati4n systems. In particular, this inve~tion relates to a data correlator for use in spread spectrum communication systems.
Background Of The Invention Spread spectrum systems are well known. In a direct sequence spread spectrum data communi~ation system, the individual da~a bits are modulated with a code seguence, called a spreading code sequence. The individual bits in the spreading code sequence are called chips. In order to transmit each data bit in a spread spectrum communication system, each individual data bi~ is first multiplied by the spreading code ~equence in an exclusive OR gate.
Thus for example, for a data bit of zero, the spreading -1- DOCKET NO. 1014 ,' ' . '. : .
,: ' ' ''' ~`' :' '.
- - ' ~- ~ ' ' ':
Z1~ 3~3 ~de itself is transmitted; while for a data bit of one, the inverse of the spreading code i8 transmitted. Since the spreading code has a higher clock rate than the data, the resulting signal has a higher fre~uency content, i.e., a higher bandwid~h ~han ~he original data ~ignal.
Specifically, the clock rate of the spread spectrum signal will ba higher than that of the input data by the chosen spectrum spreading ratio. Thus, the spread spectrum signal energy content is more dispersed throughout the frequency spectrum. Spread spectrum communication systems are therefore less susceptible to noise and interference as well as having greater resistance to multipath distortion delays.
At the receiver, the spreadin~ code sequence is detected in order to recover the original transmitted data. The general problem in spread spectrum systems is to correlate the received signal with the original spreading code sequence. Detection of the spreading code typically corresponds to the reception of a first logic level, while detection of the inverse of the spreading cod~ corresponds to detection of the opposite logic level.
In the prior art, there are many types of code correlators for detecting a received spreading code.
-2- DOCXET NO. 1014 '. ' ' ,' ' ~5~3 In one prior art approach, the signal is applied to an analog delay line and compared in parallel fashion using programmable analog inverters and adders programmed with a stored version of the spreading code. In operation, the analog delay line tap outputs are inverted or nnt, according to the spreading sequence in use. When the incoming signal lines up in time with the inverter programming, all outputs will add to produce a one chip long correlation spike. This process is known mathematically as correlation.
The analog delay line, inverters and adders can be combined on a single surface acoustic wave (SAW) device. The latter approach can be costly, especially for small production quantities, and it is difficult to reprogram the SAW for different spreading code sequences. Fully digital correlators are available from ~uch companies as T~W Inc., but they are expensive and use a considerable amount o~
power.
Another method of correlating the received signal with the original spreading code ~equence is to synchronize a local code se~uence generator with the incoming signals. In the -3- DOCKET NO. 1~14 ' ' ' ' ' ' latter case, considerably less hardware is required. If the received signal i5 digitized before being applied to the correlator, then a single exclusive OR gate can be used to compare the incoming signal to the output of the local synchroni~ed code generator. The problem then becomes one of synchronizin~ the local code generator to the code generator in th~ transmitter. However, sequence synchronization can taks many bit~ to achieva, adding to tho overhead needed for the operation oP a packet protocol, and in some cas~s, making existing protocol~ vsry difficult to implement.
In thes~ circumstances, it would b~ desirablQ to ~ind a spread spectrum technique which offers the low cost of a synchronized receiver, while providing very short synchronization time.
SummarY Qf Th~ Inv~ntio~
The pre~ent inv2ntion is embodied in a ~pread ~p~ctru~
encoder wh~in t~e input data signal i5 combined in an exclusiva OR gate with the output of a digital function generato~ ~hich provides a sprea~ing code sequence. Th~
digital function generator~connected in a feedback /g~
The analog delay line, inverters and adders can be combined on a single surface acoustic wave (SAW) device. The latter approach can be costly, especially for small production quantities, and it is difficult to reprogram the SAW for different spreading code sequences. Fully digital correlators are available from ~uch companies as T~W Inc., but they are expensive and use a considerable amount o~
power.
Another method of correlating the received signal with the original spreading code ~equence is to synchronize a local code se~uence generator with the incoming signals. In the -3- DOCKET NO. 1~14 ' ' ' ' ' ' latter case, considerably less hardware is required. If the received signal i5 digitized before being applied to the correlator, then a single exclusive OR gate can be used to compare the incoming signal to the output of the local synchroni~ed code generator. The problem then becomes one of synchronizin~ the local code generator to the code generator in th~ transmitter. However, sequence synchronization can taks many bit~ to achieva, adding to tho overhead needed for the operation oP a packet protocol, and in some cas~s, making existing protocol~ vsry difficult to implement.
In thes~ circumstances, it would b~ desirablQ to ~ind a spread spectrum technique which offers the low cost of a synchronized receiver, while providing very short synchronization time.
SummarY Qf Th~ Inv~ntio~
The pre~ent inv2ntion is embodied in a ~pread ~p~ctru~
encoder wh~in t~e input data signal i5 combined in an exclusiva OR gate with the output of a digital function generato~ ~hich provides a sprea~ing code sequence. Th~
digital function generator~connected in a feedback /g~
-4- DOCKET NO. 1014 '' . ~'' ' ~
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rangement from the output of the exclusive OR gate to an input thereof. Specifically, the output of the exclusive OR gate is connected to the input to the digital function generator, and the output of the digital function generator is connected to an input of the exclusive OR gate.
The digital function generator provides an output ~ignal, which after a predetermined time, is a predetermined function of the prior input to the digital function generator. That is, after a predetermined number of chip clock intervals have elapsed, the output of the digital function generator will follow a predetermined pattern based on the prior input, regardless of the initial internal state of the digital function generatsr.
The present invention is ~urther embodied in a spread spectrum correlator wharein the data signal is recovered by providing the exclusive OR of the received spread spectrum signal and the output o~ a digital function generator in the correlator, which digital function generator provides the same input to output relationship as the corresponding digital function generator in the encoder.
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rangement from the output of the exclusive OR gate to an input thereof. Specifically, the output of the exclusive OR gate is connected to the input to the digital function generator, and the output of the digital function generator is connected to an input of the exclusive OR gate.
The digital function generator provides an output ~ignal, which after a predetermined time, is a predetermined function of the prior input to the digital function generator. That is, after a predetermined number of chip clock intervals have elapsed, the output of the digital function generator will follow a predetermined pattern based on the prior input, regardless of the initial internal state of the digital function generatsr.
The present invention is ~urther embodied in a spread spectrum correlator wharein the data signal is recovered by providing the exclusive OR of the received spread spectrum signal and the output o~ a digital function generator in the correlator, which digital function generator provides the same input to output relationship as the corresponding digital function generator in the encoder.
-5- DOCK~T NO. 1014 .
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2~ 3~3 The digital function generator in the correlator i~
connected in a feedforward arrangement in which the input to the digital function generator is the demodulated spread spectrum signal, and the output of the digital function gPnerator is input to the ~xclusive OR gate.
The correlator, using the digital function generator in a feedforward configuration, per~orms the inverse operation of the encoder, which uses the digital function generator in feedback configuration, in order to recover the data.
A spread spectrum system embodying the present invention will synchronize after a predetermined number of chip clocks have elapsed, sufficient to cause the respective digital function generators in the encoder and correlator to each provide an identical predetermined output patterns.
Descri~tion Of the Drawin~s Figure 1 shows a block diagram of a general spread spectrum communication system embodying the present invention.
~ '' ' , , .
2~ 3~3 The digital function generator in the correlator i~
connected in a feedforward arrangement in which the input to the digital function generator is the demodulated spread spectrum signal, and the output of the digital function gPnerator is input to the ~xclusive OR gate.
The correlator, using the digital function generator in a feedforward configuration, per~orms the inverse operation of the encoder, which uses the digital function generator in feedback configuration, in order to recover the data.
A spread spectrum system embodying the present invention will synchronize after a predetermined number of chip clocks have elapsed, sufficient to cause the respective digital function generators in the encoder and correlator to each provide an identical predetermined output patterns.
Descri~tion Of the Drawin~s Figure 1 shows a block diagram of a general spread spectrum communication system embodying the present invention.
-6- DOCKET NO. 1014 `:
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~igures 2a, 2b, 2c, and 2d is a time diagram illust~ating a spreading code sequence which may be used in conjunction with the present invention.
Figure 3 is a block diagram o~ a spread spectrum modem including a spread spectrum transmit~er and a spread spectrum receiver in accordance with the present invention.
Figure 4 is a prior art spread spectrum data encoder.
Figure 5 is a prior art spread spectrum data correlator.
Figure 6 is an embodiment o~ a spread spectrum data encoder in accordance with the present invention.
Figure 7 is an embodiment of a spread spectrum data correlator in accordance with the present invention.
Detailed Description A generalized illustration o~ a spread spectrum data communication system is shown in figure 1. It is intended that data input at terminal lO will be transmitted through the system and be available as data output on terminal 24.
~-.
~igures 2a, 2b, 2c, and 2d is a time diagram illust~ating a spreading code sequence which may be used in conjunction with the present invention.
Figure 3 is a block diagram o~ a spread spectrum modem including a spread spectrum transmit~er and a spread spectrum receiver in accordance with the present invention.
Figure 4 is a prior art spread spectrum data encoder.
Figure 5 is a prior art spread spectrum data correlator.
Figure 6 is an embodiment o~ a spread spectrum data encoder in accordance with the present invention.
Figure 7 is an embodiment of a spread spectrum data correlator in accordance with the present invention.
Detailed Description A generalized illustration o~ a spread spectrum data communication system is shown in figure 1. It is intended that data input at terminal lO will be transmitted through the system and be available as data output on terminal 24.
-7- DOCKE'r NO. 1014 ' ~0~)5~Z3 Data input at terminal 10 i~ applied to spread spectrum modulator 12 which is in turn input to RF transm:itter 14.
The output of RF transmitter 14 is applied to a transmitting antenna 16, After the transmission through a suitable medium and reception by receiving antenna 18, the signal is applied to ~F receiver 20. The output of RF
receiver 20 is applied to a spread spectrum demodulator 22 in order to recover the original data at terminal 24.
The spread spectrum modulator 12 contains a sequence generator in order to provide a spreading code sequence.
As illustrated in figure 2a, the sequence g~nerator produces a spreading code sequence, S~Q 1, starting at time Tl and ending at time T~. For purposes of discussion, it may be assumed for the moment that the spreading code sequence is repeating, and that SEQ 2 from time T~ to time T3, SEQ 3 from time T3 to time T4, and SEQ 4 from time T4 to time T5, are all identical sequences, which may be inverted or not inverted, but otherwise all are equal to SEQ 1. Methods for generating repeating code sequences, such as maximal length pseudo random code generators, are well known in the art.
The output of RF transmitter 14 is applied to a transmitting antenna 16, After the transmission through a suitable medium and reception by receiving antenna 18, the signal is applied to ~F receiver 20. The output of RF
receiver 20 is applied to a spread spectrum demodulator 22 in order to recover the original data at terminal 24.
The spread spectrum modulator 12 contains a sequence generator in order to provide a spreading code sequence.
As illustrated in figure 2a, the sequence g~nerator produces a spreading code sequence, S~Q 1, starting at time Tl and ending at time T~. For purposes of discussion, it may be assumed for the moment that the spreading code sequence is repeating, and that SEQ 2 from time T~ to time T3, SEQ 3 from time T3 to time T4, and SEQ 4 from time T4 to time T5, are all identical sequences, which may be inverted or not inverted, but otherwise all are equal to SEQ 1. Methods for generating repeating code sequences, such as maximal length pseudo random code generators, are well known in the art.
-8- DOCKET NO. 1014 .
.. ::
lthough the number of chips per data bit is shown in Figure 2b as being equal to the number of chips per spreading code sequence, in general, the number of chips per data bit may ba equal to, grea~er than, or less than, the number of chips per spreading code sequence. ~owever, regardless of the number of chips per data bit, the transitions of the data bits ~hould be coincident with the transitions of the individual chips. Thus, in Figure 2b, the data transitions at Tl, T2, T3, T~, and T5 are coincident with the system chip clock.
A block diagram of a spread spectrum radio modem for transmitting-and receiving digital data is shown in figure 3. The transmitter portion comprise~ spread spectrum encoder 28, transmitter chip clock 30, ~SK modulator 34 and RF transmitter 14. The receiving portion comprises RF
receiver 20, PSK demodulator 40, hreshold circuit 44, receiver chip clock 42, spread spectrum correlator 46 and filter circuit 48. The transmit/receive switch 36 permits an antenna 38 to be shared between the transmitter and receiver.
.. ::
lthough the number of chips per data bit is shown in Figure 2b as being equal to the number of chips per spreading code sequence, in general, the number of chips per data bit may ba equal to, grea~er than, or less than, the number of chips per spreading code sequence. ~owever, regardless of the number of chips per data bit, the transitions of the data bits ~hould be coincident with the transitions of the individual chips. Thus, in Figure 2b, the data transitions at Tl, T2, T3, T~, and T5 are coincident with the system chip clock.
A block diagram of a spread spectrum radio modem for transmitting-and receiving digital data is shown in figure 3. The transmitter portion comprise~ spread spectrum encoder 28, transmitter chip clock 30, ~SK modulator 34 and RF transmitter 14. The receiving portion comprises RF
receiver 20, PSK demodulator 40, hreshold circuit 44, receiver chip clock 42, spread spectrum correlator 46 and filter circuit 48. The transmit/receive switch 36 permits an antenna 38 to be shared between the transmitter and receiver.
-9- DOCKET NO. 1014 .: . ~ , .. . . . .
J~ 3 )ata output from a data device 26 which may be a computer or a computer terminal, i5 applied to spread spectrum encoder 28~ Output of the spread spectrum encoder 28 which has been increased in bandwidth due to the higher frequency transmitter chip clock 30, is applied to RSX modulator 34 and RF transmit~er 14 for transmission through transmit/receive switch 36 and to antenna 38.
In the receive mode, transmit/receive switch 36 connPcts antenna 38 to RF receiver 20. The output of RF receiver 20 is applied to PSK demodulator 40. The receiver chip clock 42 is derived from the received spread spectrum signal in PSK demodulator 40.
The reconstruction or derivation of the receiver chip clock 42 from the signal received at PSR demodulator 40 is well known to those skilled in the art and forms no part of the present invention. The recovered xeceiver chip clock is applied to spread spectrum correlator 46 as is the output of PSK demodulator 40. Within the spread spectr~m correlator 46, the received signal is correlated with the spreading code sequence which was used in the transmitter, in order to derive the received data. The output of correlator 46 is connected to filter circuit 48 which provides a data input to the data device 26.
J~ 3 )ata output from a data device 26 which may be a computer or a computer terminal, i5 applied to spread spectrum encoder 28~ Output of the spread spectrum encoder 28 which has been increased in bandwidth due to the higher frequency transmitter chip clock 30, is applied to RSX modulator 34 and RF transmit~er 14 for transmission through transmit/receive switch 36 and to antenna 38.
In the receive mode, transmit/receive switch 36 connPcts antenna 38 to RF receiver 20. The output of RF receiver 20 is applied to PSK demodulator 40. The receiver chip clock 42 is derived from the received spread spectrum signal in PSK demodulator 40.
The reconstruction or derivation of the receiver chip clock 42 from the signal received at PSR demodulator 40 is well known to those skilled in the art and forms no part of the present invention. The recovered xeceiver chip clock is applied to spread spectrum correlator 46 as is the output of PSK demodulator 40. Within the spread spectr~m correlator 46, the received signal is correlated with the spreading code sequence which was used in the transmitter, in order to derive the received data. The output of correlator 46 is connected to filter circuit 48 which provides a data input to the data device 26.
-10- DOCKET NO. 1014 :, . . ' ,.; ~, , , ' ; ~' : ,'' , . . . .
33~;3 A typical prior art spread spectrum encoder 28 is shown in figure 4. The encoder 28 consists of an exclusiv~ OR gate 52 having one inpu~ connected to the data input terminal 10. The other input of exclusive OR 52 gate is the output of a sequence generator 54 which is driven by the transmitter chip clock 30. The output of exclusive OR gate 52 on conductor 51 is the output fed to the PSK modulator.
Depending upon whether the data input at terminal 10 is a one or a zero, either a inverted or non-inverted version of the spreading code sequence from sequence generator 54 will be fed to the modulator on conductor 51.
A prior art data corralator is shown in figure 5. The data correlator consists of a two input exclusive OR gate 56 having one input 64 being a one bit quantized signal from the demodulator and another input 57 connected to a synchronized sequence generator 58 which is driven by receiver chip clock 4~. Methods o~ synchronizin~ the sequence generator 5~ in the correlator with the sequence generator 54 in the encoder (figure 4) are well k~own in the prior art.
~ DOCKET NO. 1014 ; - '.
lternatively, the signal input to the corrslator 46 ~ay be digitized in an analog to digital converter having a plural bit parallel output. I~ so, then exclusive OR gate 56 would then be replaced with a digital multiplier.
If the received code sequence on conductor 64 is the same as the synchronized code seguence on conductor ~7 , then the output on conductor 55 would indicate a zero data bit.
Conversely, if the received ~ode seguence on conductor 64 is the inverse of the synchronized code se~uence on condu~tor 57, then the output on conductor 5S would indicate a one data bit.
It is noted that the sequence generator 58 at the receiver correlator 46 in figure 5 must be synchronized with the sequence generator 54 at the encodPr 28 in figure 4. Such synchronization may take a long time to achieve and also may add a considerable amount of hardware.
A data encoder in accordance with the present invention is shown in figure 6. Data input terminal 10 is connected to one input terminal of a two input exclusive OR gate 70.
The output of exclusive OR gate 70 on conductor 78, which is connected to the system modulator, is also input to -12- DOCKET NO. 1014 :
' ' "' ' ~'~: , ' ' ' :
.
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~3~ 3~ 3 gital function generator 73. The output oP digital function generator 73 on conductor 71 is connected in a feedback loop arrangement to the ~econd input of exclusive OR gate 70.
Digital function generator 73 comprises a five stage shift register consisting of five ~lip-flops, shown as stages 1 through 5. The clock input to drive shift register 72 is provided by the transmitter chip clock generator 30. The output of the sec~nd flip-flop stage 2 and the output of the fifth flip-~lop stage 5 are respective inputs to the two input exclusive OR gate gate 76. The output of exclusive OR gate 7~, which is the output of the digital function generator 73 is therefore seen to be the exclusive 0~ of the fif~h previous, and second previous chip of the transmitted spread spectrum signal on conductor 78.
The digital function generator 73 of figure 6 includes a preset input on ~onductor 80. The preset input is effective to set the internal state of digital function generator 73 to a predetermined internal initial state. In particular, a signal on the preset input conductor 80 will set shiPt register flip-flop stages 1,2,3, and 4 to zero, while setting shift register 1ip-flop stage 5 to a onP.
-13- DOCKET NO. 1014 . ~ , . . . ~
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~53~3 `he preset initial condition yuarantees that digital function generator 73 will generate a 31 count spreading code sequence to modulate the input data signal.
Otherwise, if shift register 72 contained a forbidden initial state, i.e. either all zeros or all ones, digital function generator 73 might not generate any sequenc~ at all.
A data correlator in accordance with the present invention is hown in figure 7. The demodulated spread spectrum signal on conductor a2 from the system demodulator and threshold circuit 44 (figure 3), is connected to one input of exclusive OR gate 84. The spread spectrum si~nal on conductor 82 is also connected to the input to digital function generator 93. The output of digital function generator 93 on conductor 77 is connected in a feedforward arrangement to the second input of exclusive OR gate 84.
The output of exclusive OR gate 84 on conductor 84 is the correlatad data output to the system filter circuits.
Digital function generator 93 comprises a five stage shift register 92 consisting of five flip flops, shown as stages 1 through 5. ~he clock input to drive shift register 92 is provided by the receivèr chip clock generator 42. The -14- DOCKET NO. 1014 .' ':
ltput of the second flip-flop stage 2 and the output of the fifth flip-flop stage 5 are respective inputs to the two input exclusive OR gate gate 96. The output of exclusive OR gate 96 is the output of the digital function generatox 93 on conductor 77 to the second input of exclusive OR gate 84.
It is noted that digital function generator 93 in figure 7 and digital function generator 73 in figure 6 have essentially the same internal organization and provide essentially the same input to output function. The only difference is that the digital function generator 73 ~figure 6) in the transmiter encoder hss a preset input signal on conductor 80, while the digital function generator 93 (figure 7) in the receiver correlator does not. Shift register 92 in figure 7 may have any arbitrary initial internal state. Also, the arrangement of the digital function generatox and exclusive OR gate in the encoder is a feedback configuration, while ~he arrangement of the digital function generator and exclusive OR gate in the correlator is a feedforward configuration.
-15- DOCKET NO. 1014 .
3~3 ~r the purposes of the following discu~sion, it is assumed that there is a transparent data path from conductor 78 o~
figure 6 to conductor 82 of figure 7. That is, it is assumed that the remainder of the transmission system including the PSX modulator and PSK dsmodulator the RF
transmitter and RF receiver will deliver the spread spectrum signal from conductor 78 of figure 6 to conductor 82 of figure 70 In operation, a preset input signal on conductor 80 will set shift register 72 to 00001. Thereafter, with each successive chip clock, shift register 73, exclusive OR gate 76, and exclusive OR gate 70, which are connected in a feed~ack arrangement to produce a 31 count maximal length pseudo random sequence, will generate a a spread spectrum spreading code sequence. However, the seguence generated will depend on the input data. In particular, for a data input of zero at terminal 10, a first spreading code sequence will be generated. If the data input at terminal 10 is a one, then a second spreading code sequence will be generated.
-16~ DOCKET NO. 1014 ~, 3~
ne different sequence possibilities are illustrated in figure 2. In particular, figures 2a and 2b illustrate a situation where the number of chips per data bit in ~igure 2b is equal to the number of chips per complete spreading code sequence in figure 2a, in this case, 31 chips. If ~o, the transmitted spreading code sequence will always be a fixed first sequence if th data is a one~ and a fixed second sequence if the data is zero.
Figures 2c and ~d illustrate a situation wherein the number of chips per data bit may be less than or greater than the number of chips per spreading code sequence. In such case, the transmit~ed spread spectrum signal will follow the first fixed (and repeating) sequence so long as the data input at terminal 10 is a one. When the data input switches to a zero, the transmitted se~uence will be switched to a new point in the second ~ixed sequence, and will continue along such sequence until the data switches back to a one. Then the transmitted sequence will switch to a new starting point in the first fixed sequence.
Thus, in figures 2c and 2d, SEQ 5 will be generated from time Tl0 to Tll. At Tll, a new sequence, SEQ 6 i5 ~egun and continued until Tl2, followed by generally different 17- DOCXET ~O. 1014 ~3~3~3 quences, i.e., SEQ 7 until T13, followed by SEQ 8 until T14, and SEQ 9 until T15. Note that the generated sequences can be shorter or longer than the natural maximal length count of ~he underlying sequence genera~or. If the number of chips per data bit is shorter than the number o~
chips per natural sequence, the natural sequence is truncated.
If the number of chips per data bit is longer than the number of chips per natural sequence, the natural sequence is repeated. In either case, however, care must be taken in the choice of system parameters, i.e. in the number of chips per natural spreading code sequence, the number o chips per data bit, and the timing of the preset signal in the encoder to avoid forbidden states of shift register 72, i.e. all zeros or all ones, when switching from one sequence to the next.
At the receiver correlator in figure 7, shift register 92 has an arbitrary initial state, However, after a preset time, in this case, after 5 chips on conductor 82 have been clocked into shift register 92, then stages 1 through 5 thereof will contain the same values as corresponding stages 1 through 5 of shift register 72 in figure 6. Thu~, -18- DOCKET NO. 1014 ......
................ . .. . . . .
3S;~3 ~ter 5 chip clocks, the output o~ digital function generator 93 in the receiver (figure 7) will be the same as the output of digital function generator 73 in the transmitter (figure 6). The table below enumerates the various possible logic conditions. The spread spectrum signal is represented as a variable S, and the output of the digital function generator is indicated as H(S), a generalized function of ~he spread spectrum signal, S.
Data In H(S) S Data out O O O
Thus, by examination of the truth table for exclusive OR
gates 70 and 84, it can be seen that the data input in figure 6 is the same as the data output in figure 7, and the data is therefore recovered. ~he above result is independent of the type of digital function generator used so long as the respective digital function generator in the encoder and the digital function generator in the receiver provide the same predetermined output sequence based on the same input to the respective digital function generators.
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-19- DOCKET ~O. 1014 , :,:
, .. .::: :
. . ,, : i 3~3 Ae same result can be observed from the logic equations for the data output and data inputO
S - Data in ~ H(S) Data out = S 6~ H(S) Combining the above equations, Data out = Data in ~9 H(S~ ~9 H(S) Since the exclusive OR of any variable with itself is always zero, then Data in = Data out The output of the data correlator is a chip by chip correlation of the received spread spectrum signal.
Following the output of the data correlator, is a majority vote logic in order to determine whether the r~c~ived data bit is a one or a zero. Under ideal conditions, a}l o~ the output chips over one data bit interval Prom exclusive OR
84 will be o~ the same polarity. In the presence of noise, some of them will be in erxor. Howev~r, by a majority vote o~ the output chips on conductor 86, improved communications reliability is achieved.
-20- DOCKET NO. 1014 - - , .
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- 2()~ -Finally, synchronization time is equal to the predetermined time it takes for the output of the digital function generator 93 in the receiver to begin trac~ing the digital function generator 73 in the encoder. In this case synchronization will be achieved aft~r 5 chips have been received.
Thus, a simple economical da~a correlator and data encoder has been described for use in conjunction with a spread spectrum communication system. The described system is low in cost and will rapidly synchronize with the received spread spectrum signal.
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33~;3 A typical prior art spread spectrum encoder 28 is shown in figure 4. The encoder 28 consists of an exclusiv~ OR gate 52 having one inpu~ connected to the data input terminal 10. The other input of exclusive OR 52 gate is the output of a sequence generator 54 which is driven by the transmitter chip clock 30. The output of exclusive OR gate 52 on conductor 51 is the output fed to the PSK modulator.
Depending upon whether the data input at terminal 10 is a one or a zero, either a inverted or non-inverted version of the spreading code sequence from sequence generator 54 will be fed to the modulator on conductor 51.
A prior art data corralator is shown in figure 5. The data correlator consists of a two input exclusive OR gate 56 having one input 64 being a one bit quantized signal from the demodulator and another input 57 connected to a synchronized sequence generator 58 which is driven by receiver chip clock 4~. Methods o~ synchronizin~ the sequence generator 5~ in the correlator with the sequence generator 54 in the encoder (figure 4) are well k~own in the prior art.
~ DOCKET NO. 1014 ; - '.
lternatively, the signal input to the corrslator 46 ~ay be digitized in an analog to digital converter having a plural bit parallel output. I~ so, then exclusive OR gate 56 would then be replaced with a digital multiplier.
If the received code sequence on conductor 64 is the same as the synchronized code seguence on conductor ~7 , then the output on conductor 55 would indicate a zero data bit.
Conversely, if the received ~ode seguence on conductor 64 is the inverse of the synchronized code se~uence on condu~tor 57, then the output on conductor 5S would indicate a one data bit.
It is noted that the sequence generator 58 at the receiver correlator 46 in figure 5 must be synchronized with the sequence generator 54 at the encodPr 28 in figure 4. Such synchronization may take a long time to achieve and also may add a considerable amount of hardware.
A data encoder in accordance with the present invention is shown in figure 6. Data input terminal 10 is connected to one input terminal of a two input exclusive OR gate 70.
The output of exclusive OR gate 70 on conductor 78, which is connected to the system modulator, is also input to -12- DOCKET NO. 1014 :
' ' "' ' ~'~: , ' ' ' :
.
: .., .
~3~ 3~ 3 gital function generator 73. The output oP digital function generator 73 on conductor 71 is connected in a feedback loop arrangement to the ~econd input of exclusive OR gate 70.
Digital function generator 73 comprises a five stage shift register consisting of five ~lip-flops, shown as stages 1 through 5. The clock input to drive shift register 72 is provided by the transmitter chip clock generator 30. The output of the sec~nd flip-flop stage 2 and the output of the fifth flip-~lop stage 5 are respective inputs to the two input exclusive OR gate gate 76. The output of exclusive OR gate 7~, which is the output of the digital function generator 73 is therefore seen to be the exclusive 0~ of the fif~h previous, and second previous chip of the transmitted spread spectrum signal on conductor 78.
The digital function generator 73 of figure 6 includes a preset input on ~onductor 80. The preset input is effective to set the internal state of digital function generator 73 to a predetermined internal initial state. In particular, a signal on the preset input conductor 80 will set shiPt register flip-flop stages 1,2,3, and 4 to zero, while setting shift register 1ip-flop stage 5 to a onP.
-13- DOCKET NO. 1014 . ~ , . . . ~
.
.~
. :
~53~3 `he preset initial condition yuarantees that digital function generator 73 will generate a 31 count spreading code sequence to modulate the input data signal.
Otherwise, if shift register 72 contained a forbidden initial state, i.e. either all zeros or all ones, digital function generator 73 might not generate any sequenc~ at all.
A data correlator in accordance with the present invention is hown in figure 7. The demodulated spread spectrum signal on conductor a2 from the system demodulator and threshold circuit 44 (figure 3), is connected to one input of exclusive OR gate 84. The spread spectrum si~nal on conductor 82 is also connected to the input to digital function generator 93. The output of digital function generator 93 on conductor 77 is connected in a feedforward arrangement to the second input of exclusive OR gate 84.
The output of exclusive OR gate 84 on conductor 84 is the correlatad data output to the system filter circuits.
Digital function generator 93 comprises a five stage shift register 92 consisting of five flip flops, shown as stages 1 through 5. ~he clock input to drive shift register 92 is provided by the receivèr chip clock generator 42. The -14- DOCKET NO. 1014 .' ':
ltput of the second flip-flop stage 2 and the output of the fifth flip-flop stage 5 are respective inputs to the two input exclusive OR gate gate 96. The output of exclusive OR gate 96 is the output of the digital function generatox 93 on conductor 77 to the second input of exclusive OR gate 84.
It is noted that digital function generator 93 in figure 7 and digital function generator 73 in figure 6 have essentially the same internal organization and provide essentially the same input to output function. The only difference is that the digital function generator 73 ~figure 6) in the transmiter encoder hss a preset input signal on conductor 80, while the digital function generator 93 (figure 7) in the receiver correlator does not. Shift register 92 in figure 7 may have any arbitrary initial internal state. Also, the arrangement of the digital function generatox and exclusive OR gate in the encoder is a feedback configuration, while ~he arrangement of the digital function generator and exclusive OR gate in the correlator is a feedforward configuration.
-15- DOCKET NO. 1014 .
3~3 ~r the purposes of the following discu~sion, it is assumed that there is a transparent data path from conductor 78 o~
figure 6 to conductor 82 of figure 7. That is, it is assumed that the remainder of the transmission system including the PSX modulator and PSK dsmodulator the RF
transmitter and RF receiver will deliver the spread spectrum signal from conductor 78 of figure 6 to conductor 82 of figure 70 In operation, a preset input signal on conductor 80 will set shift register 72 to 00001. Thereafter, with each successive chip clock, shift register 73, exclusive OR gate 76, and exclusive OR gate 70, which are connected in a feed~ack arrangement to produce a 31 count maximal length pseudo random sequence, will generate a a spread spectrum spreading code sequence. However, the seguence generated will depend on the input data. In particular, for a data input of zero at terminal 10, a first spreading code sequence will be generated. If the data input at terminal 10 is a one, then a second spreading code sequence will be generated.
-16~ DOCKET NO. 1014 ~, 3~
ne different sequence possibilities are illustrated in figure 2. In particular, figures 2a and 2b illustrate a situation where the number of chips per data bit in ~igure 2b is equal to the number of chips per complete spreading code sequence in figure 2a, in this case, 31 chips. If ~o, the transmitted spreading code sequence will always be a fixed first sequence if th data is a one~ and a fixed second sequence if the data is zero.
Figures 2c and ~d illustrate a situation wherein the number of chips per data bit may be less than or greater than the number of chips per spreading code sequence. In such case, the transmit~ed spread spectrum signal will follow the first fixed (and repeating) sequence so long as the data input at terminal 10 is a one. When the data input switches to a zero, the transmitted se~uence will be switched to a new point in the second ~ixed sequence, and will continue along such sequence until the data switches back to a one. Then the transmitted sequence will switch to a new starting point in the first fixed sequence.
Thus, in figures 2c and 2d, SEQ 5 will be generated from time Tl0 to Tll. At Tll, a new sequence, SEQ 6 i5 ~egun and continued until Tl2, followed by generally different 17- DOCXET ~O. 1014 ~3~3~3 quences, i.e., SEQ 7 until T13, followed by SEQ 8 until T14, and SEQ 9 until T15. Note that the generated sequences can be shorter or longer than the natural maximal length count of ~he underlying sequence genera~or. If the number of chips per data bit is shorter than the number o~
chips per natural sequence, the natural sequence is truncated.
If the number of chips per data bit is longer than the number of chips per natural sequence, the natural sequence is repeated. In either case, however, care must be taken in the choice of system parameters, i.e. in the number of chips per natural spreading code sequence, the number o chips per data bit, and the timing of the preset signal in the encoder to avoid forbidden states of shift register 72, i.e. all zeros or all ones, when switching from one sequence to the next.
At the receiver correlator in figure 7, shift register 92 has an arbitrary initial state, However, after a preset time, in this case, after 5 chips on conductor 82 have been clocked into shift register 92, then stages 1 through 5 thereof will contain the same values as corresponding stages 1 through 5 of shift register 72 in figure 6. Thu~, -18- DOCKET NO. 1014 ......
................ . .. . . . .
3S;~3 ~ter 5 chip clocks, the output o~ digital function generator 93 in the receiver (figure 7) will be the same as the output of digital function generator 73 in the transmitter (figure 6). The table below enumerates the various possible logic conditions. The spread spectrum signal is represented as a variable S, and the output of the digital function generator is indicated as H(S), a generalized function of ~he spread spectrum signal, S.
Data In H(S) S Data out O O O
Thus, by examination of the truth table for exclusive OR
gates 70 and 84, it can be seen that the data input in figure 6 is the same as the data output in figure 7, and the data is therefore recovered. ~he above result is independent of the type of digital function generator used so long as the respective digital function generator in the encoder and the digital function generator in the receiver provide the same predetermined output sequence based on the same input to the respective digital function generators.
.
.
-19- DOCKET ~O. 1014 , :,:
, .. .::: :
. . ,, : i 3~3 Ae same result can be observed from the logic equations for the data output and data inputO
S - Data in ~ H(S) Data out = S 6~ H(S) Combining the above equations, Data out = Data in ~9 H(S~ ~9 H(S) Since the exclusive OR of any variable with itself is always zero, then Data in = Data out The output of the data correlator is a chip by chip correlation of the received spread spectrum signal.
Following the output of the data correlator, is a majority vote logic in order to determine whether the r~c~ived data bit is a one or a zero. Under ideal conditions, a}l o~ the output chips over one data bit interval Prom exclusive OR
84 will be o~ the same polarity. In the presence of noise, some of them will be in erxor. Howev~r, by a majority vote o~ the output chips on conductor 86, improved communications reliability is achieved.
-20- DOCKET NO. 1014 - - , .
, , , . .' ' , , ; 2~53Z~ ;
- 2()~ -Finally, synchronization time is equal to the predetermined time it takes for the output of the digital function generator 93 in the receiver to begin trac~ing the digital function generator 73 in the encoder. In this case synchronization will be achieved aft~r 5 chips have been received.
Thus, a simple economical da~a correlator and data encoder has been described for use in conjunction with a spread spectrum communication system. The described system is low in cost and will rapidly synchronize with the received spread spectrum signal.
_ _, . ... _ _ . . _ , ,,,,, ,, _ , _ _ _ ~ . .
, ;.
, ~ ~, `' '."' `, " ' :. ~ , . ... :
.... ,,, . ~
Claims (16)
1. A method for generating a spread spectrum signal from a data input signal, said method comprising:
storing individual chips of said spread spectrum signal;
-21- DOCKET NO. 1014 logically combining at least two prior chips of said stored spread spectrum signal to form a digital logic function output; and modulating said data input signal with said digital logic function output.
storing individual chips of said spread spectrum signal;
-21- DOCKET NO. 1014 logically combining at least two prior chips of said stored spread spectrum signal to form a digital logic function output; and modulating said data input signal with said digital logic function output.
2. A method for generating a spread spectrum signal in accordance with claim 1, wherein said step of modulating said data input signal with said digital logic function output comprises:
providing the exclusive OR of said digital logic function output and said data input signal to form said spread spectrum signal.
providing the exclusive OR of said digital logic function output and said data input signal to form said spread spectrum signal.
3. A method for generating a spread spectrum signal in accordance with claim 1, wherein said step of logically combining at least two prior chips of said stored spread spectrum signal comprises:
providing the exclusive OR of the fifth past stored prior chip and the second past stored prior chip to form said digital logic function output.
-22- DOCKET NO. 1014
providing the exclusive OR of the fifth past stored prior chip and the second past stored prior chip to form said digital logic function output.
-22- DOCKET NO. 1014
4. A method for correlating a spread spectrum signal including a data signal modulated with a spread spectrum spreading code sequence, in order to provide a correlated data output signal, said method comprising:
storing individual chips of said spread spectrum signal;
logically combining at least two prior chips of said stored spread spectrum signal to form a digital logic function output; and combining said spread spectrum signal with said digital logic function output to form said correlated data output signal.
storing individual chips of said spread spectrum signal;
logically combining at least two prior chips of said stored spread spectrum signal to form a digital logic function output; and combining said spread spectrum signal with said digital logic function output to form said correlated data output signal.
5. A method for correlating a spread spectrum signal in accordance with claim 4, wherein said step of logically combining at least two prior chips of said stored spread spectrum signal comprises:
-23- DOCKET NO. 1014 providing the exclusive OR of the fifth past stored prior chip and the second past stored prior chip to form said digital logic function output.
-23- DOCKET NO. 1014 providing the exclusive OR of the fifth past stored prior chip and the second past stored prior chip to form said digital logic function output.
6. A method for correlating a spread spectrum signal in accordance with claim 4, wherein said step of combining said spread spectrum signal with said digital logic function output comprises:
providing the exclusive OR of said digital logic function output and said spread spectrum signal to form said correlated data output signal.
providing the exclusive OR of said digital logic function output and said spread spectrum signal to form said correlated data output signal.
7. A spread spectrum data encoder for generating a spread spectrum signal from a data input signal comprising:
a digital function generator means, having an input terminal and an output terminal, for providing an output signal pattern which is a predetermined function of at least two prior values of an input signal applied to said input terminal of said digital function generator means;
-24- DOCKET NO. 1014 means for combining said data input signal and the output signal of said digital function generator to form said spread spectrum signal;
and means coupling said spread spectrum signal to said input terminal of said digital function generator.
a digital function generator means, having an input terminal and an output terminal, for providing an output signal pattern which is a predetermined function of at least two prior values of an input signal applied to said input terminal of said digital function generator means;
-24- DOCKET NO. 1014 means for combining said data input signal and the output signal of said digital function generator to form said spread spectrum signal;
and means coupling said spread spectrum signal to said input terminal of said digital function generator.
8. A spread spectrum data encoder in accordance with claim 7, wherein said means for combining said data input signal and the output signal of said digital function generator to form said spread spectrum signal comprises:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being connected for receiving said data input signal;
means coupling said output terminal of said digital function generator to said second input terminal of said exclusive OR gate; and -25- DOCKET NO. 1014 means coupling said output terminal of said exclusive OR gate to said input terminal of said digital function generator.
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being connected for receiving said data input signal;
means coupling said output terminal of said digital function generator to said second input terminal of said exclusive OR gate; and -25- DOCKET NO. 1014 means coupling said output terminal of said exclusive OR gate to said input terminal of said digital function generator.
9. A spread spectrum data encoder in accordance with claim 7, wherein said digital function generator further comprises:
means for storing individual chips of said spread spectrum signal; and means for logically combining at least two prior chips of said stored spread spectrum signal to provide said output signal pattern of said digital function generator.
means for storing individual chips of said spread spectrum signal; and means for logically combining at least two prior chips of said stored spread spectrum signal to provide said output signal pattern of said digital function generator.
10. A spread spectrum data encoder in accordance with claim 9, wherein said means for storing individual chips of said spread spectrum signal comprises a shift register having a plurality of stages.
-26- DOCKET No. 1014
-26- DOCKET No. 1014
11. A spread spectrum data encoder in accordance with claim 9, wherein said means for logically combining at least two prior chips of said stored spread spectrum signal comprises:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being coupled to the fifth previous chip stored in said means for storing individual chips of said spread spectrum signal and said second input terminal of said exclusive OR gate being coupled to the second previous chip stored in said means for storing individual chips of said spread spectrum signal.
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being coupled to the fifth previous chip stored in said means for storing individual chips of said spread spectrum signal and said second input terminal of said exclusive OR gate being coupled to the second previous chip stored in said means for storing individual chips of said spread spectrum signal.
12. A spread spectrum data encoder for generating a spread spectrum signal from a data input signal comprising:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate -27- DOCKET NO. 1014 being connected for receiving said data input signal;
memory means coupled to said output terminal of said exclusive OR gate for storing individual chips of said spread spectrum signal;
means responsive to said memory means, for logically combining at least two prior stored chips of said stored spread spectrum signal and for providing an output signal coupled to said second input terminal of said exclusive OR gate.
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate -27- DOCKET NO. 1014 being connected for receiving said data input signal;
memory means coupled to said output terminal of said exclusive OR gate for storing individual chips of said spread spectrum signal;
means responsive to said memory means, for logically combining at least two prior stored chips of said stored spread spectrum signal and for providing an output signal coupled to said second input terminal of said exclusive OR gate.
13. A spread spectrum data encoder for generating a spread spectrum signal from a data input signal comprising:
first and second exclusive OR gates having respective first and second input terminals and a respective output terminal, said first input terminal of said first exclusive OR gate being connected for receiving said data input signal;
-28- DOCKET NO. 1014 a shift register having an input terminal and a plurality of stages, said input terminal of said shift register being coupled to said output terminal of said first exclusive OR gate; and said first input terminal of said second exclusive OR gate being coupled to one of said plurality of shift register stages, said second input terminal of said second exclusive OR gate being coupled to a different one of said plurality of shift register stages, and said output terminal of said second exclusive OR gate being coupled to said second input terminal of said first exclusive OR gate.
first and second exclusive OR gates having respective first and second input terminals and a respective output terminal, said first input terminal of said first exclusive OR gate being connected for receiving said data input signal;
-28- DOCKET NO. 1014 a shift register having an input terminal and a plurality of stages, said input terminal of said shift register being coupled to said output terminal of said first exclusive OR gate; and said first input terminal of said second exclusive OR gate being coupled to one of said plurality of shift register stages, said second input terminal of said second exclusive OR gate being coupled to a different one of said plurality of shift register stages, and said output terminal of said second exclusive OR gate being coupled to said second input terminal of said first exclusive OR gate.
14. In a spread spectrum communication system including a spread spectrum signal having data modulated by a spread spectrum spreading code sequence, a data correlator comprising:
a digital function generator means, having an input terminal and an output terminal, for providing an output signal pattern which is a -29- DOCKET NO. 1014 predetermined function of at least two prior values of an input signal applied to said input terminal of said digital function generator means;
means coupling said spread spectrum signal to said input terminal of said digital function generator; and means for combining said spread spectrum signal and the output signal of said digital function generator to form a correlated data output signal.
a digital function generator means, having an input terminal and an output terminal, for providing an output signal pattern which is a -29- DOCKET NO. 1014 predetermined function of at least two prior values of an input signal applied to said input terminal of said digital function generator means;
means coupling said spread spectrum signal to said input terminal of said digital function generator; and means for combining said spread spectrum signal and the output signal of said digital function generator to form a correlated data output signal.
15. A spread spectrum data correlator in accordance with claim 14, wherein said means for combining said spread spectrum signal and the output signal of said digital function generator to form said correlated data output signal comprises:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate -30- DOCKET NO. 1014 being connected for receiving said spread spectrum signal;
means coupling said output terminal of said digital function generator to said second input terminal of said exclusive OR gate; and means coupling said output terminal of said exclusive OR gate to an output terminal for receiving said correlated data output signal.
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate -30- DOCKET NO. 1014 being connected for receiving said spread spectrum signal;
means coupling said output terminal of said digital function generator to said second input terminal of said exclusive OR gate; and means coupling said output terminal of said exclusive OR gate to an output terminal for receiving said correlated data output signal.
16. A spread spectrum data correlator in accordance with claim 14, wherein said digital function generator further comprises:
means for storing individual clips of said spread spectrum signal; and means for logically combining at least two prior chips of said stored spread spectrum signal to provide said output signal pattern of said digital function generator.
-31- DOCKET NO. 1014 7. A spread spectrum data correlator in accordance with claim 16, wherein said means for storing individual chips of said spread spectrum signal comprises a shift resister having a plurality of stages.
18. A spread spectrum data correlator in accordance with claim 16, wherein said means for logically combining at least two prior chips of said stored spread spectrum signal comprises:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being coupled to the fifth previous chip stored in said means for storing individual chips of said spread spectrum signal and said second input terminal of said exclusive OR gate being coupled to the second previous chip stored in said means for storing individual chips of said spread spectrum signal.
-32- DOCKET NO. 1014 9. In a spread spectrum communication system including a spread spectrum signal having data modulated by a spread spectrum spreading code sequence, a data correlator comprising:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being connected for receiving said spread spectrum signal;
memory means coupled to said first input terminal of said exclusive OR gate for storing individual chips of said spread spectrum signal;
means responsive to said memory means, for logically combining at least two prior stored chips of said stored spread spectrum signal and for providing an output signal coupled to said second input terminal of said exclusive OR gate.
-33- DOCKET NO. 1414 ?0. In a spread spectrum communication system including a spread spectrum signal having data modulated by a spread spectrum spreading code sequence, a data correlator comprising:
first and second exclusive OR gates having respective first and second input terminals and a respective output terminal, said first input terminal of said first exclusive OR gate being connected for receiving said spread spectrum signal;
a shift register having an input terminal and a plurality of stages, said input terminal of said shift register being connected for receiving said spread spectrum signal; and said first input terminal of said second exclusive OR gate being coupled to one of said plurality of shift register stages, said second input terminal of said second exclusive OR gate being coupled to a different one of said plurality of shift register stages, and said output terminal of said second exclusive OR gate -34- DOCKET NO. 1014 being coupled to said second input terminal of said first exclusive OR gate.
-35- DOCKET NO. 1014
means for storing individual clips of said spread spectrum signal; and means for logically combining at least two prior chips of said stored spread spectrum signal to provide said output signal pattern of said digital function generator.
-31- DOCKET NO. 1014 7. A spread spectrum data correlator in accordance with claim 16, wherein said means for storing individual chips of said spread spectrum signal comprises a shift resister having a plurality of stages.
18. A spread spectrum data correlator in accordance with claim 16, wherein said means for logically combining at least two prior chips of said stored spread spectrum signal comprises:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being coupled to the fifth previous chip stored in said means for storing individual chips of said spread spectrum signal and said second input terminal of said exclusive OR gate being coupled to the second previous chip stored in said means for storing individual chips of said spread spectrum signal.
-32- DOCKET NO. 1014 9. In a spread spectrum communication system including a spread spectrum signal having data modulated by a spread spectrum spreading code sequence, a data correlator comprising:
an exclusive OR gate having first and second input terminals and an output terminal, said first input terminal of said exclusive OR gate being connected for receiving said spread spectrum signal;
memory means coupled to said first input terminal of said exclusive OR gate for storing individual chips of said spread spectrum signal;
means responsive to said memory means, for logically combining at least two prior stored chips of said stored spread spectrum signal and for providing an output signal coupled to said second input terminal of said exclusive OR gate.
-33- DOCKET NO. 1414 ?0. In a spread spectrum communication system including a spread spectrum signal having data modulated by a spread spectrum spreading code sequence, a data correlator comprising:
first and second exclusive OR gates having respective first and second input terminals and a respective output terminal, said first input terminal of said first exclusive OR gate being connected for receiving said spread spectrum signal;
a shift register having an input terminal and a plurality of stages, said input terminal of said shift register being connected for receiving said spread spectrum signal; and said first input terminal of said second exclusive OR gate being coupled to one of said plurality of shift register stages, said second input terminal of said second exclusive OR gate being coupled to a different one of said plurality of shift register stages, and said output terminal of said second exclusive OR gate -34- DOCKET NO. 1014 being coupled to said second input terminal of said first exclusive OR gate.
-35- DOCKET NO. 1014
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US28432488A | 1988-12-14 | 1988-12-14 | |
| US07/284,324 | 1988-12-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2005323A1 true CA2005323A1 (en) | 1993-10-07 |
Family
ID=23089769
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002005323A Abandoned CA2005323A1 (en) | 1988-12-14 | 1989-12-13 | Sequential correlator for spread spectrum communication system |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2005323A1 (en) |
-
1989
- 1989-12-13 CA CA002005323A patent/CA2005323A1/en not_active Abandoned
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