CA1321508C - Multiplexer circuit - Google Patents

Multiplexer circuit

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Publication number
CA1321508C
CA1321508C CA000599320A CA599320A CA1321508C CA 1321508 C CA1321508 C CA 1321508C CA 000599320 A CA000599320 A CA 000599320A CA 599320 A CA599320 A CA 599320A CA 1321508 C CA1321508 C CA 1321508C
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CA
Canada
Prior art keywords
capacitors
devices
switching means
paths
tho
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA000599320A
Other languages
French (fr)
Inventor
Walter Scott Bartky
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xaar Ltd
Original Assignee
Xaar Ltd
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Filing date
Publication date
Priority claimed from GB888811458A external-priority patent/GB8811458D0/en
Priority claimed from GB888830397A external-priority patent/GB8830397D0/en
Application filed by Xaar Ltd filed Critical Xaar Ltd
Application granted granted Critical
Publication of CA1321508C publication Critical patent/CA1321508C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/07Ink jet characterised by jet control
    • B41J2/075Ink jet characterised by jet control for many-valued deflection
    • B41J2/08Ink jet characterised by jet control for many-valued deflection charge-control type
    • B41J2/085Charge means, e.g. electrodes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2202/00Embodiments of or processes related to ink-jet or thermal heads
    • B41J2202/01Embodiments of or processes related to ink-jet heads
    • B41J2202/10Finger type piezoelectric elements

Abstract

ABSTRACT OF THE DISCLOSURE
A multiplexer circuit for effecting, in successive phases of operation, actuation of selected ones of respective groups of a plurality of capacitance actuated devices electrically represented by a plurality of series connected capacitors, each device corresponding to an adjacent pair of the capacitors. The multiplexer includes a signal generator and a plurality of parallel electrical paths connected thereacross.
Each path includes the common node formed by the capacitor pair corresponding to a respective one of the devices and first and second switches. A logic circuit is initially operable for respectively closing and opening the first and second switches of a selected path in one group and respectively opening and closing the first and second switches of the paths adjacent thereto for charging the two capacitors connected to the selected path. The logic circuit is subsequently operable for respectively opening and closing the first and second switches of the selected path for discharging the two capacitors to effect actuation of the device corresponding to the charged and discharge capacitors.
The voltage level to which the capacitors are charged is controlled based upon the operation status of adjacent devices of the same group.

Description

~D~
~ he pre~ent Invontlon r~l~tes to mult~plAx~r o~roulta ~or ~f~ootlng in auocesslvo phnsos o~ opcr~tion eot~aSlon o~
seleut~d oapaoltnno~ aotu~ted dovlco3 ~rrang~d ln respeotlve groUp~
One cpplic~tlon of suoh a ~ulSlplexer olroult la pul~ed droplot dopc~ltion ~pp~ratus, ~uch ~s a drop-on-dsmond ln~
Jat ~rlnter h~vlng an arr~y Or oh~nnals ~ro~ whloh ln~ dropl~ta ~oTqr~5~ t In auoh a dovla-, ths ink ch~nn-ls ~y ~e ~rr~n~c~
ln 6roup~, o~snnel8 rro~ the rospoctlve ~roup~ bolng selooted for prlntlng droplat~ ln suooess~ ph~s-s of oper~t~on of the ~ultiplexer olroult In so-~allet drop-on-de~snd print~r8, the aotuatlng o~roulb4 ~re requlr~d to handl~ sub8tan~1 currants whloh ~lv~ rlo~ to the rls~ Or burn-out fallure Fur~her, ln known rorms o~ puloed dro~let lnk ~t prlntera, ~witohln~ Or ~ho l~r3e ~otuatln6 curront~ t~plc~lly ~lv~s rlso ~o axoo~slve radlo ~r~quenoy lnter~ereno-Ob~-ota o~ tho Invontlor It 1~ th~rerore o basio obJsot of en~ pre~ent invention ~o provlde an l~provo~ ~ctuatlng oiroult for a pulsed droplet dapc~ltlon a~pur~tu~, 3uch 3 a drop-on-demand ink ~t prlntcr It la ~ ~ore spec~rlo obJoot o~ the lnventlon to provida ~ ultlplex~r aotustlng clrou~b ~or ~ dropl~t d~posltlon eppArs~u~ whloh operDtai~ usln~ onlY rel~tlvsly low pow~r ~ t is a ~urthor obJaot of t~ ln~ontlon to ~lnl~lzo thr ore~lon Or r~dlo rreqUonoy lnterrereno~ in ~uch n aotuntln~
o~rou~t ~ ho ocbuatln~ clrcuilt ~or ~ droP~on-te~nd ink J~t prlnter Or tho typo re~errcd to nbove ~oy be repre~ontod ~y -plurallty o~ oor~o4 corooted o~paoltors, tho ~oeuotlng ,' 3~

1 32 1 50~

~l~O~I~Ode~ of ~ lnk ohann~l ~ormlng, t~th~r wlth tha olootrodes o~ tho channol~ dlopo40d on tho opposlte olde~
theroo~, a pcir Or ro~poctlv~ napaaltors. Sho oh~nne~ ~ay bO
uct~ated In 8ro~P~ by suooesslv~ly dl~ablln8 ~ll but R oCloCtQd group of oh~nnols, ~hereln ~ reapeoti~e ohannel 14 d~o~bled by pplyln8 zero potentlal to the oo~on node b~twoen lta two o~soolaSed oapaoltors. A oh~nnel wlth~n tho non~dl~ablod group ~ay ~e aatuated bY ~pplylng ~ pooleias potentlal to th~ 003mon nod~ ~otweon lts two ~oclat~d oapa~i~tor~
~ he pre3ent inventlon providea ~ multiploxer olrauit ~or operatlon in the rore~oln~ ~ode and ln ~ooordanoe wlth the ob~c~ ~ta~ed abov~. Th~ mult~pleXor clrcult comprlses d ~erles ot par~llel oleotrl~cl pathl connoctoidn ~r~ Wltlh ~lo ~n~r~tor eaoh p~th lnoludlnt a re~paotlv- on~ of oald oommon nod~. Flr~t snd ~3aond ~itohln~ ~ean~ ~re dlspo~od in ~3ch psth and ad~ptod to bo o~-ratod by roopective lo~la slgnals ~ th~t, when tho ~ir~t and ~eoond swlt~h~ng ~o~ns o~ one pnt~ ~re respeotlYely olo~-d and opon and the rlrst ond oooond ~wltohlng ~e~ns Or oaoh Or t)l< p~tha on r~oDeotlve opposlte sld-~ o~ tho ono Poth ~ro ro~peotlvoly open and alosed~ oh~rglng of th~ t~o capanitor~
3aaoclatod wlth ~ho ono pQth tako~ place and wh-n, thor~rtor, tho flrat and acoond awltchlng ~ean~ Or the one path ~ro ro~pootivoly open snd olo~ed dl~harge o~ tho capecitors conneat6d to tho one path take~ place) thcroby ~otlvatln~ tho lnk ohannel oorre~pondlng th-reto. Th~ volta~o lovol to whloh the oap~cltor~ ~ro oh-r~od $~ prorerablY dopend~nt upon tho prlnt rt~tu~ ~t adJaoent obannal~ o~ t~e s~m~ 3roup.
Pr~forab1y, In ~aoh ph~o o~ opor~ion thc copacltors dotlnin3 tho dovloo~ s~loct~d ror rotuation ~r~ oh~r30d ln an lnltlal part ot a voltag~ wave~or~ ~npp~lod ~ro~ tho ~gnal gen~retor aft~r whlch tho ~l~n~ ncr~tor 1~ dl~oonneot-d tro~

the circuit for a further interval of the waveform prior to discharge of the charged capacitors. Preferably, the signal generator and the parallel electrical paths including the first and second switching means are formed in a sil;con chip integrated circuit.
,Brief Description of the Drawin~s S The foregoing objects and other advantages of the invention will be apparent on reading the following description in conjunction with the drawings, in which:
FIG. 1 illustrates a cross-section of an ink jet printhead having shear mode wall actuators as described in U.S. Patent no. 4,887,100 entitled "Droplet Deposition Apparatus" and assigned to the assignee of the present invention;
FIG. 2 illustrates one embodiment of a two phase multiplexer circuit according to the invention connected to the shear mode actuators of the printhead illustrated in FIG. 1;
, FIG. 3 illustrates a further embodiment of a two phase multiplexer circuit for use with the shear mode actuators of FIG. 1; and FIG. 4 illustrates a preferred voltage waveform for operation of the ; ink jet printhead of FIG. 1 employing the circuit of either FIG. 2 or FIG. 3.
Description of the Preferred Embodiment Referring to FIG. 1, a part of a print module 10 of an ink jet printhead 12 includes a multiplicity of closely spaced drop-on-demand ink drop ,' ejectors disposed side-by-side in an array. The ejectors comprise extended parallel channels 20-28 filled with ink and separated by piezo-electric shear mode wall actuators 30-39, such as are disclosed in the previousb mentioned patent.

,~:

'' ~ 3 , ;~ B
. ,,,,.,,~, ,, Tne lnl~ ah~nnel~ 20-Ze h~re eleo~rcdea ~ no~ln~ ~n~
walls of oaoh ohannal, whioh provlde ootu~tlng eleatrodo~ ~or tho wall aotu~60r~ 30-39 ~nd whlch, to~ether wlth tho w~ll aetU~tora etteatlvaly ror~ a plut~ y Or sorlo~oonn~otod c~p~eltor~ 50-58 In P~rtlculcr~ ~he elootrodo~ as~oolated wlth e~oh ohannol, together wlth tho ~laotrodas Or tha oh~nnals ~14posa~ on tha opposlto ~lde~ thercor, for~ r pclr ot capnc~tor~ hcvlng a oon~on note therebet~e-n ~or ~otuatln~ tho rospootlv- oh~nnol Tn~
oo~on node as~oolated wlth eaoh ohennel 13 oonneotod Yla ~ track 70~7~ to a re~peotlve eer~ln~l 60-68 o~ ~ slllcon chlp int-gr~t-d olroult d-norl~od ln ~oro det~ll herelnorter As exploSned in the rererent oopendine app~lcatlon, the lnk Jootor~ ~ro dlvld~d soparately Into two ~roups ot odd ~nd ~ven nu~berod ohannols, ~lth ~oleoted cb~nnels ln tbe odd ~nd oven nu~bored group~ bolng aotu-tod In ~ltornAtln~ cycle~ In a ; tYploal oYole~ ~he obennala ln one 6rouP ~e t tho eYen nurb~red chflnno~ re di~bled by holdln3 th-lr olectrodos ~t aroun~
potsntlal wh~le seleoted ohannels In th~ odd trouP ore ~otuated tor prlnt~n~ by applylnt an approprl-t- volt~ w~veror~ to thelr lootrodos ~ ~On~ o~bodI~ont o~ e olultlpleYor drlve oirau.t Rooordln~
to ~he invont~on l~ ~llustrated ln FI~ 2 A nlgnal tener~tor 100, pro~ldod ln ~ slllcon chlp lntegr~t~d olrcult 1C1 (pr-ter~bly oohprl~ln3 a bl-cMb8 do~l~n~, o oonnooted aoross p~lr ot lntornal bu~e~ 10~ and 103, b~ 102 beln~ oonneoted to the ~o~ltlve ou~ut ter~ln~l o~ ~lgn~l ~en-retor 100 and bun 103 to t~e negativ- output torolnal thereo~, whlch l~ held at ~round potontlel 3~tw~on th~ bUseJ 102 and tO3, thar~ ~r~ provld~d a plursllty Or par~ l eleotrical path~ resp-otlvoly eosooi~tod wlth ~h- ~tu~tor ohonnolo~ ond o~ whloh only p-ths 113 to~ 117 are Illustr~tet ~-th~ 113-t17 lnolud~ ter~ln~l~ 63-67, . . .

,: ' ' , respootiv~ly. ~ ~xplained ~bove, oaoh Or th~ tor~lnnl~ 63-67 i9 dirootlY ooupled to and th~re~oro repro~nt~ thc com~on nodo for~ad betweon the oapaol~or palr ~ssoolAtod with a r~9~0tl v~
one of the lnk oh~nn~ls 23-27.
A plurallty o~ rleld e~ect tran~iator ~FET~ d~lcs~
123-127 ~ra oonneotcd beSwoen buS 102 and tor~ln~l~ 63-67, oaah ln ~ rqopootlve path 113-117. Each FET 123_127 ln~ludes a 3ate elcctrode ~or reoeIvin6 lnternal'y gan3r~ed lo~io si~n~ls for opcr~ting tho daYloe a~ hnreina~tor dea&rlbed.
~ etwa~n t~r~inal~ S3-67 and bus tO3, path~ 113-117 res~ootlvely oo~prlse the oolleotor-emltter paths of n-p-n bipol-r transl~tor d~vlc-s 133~137. The b~-e~ltt-r p~th~ o~
t~nalstor~ 133-137 reopaot~vely lnoiud~ FET~s 143-1117, oooh hu~ln8 a gato olcotrode for rocnlvln~ ~n Intarnally gener~t~d loglc ~lgnsl rOr oparatln3 th~ devioa. Th~ &olleotor-e~lttcr p~th3 o~ tr-nslstors 133-137 ~r~ ~unted ~v n~8p~0tlve ~T'~ 153-157, tho 6ate ol~otrodQs o~ whloh ar~ ~onnoet~d to the ~ot~ el~atrodos of ~ET's 143-1~ oo that tha~e devlcos ~re operrtcd by ~ho same lo~io ~len~l~ th~t operat- FET~s 143.147.
FYS'~ 153-157 ~ro the~elve~ raspeotlY~ly shuntod by dlode3 163-167 whloh provIdc onp~cltor dischsr6c pdth~ ag hereinaft~r d~orlbed.
I Tho lo~lc 81~n913 ~or effeotlnR end tor~lnatln~
oonduotlon or tronslotor~ 123~127, 143~147 cnd 153-157 are aupplled ~ro~ reglsters 173~1T7 of ~ loglo blook t7B. Lo~lc ~look 178 is supplled wlth pr~nt p~ttorn data on e llne 1~9 ~nd wLth rol-~lvoly hle~ ~r~qll~nny olook pulse~ on a llne 180. ~h-oloa~ pulsa~ rroo lln- 180 aro ~180 ~uppllod So ~anerator 100, whloh l~ sl~o aonn~ctod to o olook Ilne 181 on whloh ars ~u~pli~d rolativoly low ~roquenoy olock pu1~5.
~ ho dats ~trca~ ~uDDllod on llne 179 ao~prlsos an U b~t p~ttorn up~ d to oso~ ahlp o~ the printho~d, ~hore N is tha nu~er os~ ~h~dH~lJ to ~IhlQh t~l~ chlp 10 oonnto~. Th- N blt D-ttern det-r~ln-J in ono oyclo whloh of th~ oh~nn-lo Or tho ov~n nu~bcrcd obannol group ~r~ to be ootu~ted ~nd, ln o fol lowlng oyale, whloh o~ tho ohannol~ o~ tho odd sumbor-d channal group are to b- ootuat~d. ~hO N blt data 3tronn ~ddltlonoily oontaln~
aub~et~ n ot' d~tu ralatln~ to tho prlnt statul Or ch-nnol~ o~ the ~ane erouP e9 ~hooa ~l-oted t'or actu~tlon o~ oppo~lto si~o- of ~oh Or th- ~ul~oted ohannol3 ~nloh ~ro to ~ notuatrd. Tho data ou~et~ n o~y be rOur blt words in whlch oaao they glve tho pr~nt t~tUo of t~o chann~ls o~ the 9~ gro~p a~ th- s~l-otod oh~nnal~
on aaoh slde o~ each oh~nnel ~el~oted ~or aotu~tlon. I~ the dnta nets n rre ~n the ~or~ ot alY blt word~, they glve the prlnt fltatu~ o~ thr~e ohannelo on each ~ldo of eaoh oh~nnal which lo to be eotuot~d .
Upon oo~pletion o~ o prlRt l~ne and be~ore the noxt pul~e on line 181 1~ supplled to ~lgnal ~en~rator lO0, tha d~t~ N
wlth lt~ Jub~t~ n 1~ lo~dod Into regl~tcr~ i73-177 vl~ lln- 179 at the rote ~ct by 'Gho clook pul~eJ oP line 180, prof~r~bly about 10 HHz. The tata sot~ n ore oane to n look-up tablo in a ROH
tnot ~hown) whlch o-nds dleltal algnclo roapectlv-ly deter~ned by the dat~ ~e~ n to fo~tcr~ 1~3-177, ~hloh ~nal~ ~re ~tored In th~ rogl~ters ~nd e~ploged to deflno e oount o~ pU~JOS on llne 1~0. The ooUn~ deter~lne~ the lovel Pr oherglng o~ the o~p~oltor~ Or -~h ~otuot-d ch~nnol.
Tho voltage cyolos ~ppllod by ~18na~ genor~tor 100 eoross buJee 1~2 ond 103 aro Lnltletet by the puloo~ on clook ~n~ 181. Upan lnltl~lon Or oaoh ~uoh cyole the dst~ stor~t ln r~gl~ter~ 1?3~177 ooloct~ ~or prlntln~ ooleoted ohonnels o~ one ot tho oh~nnol grouvo by ~wltchln~ on tran~lstor~ 123-127 ~nd ~ltohln~ o~f tranolotorr 143-147 o~ th~ sel-oted ohonnsl~. As oxplaln~d horclnattor~ thL~ ro~ult~ ~n charslng o~ tho ocpaoltor3 I ~ Z 1 5 0 ~
Or t~ s~leot~d ahonne1~ ~hargln~ io ~ubsequently tcr~n~ted by ~wltohlng o~ tr~nsl~tor~ 123-127 Or t,~o seleoted 4~nnn~16 whon the char~int voltu~e t~Y-loped ocro~ the ~socl~tod oap~oltor~
r-~oh-~ o vslue oorre~pondlng to th~ oount detor~ln~d by the dl~l~al ol~nels ~torod ln tho re~p~ctlv- re~l~terJ t73.1t7 It wlll bo appr~late~ th-t the regl~tors Or soh o~ the eno ohannelo o~ module~ ~akln~ up th~ printhead r-ael~e ~ubs~ts n ot blb~ fro~ the ROM whlch provlde tho prlnt ~tatu~ ot ~d~o~nlng ah~nnolr ~p4nnln6 thc butted re~lon ot tho module ln whlch the ond ohannel ~onoorned ls loosted ~nd tho adJolnln~ module, ~ n aoaord~noe with the torogolP~, cros~-tolk due to ohonnel wall oo~ptlanoe, l.e the ttoct ln ~n ~c~u~tod ohonnel of pressures ~xistlng ln neighborln~ ohennel~ c~n be co~pon~-t-d ~or eleotrloally. Thl~ 1~ aohiov~d as d~Jorlbed a~ov~ by chargln~ the o~p~cltor~ Or cach ~olectod channcl tor ~ tl~e perlod to provlde ~ voltage level aoross th~ c~pacltorr depondont upon tho ~o1eot0d or non-~elootod ~t~tus Or ~ nuober ot ad~aoent oh~nnol~ of tho ~roup contaln~ng th~ ~al~ct-d ohann~1, In partlcular, the l~ol o~ tho ohar41n~ volt~go o~ a se1~oto4 ohannel 1~ preter~b1y dlr~otly related to tho number or od~aoent ohonnol~ Or th- acmo ~roup ~e1eotod ror aotuation FI5 ~ Illustratos the w~vo~or~ ~rovldad by ~ign~l ~aner~or 100 to ensrgl~o the actu-tor woll~ 30-39 durin~
~uooeo~lve pho~eo o~ tho mu1tlpl-xor elroul~ of FIG. 2 Tho wovo~Orm con~l-t~ or a oh-rgo porlod r1 durLng whl~h tho oh~r6o on oOlOct~d one~ Or the o~paoltors 52-S7 gr~uslly rl~o~ to prod-ter~lnod v-1u-~ rOr aoh ~eloot-d chonrcl o~ tho a¢tlve ~roup. Jne oapooltoro aro then dl~oonnoot~d fro~ tho ~Ignal ~oneretor ond ro~oln ~t or ~ub~tan~lslly at th-lr oharg~d volt~e lov-~ tor ~ rurthor llhold" porlod SZ Durlng porlod ~Z tho ol~nel vo1t-6~ qu1ntalned at loaJt ot thc 10vol cr the chor~ volto~o ~ Jhoun, tho ~l~nol vo1tr~o durln3 perlod S2 19 , j ~ 7 f t 32 1 508 ~llow~d t~ tlr~t rlJo ~bo~e ~nd ~t ~t cnd ~ ~ho perlod ~0 return to the oh~rge volt~e. A~ter the porlod T2 tho ~13n~1 volta6e fall~ to 2vro to ~natl~ raoonn-otlon Or thc sl~nal ~oner~tor to the c~,oaoltor3 rOr the next phese of oper~t~on.
~erore that oo~menoaa a rapld dlsoharge of the chsr6ed 09pacl~0r5, as her~lna~tor de~orib~d, 1~ e~t~ato~.
In ~h~ ohar6e porlod ~1, the woll actu~tor olootrodes o~
salaoted ch~nn~l~ of, ~ay, tho o~d nu~borod channola 2t~2~ aro onorgl~od to o~u~ the wall aetu~torA to d~orro outwsrdo troo the ahbnnel~ lnto a aho-~ron or oantllever ~or~ ~ dR~or~b~d ln the r-rerent ~opending patcnt opplloet~on dua to tho ohar~o volta~o lln4 ~h~ nt.~n o1' p~lar~zDtion of tho wall cotu~tor~. Thc rotc Or ris- Or vo~ti6o 1~ howev~r gradual so th~t tha ma~n~tudo Or tho ooou3tia wavo~ for~d in tho ~n~ ch~nnol~ only ~lldly di~turbJ th~ lnk n~onl801 In the c~eotlon noozlo~ ot` th~ ahann~ls and 19 nat Ju~flo~ont to oJoot drops Or lnk from the no~21es o~
t~o avon numbcrqd channel~ adJaoont the actuated odd na~bcrcd oh3nnol~. ~he oharga p~rlot Sl axooad~ th~ ti~o of trav31 Or aaou~tla wnvo~ ln tho cctuatod ohannol~ so that T1~L~C, where L
l~ the oh~nnel length nd C $~ the aoou~tlc wave voloolty ln the oh~nnals .
~ urln~ tha hold perIod T2, ~urther lnk I s drawn into the ootu~tod odd nuohor~d o~annels by thG a~tlon of the ocoustio ~ve~ ~nd thl~ a2usos tho ohannel woll aotuators to rel~x outw-rdly ~ th~ ~nlt quantlty ln tbe ahannols ~ncrense~. Arter 'cho hold porlod T2, typloally ~bout l,~C, th~ pres~ure Or lX In the l~aleotod ohann~ls ls a ~oxl~ ond tho o~pao~,tor~ Or those ohnnn~ re then r~pldly di8char~0d to cnuoo rap~d Inward ~o~e~ent Or the channol aatuotor wal l9 whLo~ ~n~rat~ pr~Ur~
w9v~s ln tho ool-otod ohann0l~ oausIng eJ~lctlon o~ an lnk drop tro~ tho noz~le~ of tho~e oh~nnel~. Atter roplenl~h~ent Or lnk ln tho ohann-l~ rrO~ whioh ink dropieJcctlon h~o tokon p~aoe, the next ph~e Or opor-tlon 1~ o~f-ot~d on s-looted ~ven numberod ohnnn-l~ by ~ ~urther ~l~n~l phose c~ tha ~ltnnl ~onorAtar Tho d~tolled opor~Slon o~ ~ho drlve olrou~t o6 FI0 wlll aow ba d-sorib-d In tha qu~e~oont ~tste ot tho clroult, ~E~c 1~3-147 ~nd FET~o 153_157 nro all h-ld ~n ~ oonduotln~
oondltlon ln r~spcn~o to lnt~rnollY t~n-rated 108io ~l~nal~
appll-d to tholr 60te eleotrode~ At th~ ~v~e tl~, FE~I~ 123-~27 aro held in a non-oondu¢tln~ oontltion A~sumln~ now th~t ohannel 25 1J ona of the BrouP ot odd nuo~ered oh~nn0l~ to b-otod rOr actlvoblon, at the co~onoo~nS Or the oh~rgo porlod T1 or th~ nel rror~ the Jl~nel gonor-tor lOC, whloh 1~
inlti~tvd ~y ~ Ul~ on lln~ 181, FtT t25 ls r-nd~red oonduc~lve by on lnternally ~-nor~tod logl¢ Jl~n-l ~pplled to lt~ 8~te ~y r~ t~r 175, whllo FETI~ 124 end 126 ~re rend~rad non-oonduatlvc tor dl~-blln8 tho corr-~pondlng avon nu~b-r-d ohannela lloo, th~ nol ~t tho ~at~ otrodor o~ FET'a 145 and 155 ia removed to r-ndar tho~ devlcos non-oonduot~na Copaoitor~ 54 and 55 th-ro~or-, rcl~tlvoly clowly, charge to th- pr-d~t-rmlned volt~e durln~ tho cher~ perlod T1, tho pr~dot~r~lned volto~e b-~ng drt-rmlnod by th- Jltn~l tro~ tho ROM J~or~d in r-gl~t-r 175 ~h- ohargln~ p-th tor capaoltor 54 oo~pil~o~ ~ET'~ 125 ~nd 154 and th- oharglng poth tor oap~c~tor 55 co~pr~a~ FEr ~ 125 ~nd 156. Tho aotu~tor wall~ 35 4nd 36 ot oh~nnol 25 ~ccordlngl~ ~OVQ
out~rd~ to llo~ lnk to ~low Into thRt channol ~ec~u~e o~ th~
low r~t- o~ oh-r~o, no lnk drop~ ~ro -~xPelled rrO~ the rdJoinln~
ohannel~
Durln~ tho hold porlod T2, the lo~io slgnal apDllsd to rsT t25 lo turn~ ot~ dl~40nnootl~ th~ ~otuatoro trom th~ drlvo Jl~n~l 8enarot-t by slgn~l ~ontr~tor 100 Flrin~, th-t la to, ~-y, tlJah~r~e Or oapsCltOrJ 54 ~nd ~5, l~ lnlt~atod at the cnd Or hold p~rlod T2 ond l~ ~f-ot~d by .
, 9 ,.

f' ,_ ,,,,, . ., _ , ~plyl~8 ~ 31gn~1 ~rom rea1~t~r 175 (~ter ~ predo~er~ln~d coun~
o~ pul~oa on llna 180) t~ th~ ~tc ol-otrodao o~ FE~J 145 ~nd 155 rendorln~ ~Ipolsr tran~lseor 135 oonduotlvo ~bl-o~tobli~heo ~ dl~ohar~o p~th ~or c~p~oltor 55 oonpr~4~na tronsl~tor 13S and dlod~ 166~ Al~o~ 9 dl~ah~rg- path ~or oapao~tO~ ~4 ~o ~ t~ UO~Pt~ trdnsl6tor 135 And dLod~
164. Al~hou~h durln~ dl~ch~r~o bo~h FET'~ 145 and 155 are oonduotln~, b~o~use or th- rol~tivo r~lst~no~s o~ blpolar tron41stor 135 ~ad FET 155 no~t ot eh~ dl~oh~r~o currcnt rlow~
throu~h trrn41~tor 135 It w~11 bo not-d th~t th~r- ls no ~o~on ground ~lroult through ~hS~ tho dl~,~har~e ourrant3 are su~ed n~to~ tloch~r81ns thc pie20~010ctrlo aotuntor~ ln olroult~ ln whlch th- l~pul~iv~ ~drlve or dl~obsr~) ourr~nt~ are routed 1 oo~on return loop, whlc~ oro ~o~only u~d ln prlor art lnX Jot drl~ ~y-t-~, olroulta to nnnd10 ~ory subatontlol oUrrcnt~
(64 or 12~ x 100~a~ hnYe to bo conotruot-d Suc~ ourr-nt ~ngnltud-s wlth ~r-qu-nt oepratlon pro~-nt a aut4tonelol r~sk o~
burn-ou~ ~alluro It w111 bo notod ehot the tl~oh-rge ourrenta of oapaoltoro 54 ~nd 55 ~low throu~h tranJlotor 135 ~nd dl~lds egu~11y betwoon dlodoa 164 ond 166 ond thot tho8e rolat~vely hi~h dl~oh-r~- ourr~nto tlo~ ro~peo~ivo1y In clockwlre ond oounter-olock~lro pe~h~ ~o th-t the ol-otro~gnotlo ~tfocts thoraor tt-c~lvo1y o~noel thu~ ~lnl~izSnB r~dlo tro~uoncy lnt~r~-r-noc ~n-other word~, ~h- dlJ~h~rgo aurrontJ ~low and ro~rn ln p0r~110l olo~-ly ~p~ood tr~o~4 in dSpolo paSr~, ln whlch tho ~a6netSo tl~ldo ~ro~ the diaohoreo currenta ~ub~tantl~lly oanc~l ThSs r~tuco~ tho ~gnitudo o~ ~otnotlc r-dl~tlon to bo exp~cted vory ~lgnl~So~ntly co~porod ~lth eh~e ~onor~t~d in co~r~n ground rc~urn ~oop clrou~t~
Tho h--tlng orroot o~ ourrant In oircuSt 101 1~ l~r~olY

conflned to th~ capaoltor dlschar~e ourrent~ and thcretor~ to t~o turn on tlne Or blpolar tr~n~iatoro 133-137, whlch typloDlly la~to obout 30 nano~acond~ Also, typla~lly, dl~oharg~ o~
~paoltor ~4 ~nt 55 tnke~ plaoe ln about 2 ~lorosooond6 oausln~
ourrent~ typlo~lly on ~he order o~ obout 100~A ~nd rcoultin~ ln rapld roCurn o~ tho aotu~tor well- of ohannel 2S to tholr r~ ed posltlona there~y d~Yeloplng lnk drop a~cotlon pronsure in ohannel ~ Sl~ilar dlooharte~ ~lrln~ ll tha odd nul~-r~d chann-l~ actlvated ln tho ~a~c ph~40 Or the oporatlon tokoo plaoe st the so~o tl~e es tho d~Johar~- o~ c~paoltoro S4 and S~ ~n the next cycla of oper~tlon, tho ~e~ lta3e wuv~for~ i~ appl~cd to the el~otrod~ o~ the wall~ Or the cvon nu~bered channelo aoloot~d for actuatlon, th~ actuotor~ of tho odd nu~b~r~d ch-nncls beln~ dlo~bled by ~h~ttLn~ Or~ FE~'~ 123-127 a~ooclated thoro~lth It wlll bo ob~erved th~t enoh ohannol Ln both tho ~vcn on~ otd nu~bor-d groUp~ 1B oporoS~d wlth voltxgo ~6n~l~ Or th~
~a~o ~olarlty, ~hloh con bo ~olootod occordin~ to the polln~
dlreotion ot tho oerv~io ln the plozo-oleotrlu ootuatcr A drlvo chl~ ha~ln~ e nlngle polerlty of drLvo clroul~ o~de up o~ only, ~or x-~ple, p~yp- oo~ponento lo leo~ cxpenaiv~ ln con~tructlon ~han a blpol~r chlp wh~ro both p and n type sr~ re~ulrod. lt wlll olao bo ob~orYot th~t th~ oonn~ot~n~ trook~ 70-79 ~olnlrB
tho drlve olroult to th- ootuator~ hsv- a den6lty of ono trnc~
per In~ ohonnel, do plt~ th~ ~aat thst tho two ~u~tor~ ~h~t opervto -oh ohonnol h~v~ throe drlvo traoks oonnootod to op-rato tll~l~ TIIU~, ru~ Jt~plo~ ul1allnel ~S oonn~et~ ~lth ~ho dr~v~
olroult by way o~ trnok 75 but the satu~tor ~al 18 ot thet ch-nn~l ro~ulro trook~ 74, 75 ond 76 to opor~te ~bo~
F~0, 3 ~how~ ~ rr~ont o~ an altornatlv~ ~bodl~nt ot ~ ~ultlploxor olroult ~ooordln3 to tho Invontlon whloh l~ o~ CM0 dorl~n ~t wlll bo ~en thot ln tho p~rollol P-tha 114, 115, -.
il6, th~ dlod~ 4-166 n~u ~hunt raspective P'~R ~94, 195, 196.
Tbe roqul~lto lo6lc qlgn~ or et~eotlne aperetlon o~ the olroult are the oa~e ~s ~or tho olroult Or FIO. 2 ~nd ~ro not ohown.
ln the ~ule~c~nt st~t~, FErn~ 124-126 src ln non-oonduatlng eontitlon end dovloe~ 194-t96 oro hcld $n e condu¢tlng ~t~e by lo~lo ~13nals appllad to thelr ~to lootrodes. In tho tlr~t ph~c o~ the oper~tlon o~ th~ olroult, o~u~lnt that ch~nnol 25 i~ cho~o~ ~9 on~ o~ the odd nu~er-d oh~nnel~ for ootlvoelon~ a-puoltors S4 ~nd 55 sre ch~rgcd durin~ Perlod ~1 bY
rearon o~ ~ logSc slgn~l b-in3 uppllad to thc gcte olectrod- or ~ET 125 fron retlotor 1t5, ~nd the s?6n~l ~t tho B~t~ electrodo ot FET 195 l~ ro~oved. Shls re~ultJ ln o~paoltor S4 belnt chorged through FET'~ 125 a~d 194 and oap~oltor ~5 b-lne chnr~cd throu~h FE~'s 125 and 196. At the ~nd o~ perlod T1 td-ter~in~d by th~ slgn~l fro~ th~ ~OM ~t3rod ~n regi-~er 175t, the lo~lo ol~nal at thc ~tc olectrode ot ~ET 125 1~ re~oved to toroln~to ohar~lng Or o~pacltor4 54 ond 55 at a level doter~lnod by th~
Drlnt ot~tUJ D~ chonnel~ on oppoJltc olde~ ot ch-nnel 2S whlah b~long to tho 5~ roup. Sut~quently, a~ter th- holdlng perlod ~2, ~ lo~lc ol~nel l~ applled to the ~ete c1ectrode ot FE~ 195 t~
randor that dovloe oonduotlvo nnd th~reby to dSochar~e oapaoitor~
54 and 55. C-p~oltor 54 dlachareo~ through F~T 1gS and di~du 164 ~nt o~v~cltor 55 dlsoh~rg-r throu~h FE~ 195 ~nd dlode 166. It wlll ~e apperent that thlJ olroult ho~ the ~ame ~tvanta~oua ~-aturo~ 9 ~ere r-~erred to Sn conneotlon wlth th- olrault ot FI~. 2, It wll~ turther bo appnrent to tho~o ~Xlll-d ln the ort th-t ~lthou8h tho ~bodLmant~ ot tho lnvontlon doacrSbed wlth reteronoe to FI3~. 1, 2 and 4 and FIa9. 1, 3 ~nd 4 r-qulre thst the ~rSnthond oh~nnol~ 00 ~rr~n~od ln two 8rouP~ ot lnter~o~vcd channels with the channels of one group alternating with those of the other group, it is quite feasible to employ arrangements having more than two groups of channels. Thus in an arrangement where there are, say, three groups of interleaved channels, the circuits described would have, instead of the two phases of operation described for the circuits of FIGS. 2 and 3, three phases of operation in which selected channels of the respective groups would be actuated and there would therefore be at least two inactive channels between any two simultaneously actuated channels. For a given density of channels, the greater the number of groups the less acute the problem of cross-talk becomes. The time required to effect printing of a print line how-ever becomes greater and this may complicate the print-head design because of the need spatially to offset the nozzles of each group from those of the other groups.
In the highest density of channels likely to be achiev-able it is envisaged that wall compliance will be such as to require cross-talk to be limited by both grouping of channels and compensation of the charging voltages of the channel capacitors in dependence upon the print status of adjoining channels.
It is recognized that numerous changes and modifications in the desired embodiment of the in-vention may be made without departure from its true spirit and scope. For example, it will be apparent to those skilled in the art that the switch devices of the integrated circuit could include instead of field effect and bipolar transistors, silicon controlled rectifiers, four layer diodes or other forms of semi-conductor switch devices. The invention is to be limited only as defined in the claims.

, . . .

X
,,,,~ .
; _,.,~"~r~

Claims (11)

1. A multiplexer circuit for effecting, in successive phases of operation, actuation of selected capacitance actuated devices arranged in respective groups, said devices being represented by a plurality of series-connected capacitors with each device corresponding to a pair of successive capacitors, each of said successive capacitor pairs defining a common node therebetween, comprising:
- signal generator means for providing a charging signal;
- a plurality of parallel electrical paths each connected across said signal generator means, each of said paths including the common node formed by the capacitor pair corresponding to a respective one of said devices and first and second switching means connected on opposite sides of said common node; and - control means initially operable for respectively closing and opening the first and second switching means of one of said paths and respectively opening and closing the first and second switching means of the paths adjacent thereto for establishing a flow of current in response to said charging signal for charging the two capacitors connected to said one path, and subsequently operable for respectively opening and closing the first and second switching means of said one path for discharging said two capacitors;
- thereby to effect actuation of the device corresponding to said two capacitors.
2. A multiplexer circuit according to claim 1 including current steering means connected to each of said second switching means for discharging said two capacitors by effecting respective discharge currents in said paths adjacent said one path which flow in respective clockwise and counter-clockwise senses.
3. A multiplexer circuit according to claim 2 wherein said current steering means comprise diode means connected across said second switching means of each of said paths for providing capacitor discharge paths in each of the paths adjacent the path associated with an actuated one of said devices.
4. A multiplexer circuit according to claim 3 wherein said control means comprises logic means for applying respective control signals to said first and second switching means for effecting charging of the capacitors corresponding to each of said devices selected for actuation for a period dependent upon the actuated or non-actuated status of the devices adjacent each of said selected devices.
5. A multiplexer circuit according to claim 3 wherein each of said first and second switching means comprises a transistor switch which, together with said diode means, are embodied in a silicon chip integrated circuit.
6. A multiplexer circuit according to claim 3 wherein each of said second switching means comprises first and second switches, said first and second switches providing parallel capacitor charging paths in the paths adjacent each path associated with an actuated one of said devices, said second switch further providing a capacitor discharge path for discharging both capacitors associated with an actuated one of said devices.
7. A multiplexer circuit according to claim 6 wherein said first and second switching means are embodied in a silicon chip integrated circuit, said first switching means comprising a field effect transistor and said first and second switches comprising respectively a field effect transistor and a field effect transistor controlling the operation of a bipolar transistor.
8. A multiplexer circuit according to claim 3 wherein said signal generator means provides a slowly increasing voltage for charging the capacitors associated with actuated ones of said devices and is subsequently disconnected therefrom for a finite interval prior to the discharge of said charged capacitors.
9. A multiplexer circuit for effecting, in successive phases of operation, actuation of selected capacitance actuated devices arranged in respective groups, said devices being represented by a plurality of series-connected capacitors with each device corresponding to an adjacent pair of said capacitors, each of said adjacent capacitor pairs defining a common node therebetween, comprising:
- signal generator means for providing a charging signal;
- a plurality of parallel electrical paths each connected across said signal generator means, each of said paths including the common node formed by the capacitor pair corresponding to a respective one of said devices and first and second switching means connected on opposite sides of said common node; and - control means initially operable for respectively closing and opening the first and second switching means of one of said paths and respectively opening and closing the first and second switching means of the paths adjacent thereto for establishing a flow of current in response to said charging signal for charging the two capacitors connected to said one path, and subsequently operable for respectively opening and closing the first and second switching means of said one path for establishing a pair of circuits comprising said second switching means of said one path and the paths adjacent thereto in which are developed respective clockwise and counter-clockwise discharge currents for discharging said two capacitors, - thereby to effect actuation of the device corresponding to said two capacitors.
10. A multiplexer circuit according to claim 9 wherein each of said second switching means comprises a transistor switch and a diode connected in parallel thereacross.
11. A multiplexer circuit according to claim 9 wherein said control means comprises logic means for applying respective control signals to said first and second switching means for effecting charging of the capacitors corresponding to each of said devices selected for actuation for a period dependent upon the actuated or non-actuated status of the devices adjacent each of said selected devices.
CA000599320A 1988-05-13 1989-05-10 Multiplexer circuit Expired - Lifetime CA1321508C (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB8811458.2 1988-05-13
GB888811458A GB8811458D0 (en) 1988-05-13 1988-05-13 Two phase multiplexer circuit
GB888830397A GB8830397D0 (en) 1988-12-30 1988-12-30 Multiplexer circuit
GB8830397.9 1988-12-30

Publications (1)

Publication Number Publication Date
CA1321508C true CA1321508C (en) 1993-08-24

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CA000599320A Expired - Lifetime CA1321508C (en) 1988-05-13 1989-05-10 Multiplexer circuit

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EP (1) EP0341929B1 (en)
JP (1) JP2666084B2 (en)
AT (1) ATE118404T1 (en)
CA (1) CA1321508C (en)
DE (1) DE68921091T2 (en)
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GB9113023D0 (en) * 1991-06-17 1991-08-07 Xaar Ltd Multi-channel arrary droplet deposition apparatus and method of manufacture thereof
JPH04369861A (en) * 1991-06-19 1992-12-22 Matsushita Electric Ind Co Ltd Manufacture of compound semiconductor integrated circuit capacitor
FR2705279B1 (en) * 1993-05-14 1995-08-11 Toxot Science & Appl Generator of electric charge voltages of drops emitted in a multi-nozzle inkjet printer.
JP3369415B2 (en) * 1995-12-14 2003-01-20 東芝テック株式会社 Head drive for inkjet printer

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JPS55123476A (en) * 1979-03-19 1980-09-22 Hitachi Ltd Multinozzle ink jetting recorder
JPS585269A (en) * 1981-07-02 1983-01-12 Seiko Epson Corp Ink jet printer

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ES2067538T3 (en) 1995-04-01
DE68921091T2 (en) 1995-06-14
DE68921091D1 (en) 1995-03-23
JPH0218054A (en) 1990-01-22
JP2666084B2 (en) 1997-10-22
EP0341929A2 (en) 1989-11-15
ATE118404T1 (en) 1995-03-15
EP0341929B1 (en) 1995-02-15
GR3015062T3 (en) 1995-05-31
EP0341929A3 (en) 1991-08-14

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