CA1269146A - Angular position detector - Google Patents

Abstract

ANGULAR POSITION DETECTOR

Abstract of the Disclosure A transducer formed of one or more electrode arrays is positioned in confronting relation and parallel to the plane of rotation of one or more rotating members. A plurality of phase modulated, two-phase, square wave drive signals of the same amplitude and frequency are applied to each electrode.
The signals are combined at a central node or electrode to form, as a result of the signal, the superposition of the algebraic sum of all drive signal pairs. Samples of the resultant signal taken at the same frequency and of a duration of less than one-half the duration of the drive signal period provide a multi-step, synchronously detected signal. The detected signal is a multi-step approximation to a sine wave, the phase angle thereof relative to a timing point being proportional to the angular position of the rotating member. The amplitudes and phase shifts of the multi-step detected signal are then reduced to a plurality of vectors, from which two orthogonal vectors are produced which may be mathematically reduced to the amplitude and phase angle of the aforesaid sine wave. The phase angle is transformed or converted into a binary representation of the hand position.
As particularly claimed, this invention pertains to a method of determining the phase angle of a sine wave or the phase angle of the fundamental frequency component of a sine wave approximation with respect to a reference signal of the same frequency and the amplitude of the sine wave comprising the steps of generating the reference signal of known characteristics, generating multiple, periodic, equally spaced samples (K samples) of the amplitude of the sine wave at times which have a known phase relationship to the reference signal, and converting K samples to a single vector describable by an amplitude and a phase, the phase being representative of the relative phase between the original sine wave or sine wave approximation and the reference signal.

Description

31~

ANGt~LAR POSITION DETECTOR
This application is a division of Canadian Serial Number 459,531 filed July 24, 1934.

_ac ~ _d of the Invention In commercial, industrial and domestic applications it is often useful to determine quickly the position, speed or direction of rotation of a movable body such as a metel~ ha:ld, a robot arm, or perhaps an abnormality in a plate of dielectric material. ~or an e~ample of the ~ormer, various means have been developed for detcrmining the position of the dial hands of utility meters so as to permit them to be read rapidly and automatically from a remote location. In contrast with conventional practice in which a utility company employee periodically visits each meter to obtain a visual reading, remote meter readinc3 offers very significant economic benefits. By suitable means, for e.Yample, all the meters in a large apartmcnt complex can be read in a few seconds from a single location outside the building or in the basement; or meters can be read several times daily to allow the utility to obtain energy flow data, study consumption patterns, or (by the .?0 use of time-of-day rates) discourage consumption during ~eriocls of high demand.
Clearlv, in such a reading means a highly desirable feat~re is the ability to read ordinary utility meters wllich are already in service. Nonetheless, with the .?-, e~:ception of previous work by and on behalf of the assic;nee of this application, remote meter dial reading has been generally possible only through the use of e.~i>ensive specially-equipped meters which replaced the ord~nary metc~r already in use. The above-mentioned previous efforts by and on the part of the assignee have resulted in meteL-reading systems disclosed in ~.S. Letters Patert Nos. 3,500,365 and 4,007,454; and in Canadian Patent Application Serial No. 390,590, filed November 20, 1981.
In each of tht?se patents and applications, in general, a senslng transducer scans the dials of the meter by inducing an electric or magnetic field which includes the hands.
The theory of the aforementioned patents and applications ~i,~'~
r~

_9_ is that the transducer's field can be coupled to the meter hand through the intervening space, and variations in the phase of the resultant signal detected give an indication of the meter hand's position. Because no mechanical parts that move relative to one another are used, pot:ential problems of maintenance and reliability are eliminated.
Improvements to the devices disclosed in the above-mcllti.oned patents and applications are also disclosed in Canadian Patent No. 1,162,612, issued February 21, 1984 assigned to the assignee of this application. This appli-cation is directed to a peculiar shape of the field-producing electrode which provides improved uniformity of angular sensitivity. Also, a further improvement is disclosed in U.S. Patent No. 4,214,152, issued July 22, 1980, which involves a technique for compensation for the mechanical misalignment of one of a plurality of meter hands by adjusting the reading of a more significant hand responsive to the hand position of the adjacent lesser significant integer.
Summary of the Present Invention The present invention is also directed to a method and apparatus for detecting the presence and/or position of objects causing a disturbance to the field of such a phase-sensitive transducer, wherein the transducer is a prescribed circular array of electrodes (or in t:he magnetic approach, a circular array of pole pieces).
~hile the present invention may be adapted to other applications such as the determination of the position of the arm of a robot or the location of openings or flaws in a planar workpiece, for the most part the invention will be described herein as being utilized for the determina-tion of the position of a meter hand, keeping in mind that the techniques of the invention are equally applicable to other areas.
In contrast with conventional phase-measuring techniques, typically concerned with directly-measured timing relationships between sinusoidal signal waveforms, one aspect of the present invention permits a more accurate 314~i determination of phase and hence of hand angle, from the measured amplitude ratios of a plurality of periodic, stepwise signal levels. Stepwise levels arise from the use of certain properties of square waves by a novel field-excitation approach utilized in this invention.
sy these means it has been found possible to simplify manufacture and eliminate errors which are often introduced by waveshape imperfections in earlier, sinusoidally-driven models of the transducer described above. Further, according to a second aspect of the invention there is provided an accurate calculation of the quality of the phase-related signal from the amplitude relationships between periodic, stepwise signal levels without the necessity for difficult measurements of complex, continuously-varying waveshapes.
Moreover, and in accordance with a third aspect, the present invention allows rapid compensation for the effect of varying distance between the transducer and the hand, increasing the span of distances over which the transducer can be satisfactorily operated, reducing its cost, and simplifying its installation on the meter.
~urther, the present invention employs a novel technique for converting the numerical results of the transducer's reading process into standard ASCII code: this aspect of the invention accomplishes the desired conversion faster and with less computational hardware than is other-wise possible.
~ lore particularly, in accordance Wit}l the first aspect of the present invention, the drive, array, and detector system to be herein described produce a resul-tant cyclic signal of six steps repeated over and overin time. The signal is periodic, and a complete cycle of six steps is equal to 360 of phase angle or 2 ~
radians. The six steps occur at fixed times after the transition o the reference phase (i.e. at 0, ~/3, 2 ~/3, ~ , 4~ /3, and 5 ~/3 radians). The six-step levels are transferred through a digital logic controlled sample and hold gate so that they may be acquired by the system microprocessor with an analog to digital (A/D) converter with a variable gain prescaler. The signal ~ti914~, is then analyzed for qualit:y and, if acceptable, is used to calculate the hand angle.
In general the signal is produced by generating a plurality of phase modulated drive signal pairs, each pair consisting of a signal and its complement. Each of the drive si~nals is a plurality of two-phase square waves of the same amplitude and frequency, and the transition of all drive levels occurs synchronously.
For a prescribed period of a given number of cycles (N), each drive signal changes phase by 180 each N/2 cycles. ~lso in the same period of N cycles, where K
equals the number of drive signals, each phase shift occurs N/K cycles subsequent to the phase shift of the previous drive. The period of N cycles is so selected such that 2N/K is an integer. Each of the aforementioned drive signals are fed to a separate electrode in the electrode array in such a manner that each signal and its complement are fed to diametrically opposed electrodes.
The relationship of the phase progression of the drive signals is proportional to the angular relation of the electrodes. The drive signals are coupled (capacitively or permittively) to a central node through the meter hand in such a manner that the algebraic sum of each drive signal pair is constant in the absence of any variation (meter hand). In the presence of a variation (meter hand) the algebraic sum of each drive signal pair varies at the same frequency as the drive signals, so that the signal on the central node is the superposition of the algebraic sum of all drive signal pairs.
The resultant signal on the central node is sampled by generating a synchronous gating pulse at a time between transitions of the drive signals. The gating pulse is relatively short (of a duration less than one-half the duration of the drive signal period) and at the same frequency as the drive signal, so that the resultant synchronously detected signal is in the form of a multi-step signal in which the number of steps is equal to the number of drives. The resulting syn-chronously detected signal is then a multi-step approxi-mation to a sine wave in which ~he phase angle between the sine wave and a timing point (phase transition of a given drive signal) is proportlonal to the angular positlon of the dielectric variati.on (meter hand) confronting the transducer.
According to the second aspect of the invention, the hand angle is then calculated utilizlng tl-e six step cyclic siqnal. ~irst, the six steps are converted into terms representdtive of the imbalance of the drive signals, which terms are vectors spaced l20~ apart (hereinafter referred to as vectors A, B, and C). Whi1e the six signals could be converted directly to two orthogonal vectors, it is preferred to first determine the three vectors of A, B, and C to facilitate tweaking of the system (obtaining a balanced or net resultant zero signal in the absence of a hand). The three phases are then combined as vectors into two orthogonal vectors, I and J. The algebraic (+ or -) signs of I and J
are used to determine in which quadrant the phase of the signal lies (keep in mind there are four quadrants in 2~ radians).
The size of vector I versus vector J is then compared to determine whether the resultant vector is within ~/4 (45~) of the I axis or not (whether J/I is greater or less than 1). The ratio of J and I is then the tangent of the resultant vector. The arctangent of J/I is determined through a successive approximation routine with proper adjustment for quadrant and proximity to the I axis.
The above technique for determining J/I is utilized to determine the phase angle of the hand position which is then converted to a binary representation thereof. According to yet another aspect of the invention the amplitude of the sine wave approximation is utilized later in the calculation process to make a compensation on the resulting hand angle value based on the distance of the transducer from the meter hand. ~hen the meter hand at zero position is spaced some distance from the transducer, the calculated 0 may not actually coincide with the actual or physical 0. Therefore a predetermined compensation value is added to the signal representing the hand position, which value is a function of the distance between the hand and the electrode array. This distance is correlated to a change in signal amplitude. The amplitude based correction is made utilizing a lookup table.
~0 14~i In accordance with another aspect of the invention the revised or corrected signal is then further compen-sated to provide for mechanical misalignment of hands, which is referred to as an Inter-Dial Compensation (IDC). In meter reading devices of the type described hereinabove, a problem may arise because of mechanical inaccuracies in the meter. As will be well recognized, most meters which must be read constitute a plurality of dials (or hands) which represent, for example, kilowatt hours, tens of kilowatt hours, hundreds of kilowatt hours, and thousands of kilowatt hours. In some cases the hands are not accurately aligned with the numerals on the dial face. For example, when the reading of the kilowatt hand is at 2, having just passed 0, the tens of kilowatt dial should be 2/10 of the di~ital distance beyond one of the integers thereon, for example, 0.2. Due to misalignment, however, the tens of kilowatt dial may, for example, be pointing in a direction which would apparently be reading 9.9.
If the dial readings are obtained independently, errors then can clearly be carried through the system.
To correct ox compensate for the possible mis-alignmetlt of certain hands or dials, the present inverl-tion introduces a technique whereby the least significant dial is read first and then a compensating offset value is generated for the next dial For each reading of a dial after the first, there is automatically added a correction factor to the apparent value of the indicator being read which is based on a cumulative correction factor from the previously adjusted values of all lesser significant indicators. The compensation value is continuously adjusted responsive to the reading from the lesser significant dials, so that the adjusted reading from any selected more significant dial will tend to fall exactly halfway between two adjacent integers. The compensation adjustment continues from each less significant dial to the next more significant dial as a cumulative adjustment factor, so that when the reading is completed, errors due to mechanical misalignment should be eliminated.

91~ ~, As previously stated the phase angle of the hand position is converted to a binary representation thereof. In accordance with the present invention the conversion is effected by utilizing binary coded integers whose range is so selected as to facilitate calculations and compensations and to provide a resulting value that readily converts to the BCD of the integer value of the hand position. The key to this special range is that the circle is first broken into 640 parts. That means that each quadrant includes 160 parts and each half-quadrant has 80 parts. These are important considerations in determining the arctangent of the phase angles of the hand, which will be converted to a number between zero and 639.

Although various aspects of the invention have been set out above, the invention particularly claimed in this divisional application pertains to a method of determining -the phase angle of a sine wave or the phase angle of the fundamental frequency component of a sine wave approximation with respect to a reference signal of the same frequency and the amplitude of the sine wave comprising the steps of generating the reference signal of known characteristics, generating multiple, periodic, equally spaced samples (K
samples) of the amplitude of the sine wave at times which have a known phase relationship to the reference signal, and converting K samples to a single vector describable by an amplitude and a phase; the phase being representative of the relative phase between the original sine wave or sine wave approximation and the reference signal.

Brief Description of the Drawings Figure 1 is a timing diagram of a pair of phase shifted drives, Figure 2 is a schematic representation of a simple 14~

conventional single-sided detector circuit which could be used with the present invention;
Figure 3 is a schematic representation of a more reliable double-sided differential detector circuit used for synchronously detecting the output signal from the transducer plate;
Figure 4 is a timing diagram representation of a single sine wave drive synchronously detected by a pair of sampling gates;
Figure 5 is a timing diagram representative of a square wave drive signal as used in the present invention demodulated by a single gate resulting in a simple square wave;
Figure 5a is a plan view of the electrode arrangement contemplated by the present inveniton;
Figure 6 is a timing diagram representative of the relation of the drive signal pairs according to the present invention, appearing with Figure 5;
Figure 6a is illustrative of the signal received from the central node and its subsequent synchronous detection;
Figure 7 is a representation of the six step ~ l'r~

signal generated by syncllronously sampling the signal from the central node in accordance with the present inventi.on;
Figure 8 is an electrical bloc~ diagram of the si~ step acquisition system;
Figure 9 is a diagrammatic representatioll of the detected sigllal separated into its three componentsi Figure 10 is a graphic representation of a quadrant diagram showing the I and J vectors with 45~ bisectors;
Flgure 11 is the arctangent lookup table;
Figures lla and llb together form an electrical schematic of the circuit for amplifying and synchronously demodulatinq the signal from the transducer plate central node;
Figure llc is the amplitude compensation lookup table;
Figure 12 is a major block diagram of the system of the present invention;
Figure 13 is a functional block diagram of the generation of the drive and sample signals;
Figure 14 is a block diagram of the gates, carrier and system clock generator circuiti Figure 15 is a block diagram of the phase modulation signal generation portion of the system;
Figure 16 is a block diagram of the phase modulator alld transducer drive logic portion of the system;
Fi~ure 17 is a bloc~ diagram of the sample and hold logic for synchronously sampling the steps of the demodulated signal;
Figure 18 is a program flow chart interfacing the sample and hold digital logic with the central processing unit;
Figure 19 is a block diagram of the baud rate generator;
Figure 20 is a block diagram of the 5-bit shift register which controls the dial-enable function;
Figure 21 is a program flow chart of the interdial compensation technique; and Figure 22a through 22q are program flow charts of the system of the present invention.

~ r~i Detailed Description of the Preferred Embodiment _ . _ The present invention is directed to a transducer system which utilizes a set (six) of phase-modulated electrical drives ancl a double-sided synchronous detection S system to detect the position of an object having electrical characteristics which differ from the charac-teristics of the surrounding medium, as for example, the position of a meter hand. Phase, of course, is the temporal relationsllip of two periodic phenomena, such as electrical signals in the present invention. Phase is measured in terms of a portion cf a complete cycle of one of the si~nals. Thus, one cycle equals 360 or 2 radians. In order to measure time differenccs or phase, some standard point or landmark must be used.
Since the signals may be square waves, as well as sine waves, the peaks are not generally used as the landmark.
Rather, a conventional technique which has developed for measuring phase relationship is to utilize the positive-going zero crossing point, with zero defined as a level midway between the high and low extremes (Figure 1). This is referred to as the "zero crossing technique" and is well known. Another known technique for generating a phase landmark is the "phase locked loop" technique.
sy way of background leading up to a discussion of the present invention a phase demodulation system will be outlined. Assume that A is a reference gating pulse, which synchronously gates or generates samples from another periodic signal S for some period, ~T.
The mean level then of the sampled signal is a function of the phase angle, 0, between the two signals, althoug}
not unambiguously so. A simple single-sided sample and hold circuit for performing this task is shown in Figure 2.
Obviously, some information will be lost in that only a brief portion of the signal is sampled. A
second synchronous gating pulse B can be generated 180 delayed from the gate pulse A.

If a signal S is sampled again with pulse B, and the resultant signal is inverted and added to resultant signal generated by pulse ~, then there results a "differential detection system" which achieves two ends: a) the efective signal is doubled; and b) shifts in the DC or low frequency level of the signal are cancelled out, producing a more reliable signal (E) with consequent rejection of a common DC or low level component (this is termed "common mode rejection"). This circuit for producing such a differential detection signal is outlined in Figure 3. This circuit also amplifies the resulting signal.
Thus, where there is a signal S sampled by gating pulse GA, and the phase difference between the signals and the gating pulse GA changes smoothly, then the sampling window moves smoothly through the entire cycle of the signal, tracing out the signal at an expanded time scale (Figure 4). This may be thought of as a beat frequency, fE, determined as: fE=(fGA-fs). This holds true for both single- and double-sided sampling cases. If fGA and fS are known, then fE is also well known. If signals GA and S both commence wit:h a certain phase relationsllip, they will return to that phase relation-ship after a calculable number of cycles according to the following equation:
GA = # cycles of GA
GA S
A new "supra" time period is thus defined (Figure 4), which is required for 0 (the phase relationship between G~ and S) to cycle 2~ radians. Again, the signal E is related to the phase ~ between signals S and GA.
Therefore, if a reference signal R with a period of GA fS exists, a new phase angle 0 can be defined as the relative phase of S (relative to GA) and R
(relative to E). Since ~ is the phase of S with respect to GA, then ~ is related to a in such a manner that if O is determined as the zero-crossing of R, then 0 = 0 (it should be kept in mind that 0 is the phase angle S3~

of the phase of E at the zero-crossing of R).
A periodic signal, SA, can be generated (Figure 1).
A second signal, SB, is generated which has the same frequency as SA, but is phase shifted ~ with respect to it (see Figure 1). If a signal is detected which may be either SA or SB, then it can be determined which signal it is by examining ~ with respect to the reference signal. If ~ = 0, the signal is SA. On the other hand if ~ = ~ , then the signal is SB. Mathematically if two sine waves are added together, a single sine wave results defined by the following equation:
C sin (~ t + ~) = A sin (~ t) + ~ sin (~ t +~).
The addition in the above equation ls of a vector al nature. The important consideration is that a single sine wave with a phase angle of ~ results. The angle is a function of ~ and the ratio of A to B. If ~ is known (i.e. fixed), then~ is a function of the ratio of A to B (vector addition). Therefore, if ~ can be measured, then there results a measure of the ratio of A to B.
If one has a system which differentially couples SA and SB according to the position of some object (meter hand), then the position of the object can be determined from ~ . The situation with two signals with different phases can be expanded to include more than two phases.
Thus, if the signal phases are arranged in an orderly and predictable manner, three drivers can be used unam-biguously to determine the position of a rotatable hand.
If three equal-amplitude sine wave signals were equally spaced over 2 ~ radians at 2 ~/3 intervals, when summed, the vector sum is zero. The above analysis is conventional and should be used as background for the present invention, a description of which ensues.
Drive Siqnals of the Present Invention The fundamental encoder circuit is depicted in figure 12. It is comprised of several interlinked sub-systems, namely; power supply; microprocessor sub-system; digital circuitry; analog circuitry; analog to di.gital converter (A to D); and multidial transducer.
The power supply (FIG. 12) accepts unregulated electri-cal power and produces a regulated voltage output which powers the rest of the circuit. It also incorporates a turn-off circuit which shuts the power supply off at the end of the encoder's operational cycle. This minimizes use of electrical power. The microprocessor system performs calculations on the information received from the A-to-D
converter (FIG. 12) and produces the data structure for the output serial data stream. The digital circuitry (DIGITAL
IC, FIGS. 12, 13) produces the drive signals (FIGS. 15, 16) for the transducer plate, selects the dials in sequence (FIG. 20), controls the analog circuitry, the timing of the interfaces between the A-to-D converter and the analog circuitry and microprocessor, and the serial data output clock (FIG. 19). The analog circuitry (FIGS. 3, llA and llB) synchronously demodulates and filters the signal from the transducer plate and samples the resulting signal under the control of the digital circuit. The sample is presented to the A-to-D converter for conversion under the control of the digital IC and the microprocessor (FIG. 8, FIG. 18, and FIG. 22N). The multi-dial transducer (FIG. 12, 5-DIAL
TRANSDUCER) is provided with the six drive signals, A, A
BAR, B, B BAR, C, and C BAR, by the digital IC; all dial.s are driven simultaneously. The output signals from each dial are buffered with a field effect transistor (FET) in a source following mode. These signals are selected singly, under the control of the digital IC and microprocessor (FIG. 20), for presentation to the analog circuit (FIGS. llA
and llB).
The digital integrated circuit ("DIGITAL IC", FIG. 12) provides the primary control of the system. Its contents are shown in Figures 13, 14, 15, 16, 17, 19 and 20. The overall structure of the digital clock is shown in Figure 13. The timing of the system is derived from an oscillator driven by the digital IC ("OSC. IN", FIG. 13). This primary oscillator is divided by 8 and recombined with NAND Gates to produce the synchronous demodulator gates, "GATE A" and "GATE B" as shown in Figure 14. GATE A and GATE B are also combined through the use of a NAND gate to produce the inverse system clock, termed "SYSTEM CLOCK BAR" in Figure 14.
The inverse of the synchronizing clock is produced because it is buffered with an inverter at each point it is used elsewhere in the circuit. Inverting buffers introduce r~

less of a signal delay than a non-inverting buffer, so it is prudent to transmit an inverted signal around the circuit for local buffering. A carrier signal is also produced as a flip-flop which is set and cleared by gates ~ and B respec-tively (FIG. 1~). This carrier is the high-frequency signal which will be combined with the phase modulation si~nals (FIG. 15) with EXCLUSIVE GR GATES as shown in Figure 16 to produce the transducer drive signals, A, A BAR, B, B BAR, C, and C BAR.
The SYSTEM CLOCK BAR is divided by 16 in the SYNCHRONOUS
CLOCK LOGIC shown in Figure 15 to produce the JOHNSON COUNTER
CLOC~. The Johnson counter is a circuit well known to those familiar with the art of digital circuits whereby lower frequency signals of 50% duty cycle with fixed phase relation-ships are derived in a shift-register based counter. The circuit used here (FIG. 15--3 BIT SHIFT REGISTER) produces three square wave (digital) signals at frequencies of one-sixth of the input frequency with phase offsets of 2 ~/3 radians (120)(FIG. 9). A reference signal is produced by strobing each of the signals into a 3-BIT EDGE-TRIGGERED
LATCH (FIG. 15). The latch is comprised of three edge-triggered flip-flops with common clocks triggered by an inverted SYSTEM CLOCK BAR signal. Such a latch will transfer logic levels on its inputs to its outputs at the appropriate transition of its clock line and hold them there. One of these latch outputs is used in testing and aligning the encoder; use of the SYSTEM CLOC~ BAR signal ensures that it is properly synchronized with other circuit signals.
The output signals Ql, Q2, and Q3 from the 3-bit shift register (FIG. 15) are the UNLATCHED PHASE MODULATION SIGNALS.
These serve to phase modulate the carrier signals, discussed above (FIG. 14), through the use of EXCLUSIVE OR gates, as shown in Figure 16. An exclusive OR gate will produce a high logic output when either but not both of its inputs are high. When a phase modulation signal is low, the carrier is unaffected; when a phase modulation signal is high, the carrier is inverted. These two states, non-inverted and inverted carrier signals, are effectively carrier signals modulated by 0 and 180 respectively. These signals, and their inversions, are presented to the input, or data, lines of a six-bit latch (FIG. 16). They are 914~;

simultaneously strobed through the latch by the system clock.
In this case, each lat_h line drives only one output to match the transition times of the outputs as closely as possible.
The outputs are buffered by inverters (FIG. 16) to produce the transducer plate drive signals A, A BAR, B, B B~R, C, and C BAR. Note that since the transition of the latches (FIG. 16) is controlled by the SYSTEM CLOCK; these transitions have a precise, stable timing relationship with the demod~la-tion gate drives, GATE A and GATE B (FIG. 14) which are used to control the analog demodulation circuit (FIG. 11). This precise relationship permits the demodulation gates to sample the signal returning from the transducer plate during the last half of each carrier signal half cycle. Thus, the signal has stabilized before being sampled. This produces the most reliable behavior of the entire circuit and permits reasonable device-to-device differences in manufacturing without de-grading performance.
The latched phases of the 3-bit shift register (FIG. 15) are used with the STEP POINTER and CONTROL LOGIC to produce the sample-and-hold control signal (SAMPLE OUT) through a ONE-S~IOT. The step pointer and step transition detector close the sample gate by turning on the one-shot through the control logic. The sample output is turned off by the next transition of the DIVIDE-BY-SIX COUNTER CLOCK which is also the input to the 3-BIT SHIFT REGISTER Johnson counter (JO13NSON COUNTE~ CLOCK) shown in Figure 15. This one shot cycle is initiated by an edge transition of the signal level Cll the ADVANCE STEP line to the step pointer. .~t the con-clusion of the sample period, the A-to-D converter cycle is initiated to convert the analog level into a digital level.
At the end of conversion, the microprocessor reads the data ouput from the A-to-D converter for use in calculation of the hand position, as described elsewhere. The microprocessor program is carried in an erasable read-only memory (FIG. 12, 2K X 8 EPROM) and is read with the use of the ADDRESS LATC~I
and ADDRESS DECODE subcircuits. These comprise a conventional microprocessor system, and can be substantially reduced by including the program ln a custom microprocessor (on-board ROM).
The present invention uses a phase modulation/demodula-tion technique to generate a resultant signal which is the superposition of a set of square waves. The drive signals are not sine waves, but are phase modulated square waves with two levels, VDD and Vss. Only two phase conditions of the carrier signal of each of the drives are used. The drive signals have two possible phase transition points: 0 and 7r radians (0 and 180). Each drive has a 50~ phase cycle (1/2T
at 0 and 1/2T at ~r). A single drive S synchronously demodulated by a single gate GA results in a simple sq~are wave E (Figure 5).
By driving square waves which have only two phases 180 apart, the gate can have a long sample period. The gate is not closed until all transients have died out or been suppressed. Thus the concept is well suited to digital implementation.
In the present invention, there is utilized drive pairs consisting of driver signals and their complements.
Three such pairs of signals are used. One pair (A, A) phase transitions at 0 with respect to a reference signal.
Drive signal A assumes what is arbitrarily termed the 0-phase condition at 0. A second phase pair (B, B) transitions at 2 ~/3 (120) with respect to the reference signal. A third phase pair (C, C) transitions at 4 ~/3 (240).
The above are ref`érred to as~phase modulated drive signals. The driver array electrodes are physically arranged (Figure 5a) at such angular positions which correspond or correlate with the phase of their phase shift with respect to the reference signal. Thus:
TRANSITION OR PHYSICAL ANGLE OF ELECTRODES
DRIVE PHASE ANGLE RADIANS DEGREES

C 1/3 ~ 1/3 ~ 60 B 2/3 ~r 2/3 ~ 120 A ~ ~ 180 C 4/3 ~ 4/3 ~ 240 B 5/3 ~ 5/3 ~ 300 This arrangement is also shown in Figure 6.
In such arrangement in the absence of a hand or other dielectric variance, all phase pairs should balance, and there should be no signal on the center node or center electrode. The presence of a meter hand unbalances the coupling of the drives to the center electrode. If only signals A, B, and C and not their complements were present lX~

in the two-phase square wave condition, a non-zero signal would result. The output signal on the center electrode is strangely shaped (Figure 6a). However, once it is buffered and synchronously detected as described in Figures lla and llb, the resulting signal has six steps which always occur at the same places, although the levels will change as the position of the hand changes (see E`igure 7). From Figure 6 it is seen that there are six different phase conditions, thus the "six step output."
Each step, however, does not correspond to one of the six electrodes. Note that steps 1 and 2 are not adjacent but are symmetrically offset from the horizontal center line. It is the nature of such a periodic function that, in the absence of any perturbing factors, each step will lS have its symmetrical partner. The steps (Figure 7) have been numbered to show this fact. The actual step levels will, of course, vary according to the actual position of the hand in front of the array.
Once the six-step signal has been generated, there are several methods of determining the hand angle. The signal can be filtered to a sine wave and the zero-crossing detected, as described hereinabove. If a counter is started at ~ = 0 and turned off by the zero-crossing detector, the count value is related to the phase angle.
Similarly (and perhaps more reliably) a phase-locked loop can produce a square wave whose zero-crossing is closely related (offset by ~ /2) to the signal phase.
This signal can be used to stop a counter as with the zero-crossing detectors. While either of the above types of detector may be used, it is preferred that the phase angle be calculated directly from the six-step signal levels in accordance with the techniques described hereinbelow.
Calculation of Phase Anqle The calculation of the phase angle of the signal directly from the six-step levels requires reading the step levels with an analog-to-digital converter and then performing an algorithm (Figure 8). Contrary to the zero-crossing technique, this technique is not subject to 14~

component value changes. Additional.ly, the calculation method makes available a subsequent compensation based on the amplitude of the signal, which compensation will be related to the hand-to-transducer spacing. The calculation method is readily achieved with a micro-processor or microcomputer, although the method is compatible to a hardwired logic circuit.
The microprocessor must have some sort of data base representing the levels of the six steps, if it is to generate a hand position. In the system of the present invention, no negative voltages are used, although this is not a requirement. The signals have a center voltage of some value V, with the steps being either greater or less than V. In conjunction with the generation of the signal, there is utilized an 8-bit analog-to-digital converter to measure the levels and convert them into a digital representation in binary language. Due to the large variation in signal amplitude wilich results from the ordinary range of array-to-hand spacing, 10 bits of resolution is actually needed. To solve this problem there is utilized a variable gain prescaling amplifier in front of the step level acquisition circuit. tSee Figure 8). This amplifier can have a gain of 1, 2, 3, or 4, all under the control of the micro-processor. The system is designed so that the voltage level V is in the center of the A/D converter range (the 8-bit range is 0-255, so the center point is at 127), thus the signal is at V + or - the step amplitude.
The step levels are acquired in the following sequence:
1. Gain is set to lowest level ~1).

2. Levels are read in the order 1, 2, 3, 4, 5, 6.

3. Maximum and minimum levels are found (i.e.
levels 3 and 4 in Figure 7).

4. The gain (G) is set such that the signal is as large as possible without overflowing the A/D range.

5. The levels are reread in the same manner as step #2, above.

As stated above, and illustrated in ~igure 8, the levels are read into the microprocessor with an analog-to-digital converter. This device converts a voltage level into a binary code. An 8-bit A/D converter can resolve a voltage into one of 256 levels (28). ~5 stated hereillabove, since 10-bit resolution is necded (1024 levels), the other 2 bits are generated with the variable gain preamplifier, which has an integer gain of from 1 to 4 (22) and is controlled by the micro-processor. The relationship of the signal acquisition elements is diagrammed in Figure 8. The digital logic circuit controls the timing of the gate closing so that the proper six-step level is sampled at the proper time.
The six steps are acquired in the order described herein-above to have the maximum time available between samples to allow the A/D converter to perform its function and because the steps will be analyzed in pairs in the order taken into the A/D converter. After step 5 hereinabove, the six-step levels have been acquired in a digital form (binary code), and the gain being utilized has been stored.
The same gain is used for all six steps. This is because the actual calculation of the hand position to follow is a function primarily of the ratios of the levels.
The absolute amplitude is only critical in applying the amplitude compensatioll value, and does not require great precision. As this system is ratio based in most of the algoriths involved, while it required 10-bit resolution, only 8-bit accuracy is required. Thus, larger tolerances can be tolerated in the amplifier gain.
The microprocessor or embodiment of the algorithms has several reliability checks built thereinto. ~or example the algorithm checks the time required for the A/D converter to respond with data. If more than a specified amount of time is required, the microprocessor or algorithm presumes a fault condition and attempts to read the dial over. If there is a failure to respond the second time the system goes into a fault mode and does not atternpt to read the dial in question or any subsequent dial. The algorithm also checks certain characteristics of the six-step levels. If the signal is too large (i.e. six-step levels which deviate too much from -127.5), such signals will be too close to 0 or 255. This might cause the levels to be higher than the voltage which corresponds to 255, and then the A/D
output would clip or limit, resulting in a "0" output.
If the level is too low, the A/D output would tend to stay at 0. If the A/D level is too close to 0, then, the microprocessor presumes that the signal has either too high a voltage or too low a voltage, and it makes no difference which, as the result will be the same.
The microprocessor steps through each of the stored six-step levels and checks to make sure that all are above some minimum value. If they are below that value, the entire set of values is rejected and the system attempts once again to read the six steps, going back through the gain setting part of the program. If the result is again faulty, the system presumes some-thing is wrong and goes into the fault mode.
Each pair of steps (1 and 2, 3 and 4, 5 and 6) should be symmetrical about the center line. If they are not, it is presumed that some sort of noise got into the system or that there is a problem someplace in the electronic circuit. In either case, the signal is not acceptable. The symmetry of the step pairs is tested by summing the pairs together, which sum should equal 255. If the sum deviates from 255 by more than some specified amount the data is presumed to be faulty and the system tries to reread the steps. ~gain, if the second rereading fails, the system goes into the fault mode. The test is quite powerful and useful.
A test for too low a signal level is made later in the program during the amplitude compensation operation, as the signal level must be determined. If the signal is too low, the calculated hand position may be influenced by some residual or spurious signal and not due to the hand, so the system goes to the fault mode. These systcm checks do much to prevent a faulty reading ~rom being transrnitted.

~eduction to A, B and C Vectors As stated hereinabove, the six stepped signal at the central node is the superposition of three synchronously detectecl, square wave drive pair imbalances:
A = (hl SA + h2 S~) B = (h3 SB + h4 SB) C = (h5 SC + h6 SC) In the absence of a hand, we want A=B=C. Alternatively in the absence of a hand we want hl = h2, h3 = h4, and h5 = h6 as hl thru h6 are variables in the detected signal from each electrode due to the presence of the hand. It should be recalled that drive signal SA is the inverse of drive sign SA, etc. The presence of the hand causes the drives to be unequally coupled to the center electrode in the array, and hence, the ratio of imbalances is a function of hancl position.
If each of the phase pairs are synchronously detectecl separately, with each pair unbalanced to the same clegree such that SX > SX, there would result three square waves 120~ apart (see Figure 9).

The six steps are generated from the sum of these pairs such that:
1. Sl = + A - B + C
2. S2 = - A + B - C
3. S3 = + A - B - C
4. S4 = - A + B ~ C
5. S5 = + A + B - C

6. S6 = - A - B + C
In the above analysis Sl is step 1, S2 is step 2, etc., as reference to Figure 7. The next step of the calculational technique is to take the six-stepped signal data and determine vectors A, B and C. Si.nce the slx-stepped signal is symmetrical about the center line voltage, the step difference terms (SDX) can be defined 9~

to remove any small offset there may be in the data.
Thus:
SDl = Sl - S2 SD2 = S3 - S4 SD3 = S5 - S6 If the above two sets of equations are then solved, the three drive waves appear as follows:
4A = SDI. ~- SD3 4B = SD3 - SD2 4C = SDl - SD2 Note that in all cases, the term " 4X" appears, which is four times the vectors that are being solved for. The results, 4X, have the potential of being 9-bit values as each SDX has 8-bits resolution. There is no reason to divide the result by four, as that would reduce the precision. Thus, the values are redefined:
A = 4A
B = 4B
C = 4C
The values A, B, and C have now been calculated and can be treated as vectors 120 apart. Since ~, B, and C
are all 9-bit values, they can no longer bekept in 8-bit registers, therefore, they are maintained in 16-bit registers (two 8-bit registers). This allows signed calculations to be accomplished using the 2's compleMent method, wl-ich is easier in a microprocessor. Since 16-bit reqisters are now being utilized, the val~les can be normalized for preamplifier gain. This is clone by multiplying each step difference (SD) by 4 and dividing the result by the gain G. To multiply by 4 in a micro-processor, the contents of the register are simply shifted to the left two places.
Calculation of I and J Vectors It should be noted that the three vectors (A, B, and C) define, and actually overdefine a resultant vector.
The algorithm, as implemented in the microprocessor reduces the A, B, and C vectors to a single vector at some angle with some magnitude. This is done through consolidation first in two vectors which are at right angles to each other.

Traditionally, I and J are defined as unit vectors which are orthogonal (90~ or ~ /2 radians apart). Such vectors are the x and y axes in Cartesian coordinates. Mathemati-cally, I and J are calculated as follows:
I = A - (s + C)/2 and J - (B - C) x (( ~)/2) The calculation of I is straightforward and needs no explanatioll; however, the calculation of J utilizes a simplifying approximation for use in the microprocessor.
Sillce ( r~)/2 = .8~6 and 111/128 = .867 therefore:
( ~)/2 is approximately equal to 111/128. This considerably simplifies things, as (B - C) can be multiplied by 111 and then divided by 128. Dividing by 128 in the micro-processor is done simply by shifting ~ binary digits to the right. The multiplicatlon by 111 requires that a 24-bit wide results register be used on a temporary basis.
I and J have now been calculated on a signed basis. The next step is to separate the signs from the values, converting the values into absolute values with the signs stored as separate sign flags (SI for the sign of I and SJ for the sign of J for later use). To facilitate later calculation of the signal amplitude, two new variables are created which are I and J with reduced resolution so that the resulti.ng values will fit into 8-bit registers, keeping in mind that I and J
are, at this instant, ll-bit values. This step is easily done by shifting the values from I and J three bits to the right. All is now ready for calculation of the hand position.
Raw Count Generation It is now desired to convert orthogonal vectors I
and J with their sign flags into a hand position. For reasons that will become clear later, the circle is divided into 640 parts or counts (which are called Wason Counts or WC's). The angle of the resultant vector is defined by (signed) I and J using the arctangent.
This calculation is broken into two parts: first, fi.nding the angle with respect to the I axis, then findinq the quadrant in which the angle lies. In Figure lO there is illustrated a conventional labeled quadrant diagram with 45 bisectors.
As is well known the tangent of any angle is the ratio of J to I (TAN 0 = J/I). Thus, to find the angle a, it is necessary to determine the angle whose tangent is J/I (arc TAN J/I). Where I is equal to or greater than J, this is no particular problem, however, where J
is greater than I, then 6 = 90 - Arctan (I/J). ~hen I
equals J, 0 equals 45. Thus, each quadrant can be broken into two parts. The quadrant is determined by the signs of I and J, which have been stored as SI and SJ, the sign flags. The quadrant is then determined as follows:
SI SJ Quadrant + +
- + II

+ - IV
First, ~he microprocessor program determines if I
is less than J, a swap flag (SF) is set and I and J are switched. The microprocessor then finds an equivalent to the arctangent of J/I. Since the circle has been arbitrarily, but with ultimate purpose, divided into 640 parts, 45 is equal to 80 counts. Thus, the arc-tangent is in non-standard units. By virtue of the process, J is always less than or equal to I, hence a simple division would result in a value less than or equal to l, a value not suited to integer arithmetic.
Thus, the J value is multiplied by 256 by shifting it 8 bits to the left. This is done by concatenating (joining or linking together) an 8-bit word of zeros to the right. Thus, when J is divided by I, the resultant answer will be a value ranging from 0 to 255, a suitable range for binary logic. The tangent equivalent K is now calculated (K =256 x J/I). This value can be converted into angular equivalent units utilizing a successive approximation procedure.

1~ ~i9 ~L~r~

Successive Approximation of the Arctanqent The tangent equlvalent K is converted into angular equivalellt units (WC's) through the use of a successive approximation algorithm which utili~es an 80 point sequelltial table. The table is generated by the following simple BASIC program:
100 Pl = 3.]41592654: REM === CREATE LOO~ UP TABLE ===
110 D = 2 x PI / 640 120 DIM VA(79): REM === DIMENSION ARRAY ===
130 PRINT TAB (6); "W";TAB(15);"INTEGER"
140 FOR W = 0 to 79 150 T=D/2~(WxD): REM === HALF-WAY BETWEEN W'S ===
160 L~=256xTAN(T) 170 VA(W)=INT(LU+.5): REM === ROUNDOFF TO INTEGER ===
180 Ml = 7 - LEN(STR$(W) 190 M2 = 20 - LEN(STR$(VA(W))) 200 PRINT TAB(Ml);W;TAB(M2); VA(W) 220 END: REM === END OF LOOK UP TABLE CREATION ===
W = angle in WC's (remember, 2 ~ = 640 WC's) T = an angle half way to the next W
VA(W) = integer value of K
This results in a table of values set forth ln ~igure 11 of the drawings.
Successive approximation is a process of converging on a value or solution by maXing a series of guesses within a set of rules. Two limits are defined, an upper and lower limit; the designated value is then compared to the value stored in the register midway between the upper and lower limits. If K is greater, then the midpoint becomes the new lower limit. Conversely, if K is less than the midpoint, then the midpoint pointer becomes the new upper limit. The process is repeated until a single value is converged upon~ The following variables are defined:
K = Our calculated arctangent equivalent WP = Current center pointer and final output word, [JP = Upper pointer, LP = Lower pointer, VA(XP) = Value in register at the pointer location X.

Keeping in mind that the goal is to determine the WP, the following procedure is used in a successive aproxi-mation subroutine (SAS):
1. If K~l, then WP = 0, then exit SAS
2. If K >253 then WP = 80, then exit SAS
3. Set UP = 79 4. Set LP = 0 5. Set WP = (UP + LP) / 2 (take integer value) 6. Get VA(WP)

7. Is x >VA(WP)?
A. If yes, LP = WP (Redefine lower pointer) s. If no, UP = WP (Redefine upper pointer)

8. Is (UP - LP~ 7 1?
A. If yes, then return to #5 above B. If no, then WP = UP, then exit SAS.
Note that there are three places that the subroutine can be exited: after step 1, after step 2, or after step 8B. In any of these three cases, WP is defined.
The maximum number of times that it is necessary to go through the loop defined by steps 5 through 8A is seven. This is a very efficient method of searching through the table of arctangent values to find the one which most closely approximates K. The "address" (WP) of the value is the angular equivalent needed to proceed with the calculation of the hand position.
Sector and Quadrant Selection Earlier in the processor program, there was stored a value (SF) to indicate whether or not the I/J vectors had been swapped. That value is now used to determine which sector of the quadrant (Figure lO) WP is in. In all cases, if the I and J values were not swapped, WP
lies in the sector closest to the "I" axis. Conversely, if a swap of I and J was made, the resultant vector or WP
lies in the sector closest to the "J" axis. The rules are simple. If the swap flag (SF) is clear, then WP =
WP. Conversely, if the SF is set, then WP = 160 - WP.
Now the vector can be placed in the proper quadrant and the value of W calculated with a decision tree based on the signs of I(SI) and J(SJ):
If sign of SI is + (or zero) and:
If sign of SJ is + (Quadrant I), then W =
WP, exit I f sign of SJ is - (Quad. IV), then W =
(6~10 - WP), exit 91'~

If sign of SI is -- and:
If sign of SJ is + (Quad. II), then W =
(320 - WP), exit If sign of SJ is - (Quad. III), then W =
(320 + WP), exit l`here has now been determined a value W which is in the ran~e of 0 to 639. Before being converted into a final dial digit reading, some compensations must be applied.
Compensations On the value W which has been determined as being representative of the hand position, there are now three types of compensations to be performed. Those are offset, amplitude, and inter-dial compensations. Various factors cause W not to be 0 when the hand is apparently in a 0 position. That is, the relationship between W and the true hand position may have some deviation. One type of deviation may be that, because of manufacturing con-sideratlons the physical layout of the electrode array is such th~at when the hand~ is in the 0 position, the calc-llated value W is offset by some fixed amount, which also applies to all values around the dial. This is referred to as an "offset" compensation and is adjusted through a baseline adjustment. Another type of deviation which may occur is a function of the distance between the halld and the array, called the "z" spacing to correspond to the traditional Z axis in a polar coordinate system. To compensate for the "z" effect an adjustment value, based on the signal amplitude, is applied to the detected signal W. Finally, each dial reading must be adjusted so that information from the previous dial readings are used to reduce or remove effects of small errors in hand alignment (physical alignment) or electronic process (noise and non-linearity). This is referred to as "inter-dial" compensation and will be discussed hereinafter.
Offset compensation is a baseline correction for the gross rotation of the array pattern. The calculated hand positions have an average offset from the true 91~i hand position. This offset is adjusted by adding a constant value (OS) to the detected signal COUIlt W.
Therefore, w -- W + OS. The offset compensatioll value is generated when the amplitude compensation table is generated, as OS defines a startincl point to be used on the amplitude compensation curve.
~nplitude Compensation The o~fset changes as the spacing between the hand and the array changes. Fortunately, the amplitude of the six-step signal is a function of the spacing between the meter hand and the driven array. It has been found that the relationship between the offset and the amplitude (RA) may be approximated with the following equation:
Total Offset = a + b(RA) + c(l/RA) a, b, and c are constants which are generated from experimental data. This experimental data involves generating amplitudes (RA) and uncompensated W's at a number of known hand positions at a number of known spacings (21S). From these values the constants a, b, and c are generated by multiple regression techniques.
The total offset could be calculated directly;
however, it would require a considerable amount of memory space and time in the microprocessor based system so a lookup table is used. Tile amplitude is calculated from vectors I and J as follows:
_ RA = ~(I2 + J2) soth I and J are ll-bit values, hence squaring and summillg them results in a 22-bit value. This is too cumbersome to work with, so rather than using the entire amplitude RA, a truncated version of the amplitude is used. Recall that a truncated version of vectors I
and J (referred to a IV and JV) were generated earlier in the process. These are both 8-bit values, and now there is defined a new value RS which is the sum of the squares of these values, has a maximum bit si~e of 16, and is always positive.

91"~, The range over whicll the amplitude compensation is to be performed is selccted and the offsets are calculated at points midway between the adjacent values on a lookup table. Instead of the equation using RA, there is gellerated an equival.ent equat.ion using the square root of RS. Thus, Total Of~set = a i b ( ~) + c(l/( ~
This equation is solved for RS as a function of total offset (TF), a, b, and c with the following result:
RS = j(((TF - a) + ((a - TF) - 4bc))) / (2b)) From the results, there is generated a list of values of RS as a function of TF at intervals which are used in the lookup table. The minimum RS value permitted was selected as the bottom of the lookup table and this point is defined as P(min). The lookup table address of the stored values of RS are equal to the corresponding TF - (1/2 the interval between TF's). The minimum TF
was set as the base offset (OS), above. The lookup table is used to generate the amplitude compensation value (AC).
The program uses the lookup table as follows:
1. Calculate RS
2. Set pointer at P(min) 3. Compare the Actual RS with the value in TE`(P) If Actual RS is less than value in TF(P), s`i~nal is toQ~s~mall, go into fault mode 4. Set pointer a~ TF(P) 5. Compare the Actual RS with the value in TF(P) If RS is less than lookup table value at TF(P) then AC = TF(P) Add AC to WC (WC = WC + AC); Exit subroutine If RS is greater than value stored in TF(P) go ahead to 6 6. See if P is equal to P(max) If P is equal to P(max), then AC = TF(P) Add AC to WC (WC = WC + AC); Exit subroutine If P is less than P(max), then Increment pointer P
Go back to #4, above Having compensated for all of the above, the count is now as accurate as possible for a single dial~

Inter-Dial Compensation If the position of a single clial pointer were infinitely accurate, and it could be reliably resolved with the measuring system, there would be no need to have more than one dial on a meter register. The only necessary hand would be the most significant digit, which would be read with the necessary resolutioll.
'I`his is obviously not possible. There is back lash in the gear train, and the encoding technique obviously has limits to its accuracy. It is therefore necessary to actually read all of the hands on a register. Given that there may be inaccuracy in determining the true position of the hand, we must cause each hand to be consistent with the previous (less significant) hand readings.
Reference is now made to United States Patent No. 4,214,152 where this problem is discussed and solved according to an earlier technique.
Consider two adjacent dials Dl and D2 for which D
is the least significant of the two dials and D2 is the most significant of the two dials. Each of the dials include decimal digits arranged in a circular pattern from 0 to 9. The distance between adjacent digits is then 36 degrees. Assuming each dial could be resolved to 100 parts with an accuracy of -3 parts, we can read the digits to .1 +.3. Now, presume the two dials have just been read with the following values:
Dl = 9.2, D2 ~ 4.1.
Is the reading 49 or 39? How does an encoder determine what the rigllt reading is? The correct value for D2 can be resolved by examining the least significant dial Dl. Dial D2 is very close to the transition from "3"
to "4". Thus, it can be seen that it should be read as a "3", for dial Dl is close to, but has not yet passed the transition from 9 to 0, which would cause the next dial to logically transition to the higher digit.
To solve this problem an adjustment factor derived from the reading of the previous dial is added to remove this potential ambiguity. It is important to note that the ~ sted reading of the previous dial is used in determinillg this adjustment factor: thus an adjustmerlt factor determined in reading a previous (less significant) adjacent dial is applied to the reading of a subsequent (more significant) dial. More formally the generation of an interdial correction factor for the more significant adjacent dial is always performed after the generation of the correction factor from the previous dial. The determination of all such correction factors proceeds as follows. The transition of the more significant digit of a di~it pair should occur upon the transition of the less significant dial from 9 to 0. The value of the less significant digit contains the correct information to resolve possible ambiguities of the more significant digit.
In the following discussion these terms will be used:
Terms relating to desired output format (or number base system):
D = number of digits into which a dial is divided, normally equal to N, DA = adjusted digit value, D' = digit value, less significant dial, D" = digit value read before interdial correction, one level of significance higher than D', N = total number of digits per dial, and gear ratio between adjacent dials, R = reference zero, A = digit adjustment value, A" = adjustment value determined from less significant dial reading, D', to be applied to D", Ad = adjustment value in digitized levels, Terms relating to internal reading and correction process prior to cutput:
d = number of digitized levels into which a dial is resolved, d', d" = digitized level value for a particular hand or shaft position, dA', dA" = adjusted digitized levei value, n = dial number being read.
It is desirable and useful to add (algebraically) an adjustment to the more significant digit to increase the probability of having a correct digit reading and to cause a sharp transition as the less significant digit undergoes a transition to zero. This adjusted value of the more significant digit can be expressed:
DA" = D~ + A~ (Eq. 1) Presume that each digit dial can be resolved into d, digitized levels, and that for initial considerations, d is a large number approaching, for practical purposes, infinity; note that resolution is merely the number of digitized levels, and is not the accuracy of the deter-mination of hand position, although it represents the upper limit of accuracy for a single reading.
Digit value, D', is related to the digit levels, d', by the ratio:
D~ = d~[d] ~ (Eq. 2) e.g. 6 = 33~ [6-~0]

It is readily apparent that the Maximum mechanical error of the more significant hand is plus or minus one-half diyit. Thus, as the least significant digit approaches the transition from (in resolved digitized levels) d' = d to d' = 0, or in decades, from 9.9999 to 0.0000) if, at d' = d, the equivalent of one-half digi~ were subtracted from the more significant digit, and if, as the less sig-nificant digit passes the transition, one-half digit were added to the more significant digit, readout would undergo an abrupt transition from one digit to the next higher digit. Obviously, if the maximum error of hand reading is plus or minus one-half digit, then when the least sig-nificant digit is at the point farthest from next significant digit transition (i.e., 5 on a decade system), then adding '`1~4 or subtracting one-half digit to or from the next significant digit is apt to cause an error. When D' = 1/2N (shaft rotation is 180 from the next significant digit transition), the adjustment, A", should be zero. The optimal adjustment for a decimal system can be written:
D'~
~D = 1/2 N (Eq. 3) This equation has the desired property of having an absolute maximum when D' is 0 or D, and a minimum when D' = l/2N. Note that A"D is derived f~om D', the less significant digit and applied to D", the more significant digit. The actual adjustment must be made in terms of resolved or digitized levels and must differentiate between slightly before and slightly after a digit.
Equation (3) thus becomes (using equation (l)):

A"d = N ~ 2 ~ (Eq. 4) the quantity comprising the correction factor to be added from the previous less significant dial and to be inde-pendently determined for the next more significant dial.
~Note (l) that (d l) 1/2 is used rather than (d) 1/2 because d is not a continuous variable; (2) that strictly speaking Eq. 4 is equivalent to (n2d _ l) l which approaches d in the limit as n ~ ~.
From the foregoing analysis a compensation technique has been developed based on an equation derived for tl1e ma~imum possible compensation achievable of the n dial which will provide a binar\, compensation value utilizing the information from all previous dials. The desired digit reading of the n h dial, Dn, shall be called Rn, such that:
Rn = INT( C(Cn + 20 ~ 10 Ri ~n~
The terms are defined as:
n = Dial number (l = Least significant dial), C = Maximum permissible counts or states (agail1, this system uses 2560), tj91~ ~

WCII = Number of counts for Dia:L n (0 - 2559), Ri = Reading (decimal) for itll dial (integer from 0 to 9) R = Reading (decimal) for nt dial (integer n from 0 to 9) Rn 1 = Reading (decimal integer) for (n-l) dial, INT = Integer value of term which follows, truncate to declmal point.
The equation (above) has three terms:
WCn, the raw counts, C-l 20' a constant term and, n-l 10 R 1 y Each of the terms is multiplied by 10/C. The second, constant term is always the same, so no special program manipulations are required. Note that the "Y" term is generated from the previous less significant dial digits (Ri), thus the Y term generated before this dial (Rn) is already compensated.
The addition of the three factors above is accomplished in a simple sequence. For a decimal based system, the flow chart of Figure 21 outlines the procedure. For the binary system described herein, the following procedure is used:
1. WC is shifted left two places; this is the n same as multiplying it by 4, 2. To the result is added 128, which is 640/20 x 4, 3. From this a value Yl is subtracted; the result is ~, 4. Wrap around is checked:
if W is greater than or equal to 2560, then 2560 is subtracted from it, If W is less than 0 then 2560 is added to it.

~t this point there has been created a variable W for each dial, which variable has a value from 0 to 2559. Steps 2 and 3 above perforllled the inter-dial compensatlon (IDC), but in a number based from 0 to 2559 (2560 possible values).
It can be seell that WC is selected frorn the family of values defined by the equation: WC=2560/(2m) for integer values of m from 0 to 8. Selection of m is based on the needs of the particular situation. For this application m = 2. This number is 12 bits long. Now it must be converted to a decimal value and truncated, after which a new IDC
value Yl can be generated.
Conversion to BCD
It is now desired to send out the final diqit value for the dial in ASCII code. For the numerical values (0-9) this means that the first 4 bits form the binary coded decimal (BCD) of the number. This is simply the binary equivalent of the number in 4 bits (e.g. 0 = 000;
1 = 001; 2 = 0010; 3 = 0011; 4 = 0100; etc.) This is then combined with three control bits and a parity bit (POll). P is the parity bit whicil allows checkillq on the receivillg end for data transmission errors.
It will be recalled that there has been gelleratecl a 12-bit value W for the dial reading. This 12-bit value will be truncated to the digit value Rn. ~y virtue of the manipulations which have been performed, the highest 4 bits of the 12-bit value are the BCD value of Rn. Since the manipulations have been accomplished in an 8-bit micro-processor, it is an easy matter to drop out the low byte Wl (which is the lowest 8 bits), so that this information is not transmitted.
Returning now to the generation of Yl the IDC value the value just generated for the dial digit is used to gellerate a new Yl for the next dial. The following mathematical operation is performed:
Yl = ((Rn x 256) + Yl)/10 Now this is done as follows:
1. multiply the existing dial reading, Rn, by 256, 2. add the result to the existing Yl, 3. divide the result by 10; this is the new Yl, to be used on the next dial digit.

Obviously, the value of Yl will depend on the digit values of all previous dials. This provides the maximum possible compensation and is to be desired. It does, however, rec1uire that the process start off right for the first digit (representillg least significant digit) generated.
rrhere is sufficient resolution that, if the accuracy permits, there can be generated from the reading of the least significant dial a l/lOth digit. This is done whether or not the value is in the output message. The least significant dial must also start off with the proper initial value of Yl.
Before reading the least significant dial, the value of Yl is initialized to 128. Note that in calculating the 2560 count value of dial 1 (the least significant dial) there is first added 128 to the reading, and then subtract the initialized value of Yl (128) from it. In other words, it is unaffected. The proces~ is as follows:
1. initialize Yl to 128, 2. generate Cn, 3. calculate the 12-bit value (W) in 2560 counts, including the IDC using Yl, 4. save the high byte (Wh, Rn for dial 1) as Ws 5. multiply Wl by 10, which is the new 12 bit word, W, 6. take the high byte, Wh of the new value of W
for the digit value, Rn, of 1/10th of the least significant dial, 7. generate a new value of Yl, as above, 8. check a jumper on the microprocessor port to see if the 1/1 dial is to be output;
if this is not to be outputthen clear the new Wh to all zeros, if this is to be output, then leave the new Wh alone,

9. shift Wh into the digit output routine in ~hich the upper nibble is fashioned (POll) and attached to form the output byte,

10. retrieve Ws, redefine it as W

11. generate Yl as above, 4~

12. shift Wh into the digit output routine in which the upper nibble is fashloned (POll) and attached to form the output byte,

13. proceed to read the remainillg dials in the normal fashion.
~ rhere has thus been described in detail a preferred embodiment of the present invention. It is obvious that some changes might be made without departing from the scope of the invention which is set forth in the accompanying claims.

Claims

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. Method of determining the phase angle of a sine wave or the phase angle of the fundamental frequency component of a sine wave approximation with respect to a reference signal of the same frequency and the amplitude of the sine wave comprising the steps of:
a) generating said reference signal of known characteristics;
b) generating multiple, periodic, equally spaced samples (K samples) of the amplitude of said sine wave at times which have a known phase relationship to the reference signal;
c) converting K samples to a single vector describable by an amplitude and a phase, said phase being representative of the relative phase between the original sine wave or sine wave approximation and the reference signal.