CA1262968C - - Google Patents

Info

Publication number
CA1262968C
CA1262968C CA 504551 CA504551A CA1262968C CA 1262968 C CA1262968 C CA 1262968C CA 504551 CA504551 CA 504551 CA 504551 A CA504551 A CA 504551A CA 1262968 C CA1262968 C CA 1262968C
Authority
CA
Canada
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA 504551
Other versions
CA1250370A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to CA000583308A priority Critical patent/CA1262968A/en
Priority to CA000583309A priority patent/CA1264093A/en
Publication of CA1250370A publication Critical patent/CA1250370A/en
Application granted granted Critical
Publication of CA1262968C publication Critical patent/CA1262968C/xx
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Complex Calculations (AREA)
  • Memory System (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
CA000504551A 1985-04-05 1986-03-19 METHOD AND DEVICE FOR ACCESSING A MEMORY BY TABLE TRANSFORMATIONS Expired CA1250370A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CA000583308A CA1262968A (en) 1985-04-05 1988-11-16 Method and apparatus for addressing a memory by array transformations
CA000583309A CA1264093A (en) 1985-04-05 1988-11-16 Method and apparatus for addressing a memory by array transformations

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US72033085A 1985-04-05 1985-04-05

Related Child Applications (2)

Application Number Title Priority Date Filing Date
CA000583309A Division CA1264093A (en) 1985-04-05 1988-11-16 Method and apparatus for addressing a memory by array transformations
CA000583308A Division CA1262968A (en) 1985-04-05 1988-11-16 Method and apparatus for addressing a memory by array transformations

Publications (2)

Publication Number Publication Date
CA1250370A CA1250370A (en) 1989-02-21
CA1262968C true CA1262968C (it) 1989-11-14

Family

ID=24893595

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000504551A Expired CA1250370A (en) 1985-04-05 1986-03-19 METHOD AND DEVICE FOR ACCESSING A MEMORY BY TABLE TRANSFORMATIONS

Country Status (5)

Country Link
EP (1) EP0201174B1 (it)
JP (1) JPH0731629B2 (it)
AU (2) AU582632B2 (it)
CA (1) CA1250370A (it)
DE (1) DE3650754T2 (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4882683B1 (en) * 1987-03-16 1995-11-07 Fairchild Semiconductor Cellular addrssing permutation bit map raster graphics architecture
JP2690932B2 (ja) * 1988-03-18 1997-12-17 株式会社日立製作所 ディジタル信号処理プロセッサおよびディシタル信号処理プロセッサシステム
US6170046B1 (en) 1997-10-28 2001-01-02 Mmc Networks, Inc. Accessing a memory system via a data or address bus that provides access to more than one part
GB0130534D0 (en) 2001-12-20 2002-02-06 Aspex Technology Ltd Improvements relating to data transfer addressing
JP5811099B2 (ja) * 2010-11-24 2015-11-11 日本電気株式会社 メモリ制御装置、及びメモリ制御方法
CN113282314B (zh) * 2021-05-12 2024-04-12 聚融医疗科技(杭州)有限公司 一种超声扫描控制参数下发方法及系统
US12105625B2 (en) * 2022-01-29 2024-10-01 Ceremorphic, Inc. Programmable multi-level data access address generator

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4051551A (en) * 1976-05-03 1977-09-27 Burroughs Corporation Multidimensional parallel access computer memory system
JPS6051732B2 (ja) * 1978-08-31 1985-11-15 富士通株式会社 デ−タ・ベ−スを有するデ−タ処理システム

Also Published As

Publication number Publication date
DE3650754D1 (de) 2001-08-02
EP0201174A2 (en) 1986-11-12
EP0201174B1 (en) 2001-05-16
CA1250370A (en) 1989-02-21
AU582632B2 (en) 1989-04-06
AU3478789A (en) 1989-09-07
EP0201174A3 (en) 1988-12-14
JPH0731629B2 (ja) 1995-04-10
AU5486086A (en) 1986-10-09
DE3650754T2 (de) 2001-09-20
AU602293B2 (en) 1990-10-04
JPS61231639A (ja) 1986-10-15

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Legal Events

Date Code Title Description
MKEX Expiry