CA1233584A - High impedance transient resistant transistorized hold circuit - Google Patents

High impedance transient resistant transistorized hold circuit

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Publication number
CA1233584A
CA1233584A CA000482189A CA482189A CA1233584A CA 1233584 A CA1233584 A CA 1233584A CA 000482189 A CA000482189 A CA 000482189A CA 482189 A CA482189 A CA 482189A CA 1233584 A CA1233584 A CA 1233584A
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Canada
Prior art keywords
circuit
hold circuit
transistor
load
operated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000482189A
Other languages
French (fr)
Inventor
Eduard F.B. Boeckmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GTE Communication Systems Corp
Original Assignee
GTE Communication Systems Corp
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Filing date
Publication date
Application filed by GTE Communication Systems Corp filed Critical GTE Communication Systems Corp
Application granted granted Critical
Publication of CA1233584A publication Critical patent/CA1233584A/en
Expired legal-status Critical Current

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Abstract

HIGH IMPEDENCE TRANSIENT RESISTANT TRANSISTORIZED
HOLD CIRCUIT

ABSTRACT OF THE INVENTION
A transistorized high impedence hold circuit suitable for high quality telephone instruments when resistance to transients is important. Of particular importance is resistance to lightning surges and elec-trostatic discharges. The circuit also is suitable for music on hold and two line telephone applications.

Description

~335~

~OLD CIRCUIT
--____ CROSS REFERENCE TO RELATED APPLICATION
My co-pending Canadian application entitled "Hookswitch Bounce Resistance Telephone Hold-Mute Circuit"
Serial No.470,678-1 filed on December 20,1984 is related to the present application.
~AC
Fleld of ~he Inven~ion The pr~ent inve~tion relates to hold cir-cuitry for u~ in ~ub~crib~r's telephones, and more particularly to an electronic telephone hold circuit which provide~ ~xtremely reliable operation under short and long loop condition~ is insensiti~e to static discharge and presents a r~latively high AC
impedence characteri~tic.

Since the development of circuitry employing active component~, i.e.~ solid state devices, ~tc., ~any additional features have been very easily added to conventional telephone cir~uitry. One such feature has been the addition of the so called "~old~ cir-~uit. With the provision o~ ~uch a circuit, a tele-phone call ~ay be electronically latched onto an a~tificial load allowing the hand~et to be returnedto the h~okswitch, until a call i9 picked up on an associated extension telephone or again picked up at the same or original phone, at which ~.ime the hold condition i8 dropped au~om~tically~
Previou~ hold c1rcults made u~e of expen~ive components such as latching relay~ and or integ~ated circuit ~oltage comparator~ and r~lated circuitry adding ~ubstantial co~t to the telephone. Sometimes ~uch h~ld circuitry had paor sen~itivity becau ~ of the com~romi~e be~ween trigger ~on" sen~i~ivity and the ability to drop compl~tely on a high resi~tance exten~ion and/or in the presence of low central o~fice . ~,, _ .

8'~

battery voltage. Some hold circuit methods require the use of a microprocessor and related circuitry to sense the line voltage change with conversion oE
the result to a digital signal. It is obvious that all such techniques suffer to some extent from a great degree o overcomplexity and attendant thereon a re-duction in the reliability stemming from the increased number of components required in such circuit design.
One particular problem with previous state of the arts circuits which utilize silicon controlled rectifier (SCR) components is sensitivity to rapid change of the SCR anode voltage causing the device to turn on (also called the DV-DT sensitivity~ in the presence of transients such as a static discharge or lightening surge. In those cases where there is no time out for the hold circuit, a static discharge or lightening surge turn on of the hold circuit would be an operational failure mode, causing the telephone line to be in a busy mode even though the telephone handset is still on hook. Another problem with pre-vious circuits is the inability to detect high im-pedence extension telephones on a short loop or failure to latch and hold on a long loop with the telephone in the offhook condition~
Still another problem with some previous SCR circuitry which utilize a high microfarad energy storage capacitor to turn off the SCR on a drop out condition, is that the circuitry presents a low AC
impendence to the telephone line. This low impedence makes it difficult to use with music -on- hold appli-catlons or two line telephones on conference where it is desired to transmit and receive voice or data on the line.
SUMMARY OF THE INVENTION
.
The present invention employs standard NPN
and PNP type transistors insteacl of an SCR for latch-ing and holding loop current. Also employed in the ~233~8~

circui-try are resistors, diodes, capacitors, met.alic oxide varistors and a light emitting diode. In the arrangement disclosed a two wa~t load resistor in the collector circuit of a high voltage NPN transistor is switched across the telephone loop by a PNP tran sistor used to trigger the NPN transistor on. Also in the collector circuit of the NPN transistor is a diode and a low value resistor in series used to tap off emitter and base current for the PNP transis~
tor and thus establish its biasing when the NPN tran-sistor is in the on condition. The circuit is ar-ranged so that a momentary switch closure brings the base of the PNP transistor low (to common) turning it on and allowing it's collector current to ~low into the NPN transistor base turning it on. Once the NPN transitor is turned on it's collector current establishes the bias currents for the PNP transistor thereby latching the circuit into the "on" state.
Also, included in the emitter circuit of the NPN tran-sistor is a llght emitting diode (LED), a currentlimiting resistor and a protective zener diode. The LED, indicates -the latched "on" condition. In order to prevent "false latch on" on transients, the posi-tive transient (Erom the input bridge rectifier) is capacitively coupled direct to the base of the PNP
transistor, at the same time the base is capacitively coupled to the emitter, thereby preventing transient turn on of the device. The PNP device is either a high voltage device or is protected b~ a low leakage varistor of the metalic oxide type, connected Erom collector to emitter (for lightening surge protection).
A resistor in series with the transient coupling capa-citor is used for protection against excessive current flow during a surge. It should be noted that a metalic oxide varistor across the circuit provides the basic surge protection.
Once the circuit is latched on the positive voltage at the anode of the LED is also Eed to a second -~335~3~

NP~ transistor which in turn switches on a second PNP transistor. The second PNP transistor is forced into saturation and conducts almost full loop voltage (less the drop due the latched on load~ through cur-rent limiting resistors to a capacitor~ This capaci-tor is allowed to charge toward a voltage defined by a voltage divider ~ormed by a parallel resistor and current limiting resistors.
The capacitor charges until its voltage lU is one diode junction potential greater than the vol-tage at the base oE -the Eirst aforementloned PNP tran-sistor at which time a diode connected between the capacitor and the PNP transistor become forward biased.
The charge on the capacitor then stabilizes at the desired voltage. The absolute value of the voltage can be adjusted by changing the parallel resistor to the capacitor allowing to discharge more or less.
This method of charging the capacitor keeps it from shunting the loop in the off state. The base of the aforementioned first PNP transistor is now held at a reference voltage that changes only slowly with changes in loop voltage due to a time constant of approximately 200 milliseconds formed by the ~C value.
When an extension phone is taken off-hook and the circuit has been previously latched up, the loop vol-tage drops suddenly thereby instantly droppin~ the emitter bias voltage while the base remains supported by the capacitor charge. Therefore the eirst afore~
mentioned PNP transistor becomes biased to an off 3~ condition and the circuit goes to an off state with a high impec~ence and low DC leakeage. The reEerence capacitor discharges through it's parallel resistor.
A mute signal can be obtained erom the collector of the second aforementioned PNP transistor during the on state.
Ascordingly it is the object of the present invention to provide a high reliability hold circuit which is resistant to lightening surges or static .

~33~

discharge transients and also has high operational sensitivity and AC impedence circuitry. It is also compatable with previous state of the art techniques relative to muting of the voice network in the on hold condition as in the technique described in my aforementioned co-pending application. Such technique also provides hookswitch bounce resistance for the present invention.
BRIEF DESCRIPTION OF TFIE DRAWINGS
The single sheet of accompanying drawings shows a simplified schematic of a hold circuit accord-ing to the present invention located in a typical telephone instrument, where the basic telephone cir-cuitry is shown in block form in as much as it does not form a portion of the present invention. The input polarity guard and protective varistor actually are part of the telephone circuit but are shown Eor a better understanding of the present invention.
DESCRIPTION OF THE PREFERRED FMODIMENT
Referring now to the accompanying drawing, polarity guard BRl metalic oxide varistor MOV-l and the hookswitch HS-l and part o the basic telephone circuit are also ~hared by the hold circuit of the present invention. The metalic oxide varistor MOV-l may not be needed for the hold circuit protection unless surges are expected to be greater than l,000 volts. It should be noted that in a practical embodi-ment of the present invention using standard components circuitry has been tested to withstand 1,000 volt surges with a 10 mlcrosecond rise time to peak and a 1,000 microsecond eall time using a 100 ampere cur-rent limit. In the "off hold" state transistors Ql, Q2, Q3 and Q4 are all biased of and it can be readily seen that there are no low impedence paths from the positive rail to common rail when the transistors are in the off condition. ThereEore the high imped-ence nature of the circuit is demonstrated for the ~335~3~

oEf ~tate. Typical i~pedence m~asurem~nts in the voiceband at 3 volts rm~, indicate greater than 200,000 ohms impedence at 3,200 hert~.
To ~hange the circuit to the on state ton-hold) switch Sl is clo~ed momentarily when the tele=
phone is o~fhook to bia~ transistor Q~ to the on con dition~ Since ~ran~istor Q2 has turned on txansistor Ql i~ turned on by curr~nt forced into it's ba~e by tran~i~tor Q2 with transistor Ql turned on, current flow~ through diode CRl and re~i~tor ~2 as well a~
resistors Rl, R3, R4 and light emitting diode CR3.
Th~ voltage drop across forward biased diode CRl and resis~or R2 controls the emi~ter to base bias voltage for transistor Q2 in~uring sufficient bias to latch lS transiqtor Q2 on even u~der long telephone loop con-ditions ~ith the telcphone oEf-hook. Therefore the cir~uit i~ now latched into th~ "on" state (on hold3.-Re~i~tors R4 and R5 are ratioed to ensure that the proper bia~ is ~aintained in the on-state. Resistor R2 is a low value of approximately 10 ohm~, sufficient ~o add approxi~ately .2 volt~ to the forward voltage drop of diode C~l, the total approximately equal to .6 volts or ~nough to place trans.i~tor Q2 into the ac~ive linear region of operationO
Resi~tor~ Rl and R3 with light emitting diode C~3 now form~ the primary hoLd current load.
Light e~itting diod~ C~3 ~mit~ visible light to indi-cate tbe hold condition to the instrument user~ When the circuit goe~ into th~ ~on" state and is "latched", transistor Q4 i~ turned on by current to it's base ~rom tra~ tor Ql through re3i~tor Rll. Transis~or Q4 ln turns biases ~ran~istor Q3 to th~ on condition and into a saturation model Capacitor C3 charges to a steady state voltage determ.ined by input current through re3istor R14 and dl~charge~ current through diod~ CR5 ~which i~ forward bia~ed) and through resis-tor R9 back to common. The operating point of transis-tor Q2 i9 modi~E:Led by the di~charge current through diode -6- ~

, . .

~335~'~

CR5 but is not cut off as long as the emitter oE tran sistor ~2 is at a sufficiently high voltage~
Capacitor C3 and resistor R9 form a reEer~
ence voltage with a relatively long time constant of approximately 200 milliseconds for discharge~
Th~refore if the tip and ring voltage should suddenly drop as when an extension phone or the master phone goes off hook, capacitor C3 working with resistor R5 will maintain a reference potential at the base of transistor Q2 long enough for transistor Q2 to cut off as it emitter voltage is dropping rapidly.
Capacitor C3 will slowly update it's voltage to ac~
comodate rising tip and ring voltages such as during a change from off-hook to on-hook without dropping the hold condition. Once the circuit changes to an o~f state (transistor Q2 is cutoff, dropping the hold~
capacitors Cl and C2 will prevent retriggering of the circuit due to rising voltage at the emitter of transistor Q2, by capacitor Cl coupling the rising voltage to the base of transistor Q2 and clamping base and emitter to the same instantaneous voltage through capacitor C2. Therefore the circuit is ex-tremely resistant to transients r although a deliberate low voltage applied to the base of transistor Q2 through switch Sl will immediately trigger the circuit on.
Zener diode CR2 and metalic oxide varistor MOV 2 pro-tect the LED CR3 and transistor Q2~ respectively from high level transients such as lightening surge.
In the on state, a relatively high AC im-pedence of approximately 600 ohms can be obtained by ad~usting the values of resistors Rl and R3 while resistors R7 and R8 are an order of magnitude higher in values. Also in the on state DC current is regula-ted by the combination of the values of resistors R4 and R9 such that sufficient current is developed to hold the central office relay or other offhook detection circuitry in the central office. If neces-~335~

sary the zener voltage of diode CR2 can be set toprevent excessive current to light emitting diode CR3 on short loop conditions. Another advantage of the circuit is it's insensitivity to light emitting diode parameters such as the forward voltage require-ment making many different light emitting diode types suitable for use in the circuit assuming that maximum operating current is not exceeded. Resistors R6, R13 and R10 are adjusted to prevent leakage of the circuit in the "off" state and are sufficiently high in value to providing nonsaturation of the transistors when required.
It will be obvious to those skilled in the art that numerous modifications may be made of the present invention withowt departing from the spirit which shall be limited only by the scope of the claims appended hereto.

- .

,

Claims (11)

IN THE CLAIMS
1. A hold circuit for use with an associated telephone instrument connected via a telephone line to a central power source, said hold circuit comprising: a load circuit including electronic switch means connectable across said telephone line; manual switch means including a circuit connection to said electronic switch operated to render said electronic switch operated to connect said load circuit across said telephone line; and said load circuit further including biasing means connected to said electronic switch, operated simultaneously with connection of said load across said telephone line to latch said electronic switch in the operated condition.
2. A hold circuit as claimed in Claim 1 wherein:
said electronic switch includes first and second transistors.
3. A hold circuit as claimed in Claim 2 wherein:
said second transistor is of the PNP type and is connected between said manual switch means and the base of said first transistor, said second transistor operated in response to operation of said manual switch to trigger said first transistor to on condition.
4. A hold circuit as claimed in Claim 2 wherein:
said load circuit includes a load resistor in the collector circuit of said first transistor.
5. A hold circuit as claimed in Claim 2 wherein:
said load circuit further includes a light emitting diode in the emitter circuit of said first transistor operated in response to said load being connected across said telephone line to provide a visual indication of said connection.
6. A hold circuit as claimed in Claim 5 wherein:
wherein said first transistor emitter circuit further includes a current limiting resistor and a zener diode.
7. A hold circuit as claimed in Claim 3 wherein:
there is further included a varistor connected across the emitter collector path of said second transistor for lightening surge protection.
8. A hold circuit as claimed in Claim 1 wherein:
there is further included a varistor connected across said telephone line to protect said hold circuit against voltage surges.
9. A hold circuit as claimed in Claim 1 wherein:
there is further included a reference voltage source operated in response to said associated telephone going off hook to unlatch said load circuit from across said telephone line.
10. A hold circuit as claimed in Claim 9 wherein:
said voltage reference source comprises a capacitor and a resistor, and there is further included a second electronic switch means connected between said load circuit and said capacitor operated in response to said load being connected across said telephone line, to charge said capacitor.
11. A hold circuit as claimed in Claim 10 wherein: said second electronic switch comprises first and second transistors each of complimentary type to the other.
CA000482189A 1984-12-10 1985-05-23 High impedance transient resistant transistorized hold circuit Expired CA1233584A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US68003884A 1984-12-10 1984-12-10
US680,038 1984-12-10

Publications (1)

Publication Number Publication Date
CA1233584A true CA1233584A (en) 1988-03-01

Family

ID=24729403

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000482189A Expired CA1233584A (en) 1984-12-10 1985-05-23 High impedance transient resistant transistorized hold circuit

Country Status (1)

Country Link
CA (1) CA1233584A (en)

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