CA1232370A - Construction of short-length electrode in semiconductor device - Google Patents

Construction of short-length electrode in semiconductor device

Info

Publication number
CA1232370A
CA1232370A CA000502704A CA502704A CA1232370A CA 1232370 A CA1232370 A CA 1232370A CA 000502704 A CA000502704 A CA 000502704A CA 502704 A CA502704 A CA 502704A CA 1232370 A CA1232370 A CA 1232370A
Authority
CA
Canada
Prior art keywords
abutment
layer
substrate
silicon
doping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000502704A
Other languages
English (en)
French (fr)
Inventor
Frank F. Fang
Bertrand M. Grossman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1232370A publication Critical patent/CA1232370A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
    • H10D64/0133—Aspects related to lithography, isolation or planarisation of the conductor at least part of the entire electrode being a sidewall spacer, being formed by transformation under a mask or being formed by plating at a sidewall
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0163—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including enhancement-mode IGFETs and depletion-mode IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
CA000502704A 1985-04-17 1986-02-25 Construction of short-length electrode in semiconductor device Expired CA1232370A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/724,147 1985-04-17
US06/724,147 US4649638A (en) 1985-04-17 1985-04-17 Construction of short-length electrode in semiconductor device

Publications (1)

Publication Number Publication Date
CA1232370A true CA1232370A (en) 1988-02-02

Family

ID=24909225

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000502704A Expired CA1232370A (en) 1985-04-17 1986-02-25 Construction of short-length electrode in semiconductor device

Country Status (5)

Country Link
US (1) US4649638A (oth)
EP (1) EP0198446B1 (oth)
JP (1) JPS61241978A (oth)
CA (1) CA1232370A (oth)
DE (1) DE3676536D1 (oth)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0472726A4 (en) * 1989-05-12 1992-06-03 Oki Electric Industry Company, Limited Field effect transistor
EP0416141A1 (de) * 1989-09-04 1991-03-13 Siemens Aktiengesellschaft Verfahren zur Herstellung eines FET mit asymmetrisch angeordnetem Gate-Bereich
IT1239707B (it) * 1990-03-15 1993-11-15 St Microelectrics Srl Processo per la realizzazione di una cella di memoria rom a bassa capacita' di drain
JPH0521310A (ja) * 1991-07-11 1993-01-29 Canon Inc 微細パタン形成方法
EP0575688B1 (en) * 1992-06-26 1998-05-27 STMicroelectronics S.r.l. Programming of LDD-ROM cells
US5946501A (en) * 1994-05-24 1999-08-31 Asahi Kogaku Kogyo Kabushiki Kaisha Waterproof and/or water-resistant camera
KR100221627B1 (ko) 1996-07-29 1999-09-15 구본준 반도체장치 및 그의 제조방법
US5926708A (en) * 1997-05-20 1999-07-20 International Business Machines Corp. Method for providing multiple gate oxide thicknesses on the same wafer
US6482660B2 (en) 2001-03-19 2002-11-19 International Business Machines Corporation Effective channel length control using ion implant feed forward
US20070166971A1 (en) * 2006-01-17 2007-07-19 Atmel Corporation Manufacturing of silicon structures smaller than optical resolution limits
CN110957370B (zh) * 2019-12-27 2022-08-23 杰华特微电子股份有限公司 横向双扩散晶体管的制造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4037307A (en) * 1975-03-21 1977-07-26 Bell Telephone Laboratories, Incorporated Methods for making transistor structures
NL7706802A (nl) * 1977-06-21 1978-12-27 Philips Nv Werkwijze voor het vervaardigen van een half- geleiderinrichting en halfgeleiderinrichting vervaardigd met behulp van de werkwijze.
US4234362A (en) * 1978-11-03 1980-11-18 International Business Machines Corporation Method for forming an insulator between layers of conductive material
US4209350A (en) * 1978-11-03 1980-06-24 International Business Machines Corporation Method for forming diffusions having narrow dimensions utilizing reactive ion etching
US4256514A (en) * 1978-11-03 1981-03-17 International Business Machines Corporation Method for forming a narrow dimensioned region on a body
US4313782A (en) * 1979-11-14 1982-02-02 Rca Corporation Method of manufacturing submicron channel transistors
US4312680A (en) * 1980-03-31 1982-01-26 Rca Corporation Method of manufacturing submicron channel transistors
US4358340A (en) * 1980-07-14 1982-11-09 Texas Instruments Incorporated Submicron patterning without using submicron lithographic technique
US4334348A (en) * 1980-07-21 1982-06-15 Data General Corporation Retro-etch process for forming gate electrodes of MOS integrated circuits
US4430791A (en) * 1981-12-30 1984-02-14 International Business Machines Corporation Sub-micrometer channel length field effect transistor process
US4542577A (en) * 1982-12-30 1985-09-24 International Business Machines Corporation Submicron conductor manufacturing
US4503601A (en) * 1983-04-18 1985-03-12 Ncr Corporation Oxide trench structure for polysilicon gates and interconnects
US4546535A (en) * 1983-12-12 1985-10-15 International Business Machines Corporation Method of making submicron FET structure
US4539744A (en) * 1984-02-03 1985-09-10 Fairchild Camera & Instrument Corporation Semiconductor planarization process and structures made thereby
US4532698A (en) * 1984-06-22 1985-08-06 International Business Machines Corporation Method of making ultrashort FET using oblique angle metal deposition and ion implantation

Also Published As

Publication number Publication date
US4649638A (en) 1987-03-17
EP0198446A2 (en) 1986-10-22
JPS61241978A (ja) 1986-10-28
JPH058870B2 (oth) 1993-02-03
EP0198446B1 (en) 1990-12-27
EP0198446A3 (en) 1988-04-27
DE3676536D1 (de) 1991-02-07

Similar Documents

Publication Publication Date Title
US5689128A (en) High density trenched DMOS transistor
US6852597B2 (en) Method for fabricating power semiconductor device having trench gate structure
US4830975A (en) Method of manufacture a primos device
US5929481A (en) High density trench DMOS transistor with trench bottom implant
KR101184123B1 (ko) Ｍｏｓ 장치, ｍｏｓ 장치 포함 집적 회로 및 ｍｏｓ 장치제조 방법
KR100346617B1 (ko) 반도체 소자 및 그 제조 방법
US7015125B2 (en) Trench MOSFET device with polycrystalline silicon source contact structure
US5663079A (en) Method of making increased density MOS-gated semiconductor devices
US5182222A (en) Process for manufacturing a DMOS transistor
KR970705832A (ko) 마스크 수가 감소된 모스 게이트 소자의 제조방법(process for manufacture of mos gated device with reduced mark count)
US6150693A (en) Short channel non-self aligned VMOS field effect transistor
US4546375A (en) Vertical IGFET with internal gate and method for making same
US4561168A (en) Method of making shadow isolated metal DMOS FET device
US4296429A (en) VMOS Transistor and method of fabrication
CA1232370A (en) Construction of short-length electrode in semiconductor device
US5672530A (en) Method of making MOS transistor with controlled shallow source/drain junction
KR100880872B1 (ko) 감소된 도통-저항을 갖는 이중 확산 전계 효과 트랜지스터를 형성하는 방법 및 그러한 이중 확산 전계 효과 트랜지스터
US4735914A (en) FET for high reverse bias voltage and geometrical design for low on resistance
JP3965027B2 (ja) トレンチ底部に厚いポリシリコン絶縁層を有するトレンチゲート型ｍｉｓデバイスの製造方法
GB2045525A (en) Field effect transistor construction
KR20050058242A (ko) 낮은 기생 저항을 가진 트렌치 ｍｏｓｆｅｔ 디바이스형성 방법
KR0175367B1 (ko) 반도체 장치 및 그 제조 방법
GB2122420A (en) An IGFET and method for making an IGFET
EP0255973A2 (en) Contacts formed in minimum surface area of semiconductor devices
US5264381A (en) Method of manufacturing a static induction type switching device

Legal Events

Date Code Title Description
MKEX Expiry