CA1211802A - Lock-in amplifiers - Google Patents

Lock-in amplifiers

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Publication number
CA1211802A
CA1211802A CA000446242A CA446242A CA1211802A CA 1211802 A CA1211802 A CA 1211802A CA 000446242 A CA000446242 A CA 000446242A CA 446242 A CA446242 A CA 446242A CA 1211802 A CA1211802 A CA 1211802A
Authority
CA
Canada
Prior art keywords
phase
signal
output
input
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000446242A
Other languages
French (fr)
Inventor
Eric A. Faulkner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Princeton Applied Research Corp
Original Assignee
Princeton Applied Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Princeton Applied Research Corp filed Critical Princeton Applied Research Corp
Priority to CA000446242A priority Critical patent/CA1211802A/en
Application granted granted Critical
Publication of CA1211802A publication Critical patent/CA1211802A/en
Expired legal-status Critical Current

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Abstract

ABSTRACT OF THE DISCLOSURE
A lock-in amplifier includes a phase-sensitive detector having a signal input and a reference input.
The output signal from detector is compensated for offset errors which are dependent on the frequency of the reference input and on ambient temperature changes by having a correction signal added to it in an adder. Changes in gain are compensated for by the addition of a compensation signal in an adder. Phase errors are compensated by providing a phase shifter for the reference input. The dc correction, gain compensation and phase correction signals are obtained from a controller which provides digital signals the values of which are derived from a memory, a temperature transducer and a reference input frequency meter.

Description

~2118{~2 Lock-in amplifiers BACKGROU~D OF THE INUENTICY
.

The lock-in amplifier is a measuring instrument having two input voltages, cannDnly knawn as the signal input and the reference input, and one output which is either in the form of an analog voltage or in the form of a digital word.
The essential part of the processing done ~y a lock-in a~plifier is the ccnbination of a voltage derived fram the signal input with a voltage derived fram the reference input in a unit ~omm~nly knawn as a phase-sensitive rectifier or a demodulator but having the essential function of a special-purpose analog multiplier follawed by a 1GW-pass filter. Under suitable conditions this a~eration may result in the accurate measurement of a signal, ac~,~anied by noise of enor-mously greater amplitude than that of the signal itself.
It is an object of the invention to provide a lock-in amplifier which provides an output signal of improved accuracy.

SU~ gY OF THE INvENrIoN

According to the invention a lock-in amplifier includes a phase-sensitive detector having a signal input and a reference input, adding means for adding an offset correction signal to the output of the phase-sensitive detector, control means for prG~iding such correction signal to the said adding means, the control means having an input derived from the reference input to the phase-sensitive detector so that the magnitude of the offset correction signal depends on the frequency of the reference input.
Preferably an ambient te~perature measuring device is pra~ided the output of which is applied to the said cantrol means so that the magnitude of the offset correction signal also depends on the ambient temperature.
Preferably also a campensation signal is added to the output of the phase-sensitive detector to CGnpensate for frequency dependent ~~ and temperature dependent changes in the gain of the autput of the phase-sensitive detector.

121~802 In a preferred embodiment the oontrol means is a digital co~-troller which provides a digital signal to the added means repre-senting the magnitude of the dc offset ~ignal and a digital signal to the further adding means representing the magnitude of the ccmpensa-tion signal.
Output filter means may be prcvided through which the outputof the phase-sensitive detector is passed, the output filter having a zero response at the frequency of the reference input and at harmonic frequencies thereof.
Input filter means may also be provided through which the signal input to the phase-sensitive detector is passed.
To compensate for any frequency dependent phase shifts through the circuit a voltage-controlled phase shifter may be provided through which the reference input to the phase-sensitive detector is passed. The control voltage for t~e phase shifter is supplied from the control means.

ERIEF DESCRIPTIoN OF THE DRAWINGS

In order that the invention may be more fully understood ref-erence will now be made to the accompanying drawings in which:
Figure 1 illustrates in block diagrammatic form a lock-in amplifier emkodying the invention, and Figure 2 illustrates in a more detailed fonm the final switching filter of Figure 1.

DESCFIPTIoN OF THE PREFERRED EMEODI~r In the circuit shown in Figure 1, the reference input at an input tenminal 1 is shown as being processed ~y a reference processor
2 which modifies the waveform into a convenient fonm (usually a square-wave) and also provides any required phase-shift under manual or computer control. The design of reference processo,r 2 is well known and will not be discussed here. The output of reference processor 2, which will be referred to as the reference voltage, is connected to several units which will be described below.

The phrase "reference frequency" will be used to mean the fundamental Fourier c~nponent of the reference voltage, which is assumed to be periodic.
Considering ncw the signal path, the signal input at a signal input termin21 3 is amplified by an ac fiign2l amplifier 4 of variable ~ain, which may inc~p~rate filters, and then filtered by an input switching filter 5. miS filter 5 is an analog filter of the class in which the resonance frequency is equal to a very good approxima-tion to some subn~ltiple (typically 1/50) of the frequency of a switching input. An example of a filter of this class is the well-known switched-capacitor filter. In the present circuit the swqtch-ing input to switching filter 5 is derived from the reference voltage by means of a frequency multiplier 6 having a multiplication factor (typically 50) equal to the inverse of the subnultiple which char-acterises switching filter 5. m e frequency nultiplier 6 is typ-ically based on a phase-lo~k loop. The result of this arrangement is that awitching filter 5 is tuned to a fre~uency which is very close to the reference frequency. The functions of switching filter 5 are to prevent the circuit from responding to co~ponents in the signal input which are at or near hanmonics of the reference frequency, and also to increase the dynamic range of the circuit.
m e output from switching filter 5 is connected to one of the inputs of the demodulator or phase-sensitive rectifier 7, the other input being derived from the reference processor 2 via a voltage-oon-trolled phase shifter 8. m e oontrolling voltage for vDltage-con-trDlled phase shifter 8 is derived from a digital-to-analog converter (n~c) 9 the digital input to which is derived from a digital ccn-trDller 10. Digital controller 10 has a number of other functions which will be described belcw. The primary purpose of Fhase shifter 8 is to cancel the effects of frequency-dependent phase shifts resulting from the imperfect operation of switching filter 5.
The demodulator 7 contains a low-pass filter and if necessary a dc amplifier, and its output is processed in sequence by the following three units:
(a) analog adder 11 ~y means of which a dc level is added to the demodulator output. This level is derived from a D~C 12 the 1%1~8~Z

digital i~put to which i8 derived frcm the digital controller 10. m e purpose of this arrangement is to cancel the effects of frequency-dependent and te~perature-dependent offsets generated in the demodulator 7.
S tb) analog adder 13 in conjunction with nult~plying digital-to-analog converter (Mn~C) 14 the digital input to Mn~C 14 being derived fm m digital controller 10. m e purpose of this ar-rangement is to oancel the effects of frequency-dependent and temperature-dependent changes in the gain of the other comr 1~ ponents of the system.
(c) ~witching filter 15, an analog filter the characteristics of which are oontrolled by a switching input derived frcm reference processor 2 and also by a digital input derived from digi~al controller 10. Ihe output of switching filter lS is the analog output frcm the circuit, which although shcwn in Figure 1 as the sole output is of such a nature as to be readily convertible into digital fonm by a suitable analog-to-digital converter.

m e purpose of switching filter 15 is to prevent the system out-put frcm containing ac co~ponents at the reference frequency and/or its h2rmonics. It is shown in greater detail in Figure 2. It con-sists of an analog adder 20, Mn~C 21, a negative integrator 22 (i.e.
a unit with transfer function equal to a negative constant multiplied by l/s), and tw~ sa~ple-hold units 23 and 24 with a NCr gate 25 between their enable inputs, the interoonnections being as shown in Figure 2. It can be proved that this arrangement consists of a time-varying linear system with a frequency-response function having zeros at the fundamental frequency of the switching input (assumed periodic) and all its h~nn~nics, and with a dynamic response deter-~uned for any given switching frequency by the digital input to Mn~C
21. In use, a ditigal word appropriate to the palticular reference frequency in use is supplied by digital controller 10 to Mn~C 21.
The special advantages of the circuit described above are ~ased on the action of the digital controller 10 (which at the present time would normally be implemented with a micrcprocessor) and its associ-ated frequency meter 16, te~perature transducer 17 and calibration memory 18. Whenever the instrument is in use, the temperature transducer 17 and frequency meter 16 supply digital inputs to ccnr troller 10, and these inform the oontrDller of the 0 rrent values of temperature a~d reference frequency. On the basis of these input8, controller 1~ selects fram the ~libration ~emory lB suitable digital w~rds to be latched into D~C 12, D~C 9 and MD~C 14 to cancel the effects of offset err~rs, phase errors and gain errors respec-tively. The cDntroller also supplies a suitable frequency-~ependent word to MD~C 21 to optimize the dynamic response of switching filter lS.
The calibration memory 18 is ~upplied with its contents by the following calibration prooedure. Before the instrument is first used, and at suitable intervals thereafter, the instrument is con-nected to a oamputer-controlle~ calibration system (not shown in the diaarams~ whi-h is able to supply signal and reference inputs of any required frequency and phase, to vary the temperature of the instru-ment over the specified operating ranqe, and to a~cept a measure of the output in digital form. On the basis of the measured output values for various values of input frequency and phase and of tem-perature, it is a relatively si~ple matter for the calibration system 2n to compute apprcpriate digital words and present them to a calibra-tion input 19 of the controller for storage in cal~bration nxsn~ry 18. The r~libration memory lR is of such a design as to be able to retain its contents when the power supply to the instrument is switched off.
I claim:

Claims (8)

1. A lock-in amplifier including a phase-sensitive detector having a signal input and a reference input, adding means for adding an offset correction signal to the output of the phase-sensitive de-tector, control means for providing such correction signal to the said adding means, the control means having an input derived from the reference input to the phase-sensitive detector so that the magnitude of the offset correction signal depends on the frequency of the reference input.
2. An amplifier as claimed in Claim 1 in which an ambient temper-ature measuring device is provided the output of which is applied to the said control means so that the magnitude of the offset correc-tion signal also depends on the ambient temperature.
3. An amplifier as claimed in Claim 2 in which the said control means is arranged to provide a digital signal representing the magnitude of the offset correction signal and digital-to-analog conversion means are provided for converting said digital signal to an analog signal.
4. An amplifier as claimed in Claim 2 in which further adding means are provided for adding a compensation signal to the output of the phase-sensitive detector the said control means providing the compensation signal, which signal is derived from the reference input and the output of the ambient temperature measuring device so that the further adding means compensates for frequency dependent and temperature dependent changes in the gain of the output of the phase-sensitive detector.
5. An amplifier as claimed in Claim 4 in which said control means is arranged to provide a digital signal representing the said compen-sation signal to a multiplying digital-to-analog converter together with a further input being the output of the said adding means, and wherein the output of the said multiplying digital-to-analog con-verter is supplied to the further adding means.
6. An amplifier as claimed in Claim 5 in which output filter means are provided through which the output of the phase-sensitive de-tector is passed, said output filter means having a zero response at the frequency of the reference input and harmonics thereof.
7. An amplifier as claimed in Claim 6 in which input filter means are provided through which the signal input to the phase-sensitive detector is passed.
8. An amplifier as claimed in Claim 7 in which the reference input to the phase-sensitive detector is passed through a voltage con-trolled phase shifter, the control voltage to which is supplied from said control means whereby to compensate for any frequency dependent phase shifts in the circuit.
CA000446242A 1984-01-27 1984-01-27 Lock-in amplifiers Expired CA1211802A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000446242A CA1211802A (en) 1984-01-27 1984-01-27 Lock-in amplifiers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA000446242A CA1211802A (en) 1984-01-27 1984-01-27 Lock-in amplifiers

Publications (1)

Publication Number Publication Date
CA1211802A true CA1211802A (en) 1986-09-23

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Family Applications (1)

Application Number Title Priority Date Filing Date
CA000446242A Expired CA1211802A (en) 1984-01-27 1984-01-27 Lock-in amplifiers

Country Status (1)

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CA (1) CA1211802A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6515272B1 (en) 2000-09-29 2003-02-04 Advanced Micro Devices, Inc. Method and apparatus for improving signal to noise ratio of an aerial image monitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6515272B1 (en) 2000-09-29 2003-02-04 Advanced Micro Devices, Inc. Method and apparatus for improving signal to noise ratio of an aerial image monitor

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