CA1201514A - Programmed electronic keycorder unit - Google Patents
Programmed electronic keycorder unitInfo
- Publication number
- CA1201514A CA1201514A CA000412628A CA412628A CA1201514A CA 1201514 A CA1201514 A CA 1201514A CA 000412628 A CA000412628 A CA 000412628A CA 412628 A CA412628 A CA 412628A CA 1201514 A CA1201514 A CA 1201514A
- Authority
- CA
- Canada
- Prior art keywords
- unit
- card
- count
- counter
- card unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
- G07F7/02—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by keys or other credit registering devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q20/00—Payment architectures, schemes or protocols
- G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
- G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
- G06Q20/343—Cards including a counter
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- Engineering & Computer Science (AREA)
- Business, Economics & Management (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Accounting & Taxation (AREA)
- Computer Networks & Wireless Communication (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Strategic Management (AREA)
- General Business, Economics & Management (AREA)
- Theoretical Computer Science (AREA)
- Storage Device Security (AREA)
- Credit Cards Or The Like (AREA)
- Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
- Lock And Its Accessories (AREA)
Abstract
ABSTRACT OF THE DISCLOSURE
A miniaturized card unit, resembling a standard credit card, incorporates solid state counter, a multi-plexer means, and a small battery. The counter may be incremented or decremented in accordance with a direc-tion control signal. A multiplexer in the card unit is releasably engageable with the demultiplexer provided in a card reader unit. Control signals, simultaneously app-lied to the multiplexer and demultiplexer transfer the count stored in the card unit to decoder driver circuits which drive a display for visually displaying the deci-mal count stored in the card. A logical circuit monitors selected segments of the display to enable operation of the device controlled by the card reader unit so long as the card inserted therein contains a non-zero count. The logical circuit prevents operation of the device upon the occurrence of a zero count as well as the absence of a card unit. A relatively low frequency clock is utiliz-ed to control the illumination of the card reader dis-play as well as the generation of the multiplexing signals. Signals representative of the device usage are applied to the card unit counter for decrementing the count. A new count is introduced into the card unit by insertion into a card programmer unit having settable thumbwheel switches for setting a down counter. The presence of a card unit and the closure of a program switch causes simultaneous incrementing of the card unit counter and decrementing of the card program counter.
When the card programmer unit counter is decremented to zero, incrementing of the card unit counter is automati-cally terminated. The card programmer unit display visu-ally displays the count in the card unit counter confirm-ing that the desired count has been placed in the card unit, said display incorporating demultiplexer, driver and control circuits similar to those provided in the card reader unit. The use of cascaded gating means prevents false count pulses from being transferred to the card unit counter when the end count is reached.
A miniaturized card unit, resembling a standard credit card, incorporates solid state counter, a multi-plexer means, and a small battery. The counter may be incremented or decremented in accordance with a direc-tion control signal. A multiplexer in the card unit is releasably engageable with the demultiplexer provided in a card reader unit. Control signals, simultaneously app-lied to the multiplexer and demultiplexer transfer the count stored in the card unit to decoder driver circuits which drive a display for visually displaying the deci-mal count stored in the card. A logical circuit monitors selected segments of the display to enable operation of the device controlled by the card reader unit so long as the card inserted therein contains a non-zero count. The logical circuit prevents operation of the device upon the occurrence of a zero count as well as the absence of a card unit. A relatively low frequency clock is utiliz-ed to control the illumination of the card reader dis-play as well as the generation of the multiplexing signals. Signals representative of the device usage are applied to the card unit counter for decrementing the count. A new count is introduced into the card unit by insertion into a card programmer unit having settable thumbwheel switches for setting a down counter. The presence of a card unit and the closure of a program switch causes simultaneous incrementing of the card unit counter and decrementing of the card program counter.
When the card programmer unit counter is decremented to zero, incrementing of the card unit counter is automati-cally terminated. The card programmer unit display visu-ally displays the count in the card unit counter confirm-ing that the desired count has been placed in the card unit, said display incorporating demultiplexer, driver and control circuits similar to those provided in the card reader unit. The use of cascaded gating means prevents false count pulses from being transferred to the card unit counter when the end count is reached.
Description
PROGRAMMED ElECTRONIC KEYCORDER UNIT
FIELD OF THE INVENTION
The present invention relates to control devices and, more particularly, to a controL device for limiting access to a machine or other equipment or device to authorized personnel possessin~g a card unit which furth-er contains stored data controlling the e~tent of access to the machine permitted to the holder of the card unit.
BACKGROUND OF THE INVENTION
A number of applications e~ist wherein it is desir-able to limit access to machines to only those personshaving proper authorization and further to limit the extent of such access. As one example, it is sometimes desirable to limit the use of copier machines to select-ed personnel. The copier machine is often provided with a substantially tamper proof counter for maintaining a cumulative count of the number of copies which have been produced to date. One standard technique for authoriz-ing use of the copier machine is to provlde selected personnel with a conventional key arranged to release a 2Q cooperating mechanical lock which, when opened, may be arranged to provide for the completion of an electrical circuit to provide power to the machine. Since keys of this type may be simply, readily and ine~pensively repro-duced, one standard prior art approach to avoid simple reproduction of keys is described in ~.S. Patent No.
3,436,j30, issued April 1, 1969 and assigned to the assignee of the present application, and which discloses a control unit forming a part of the copier machine and arranged to releaseably receive a portable plug-in unit containing an electromechanical counter and an electri-cal or electronic circuit element or elements which, when the portable unit is plugged into the control unit, 5~
serve to operate a relay which couples the machine to a local power source. The control unit is also preferably provided with an electromechanical counter.
The machine or device whose access is being control-led generates pulses representative of machine usage. Inthe copier machine example, each pulse preferably repre-sents the reproduction oE a single copy. Each pulse is simultaneously applied to the electromagnetic counters oE the portable, plug-in unit and the control unit.
Ideally, the counter of the control unit should contain a count equal to the grand total of the individual counts in each of the portable plug-in units used in conjunction with that copier machine.
The above mentioned accountability system, although reasonably satisfactory for cost allocation purposes, fails to provide any means for limiting the e~tent of access which any authorized holder of a portable, plug-in unit.
This limitation led to the development of the sys-tem described in U.S. Patent No. 3,921,875, issued Novem-ber 25, 1975 to the assignee of the present application.
The apparatus described in the last mentioned patent also comprises a control unit forming part of the mach-ine and a portable, plug-in unit. The portable unit contains an electromechanical counter which may be pre-set to any desired count from 0 to a count of up to 99999, for e~ample. The portable unit is also provided with an electrical circuit for operating a relay to couple the machine whose usage is being regulated to a local power source. Pulses generated by the machine and representative of machine usage are applied to the elec-tromagnetic counter of the control unit and to the ~2~
electromagnetic counter of the portable unit to respec-tively increment the control unit counter and decrement the portable unit counter. When the count in the port-able unit counter has been decremented to a predetermin-5 ed value (preferably 0) a switch is opened to deenergizethe aforementioned relay and thereby decouple the mach-ine from its source of power.
The count itl the electromechanical counter of the plug-in unit may be reset by opening the plug-in unit through the use of a mechanical key. Alternatively, the count may be advanced through the use o a pulsing device which applies the number of pulses to the electro-mechanical counter equal to the desired count to be stored therein. This is a sluggish and tedious operation due to the electromechanical nature of the counter which is further subject to wearing over a period of continu-ous use. The portable plug-in units and control unit are also unnecessarily large and subject to wearing and breakdown due to the large number of mechanical moving parts utilized in these units.
In addition to the above disadvantages, the port-able unit housing may be broken into rather easily and the electromagnetic counter mechanism may easily be tam-pered with to create a non-zero count condition, thereby destroying system security. The electromechanical nature of the device also lends itself readily to evaluation of the contents to further aid unauthorized personnel in their quest to defeat the security measures and thereby permit unauthorized use of the machine or device being protected against unauthorized use.
.1 , . . .
BRIEF DESCRIPTION OF THE INVENTION
The present invention avoids all of the disadvantag-es of prior art systems and is characterized by compris-ing three basic subassemblies, each utilizing solid state circuits to totally avoid the disadvantages of large size and weight and wearing of components normally encountered in the prior art devices, such as those des-cribed, for example, in the above mentioned U.S. pat-ents, and which present invention yields additional ad-vantageous features as will be more fully described.
The three basic units employed in the solid statesystem of the present invention are a card unit, card reader unit and card programmer unit. The card unit is comprised of miniaturized solid state circuitry includ-ing an up/down counter, a multiplexer and a battery, allof which are arranged within a housing whose overall dimensions are of the order of a conventional credit card.
The card programming unit is substantia]ly compris~
ed of all solid state components including a display and driver circuit. When a card unit is inserted into the card programmer unit, a control circuit sequentially transfers the count in the card unit counter through the card unit multiplexer and the card programmer unit demul-tiplexer to a driver circuit for displaying the contentsof the card unit counter.
The count desired to be added to the card unit is set into manually settable switches.
Depression of a program start button in the pres-ence of a card unit sets the count of the settableswitches into the card programmer unit counter and enab-les a normally disabled clock in the card programmerunit counter. Pulses from the local oscillator increment the count of the card unit counter and simultaneously decrement the count of the card programmer counter.
I.ogical gates, which continuously monitor the card prog-rammer counter, deactivate the local oscillator and sim-ultaneously disable a previously enabled gate preventing spurious oscillator pulses from reaching the card unit counter. The card programmer display displays the count in the card unit counter to provide positive confirma-tion that the correct count has been added to the card unit, as well as displaying the count in the card unit prior to and during insertion of the desired count.
A card reader unit, which is interconnected with the machine whose use and extent of use is to be controlled, is provided with solid state decoder drivers for driving a visual display.
A control unit controls the card unit multiplexer in synchronism with a card reader unit solid state demultiplexer for sequentially transferring the count in the card unit counter to the dècoder driver circuit.
The card reader unit further incorporates a local oscillator which operates the control unit for operating the multiplexer and demultiplexer circuits in synchron-ism and provides time division pulses to the visualdisplay.
The display driver circuits convert the data trans-ferred thereto from the card unit counter into signals appropriate for illuminating the display device which is preferably of the seven segment LCD (liquid crystal display) type. Selected ones of the signals of each decimal digit position of the display are coupled with i, $~5~
logical gating circuitry which operates to energize a relay for providing a machine enabling signal and for deenergizing a relay to disable the machine when the count in the card unit counter is decremented to zero by pulses derived from the machine, which zero count is also displayed by the card reader unit display.
Pulses representative of machine usage are applied to the card unit counter through the card reader unit to decrement the contents of the card reader unit counter upon the occurrence of each count pulse.
The simplified, miniaturized, solid state design eliminates the need for a card reader unit display and its attendant cost and weight, reducing the card reader unit, for example to a weight of no greater than one ounce, as compared with key counter units which, in addition to being relatively large and bulky, are more than five times the weight of the card unit.
The solid~state multiplexer and demultiplexer units si&nificantly reduce the electrical connections required between the card programmer unit and the card unit and between the card reader unit and the card unit. The small battery employed in the card unit is capable of a significantly long, useful operating life due to the elimination of a display in the card unit and the provision of single, visual display means in only the card reader and card programming units~ yielding a signi-ficant reduction in cost and which is a direct function of the number of card units employed within a single system. As an alternative arrangement, the card unit may employ a rechargeable battery which is designed to be recharged either during the time that the card unit is being programmed to receive a new count or at the time ;
the card unit is inserted into a card reader unit.
The system enhances centralized control or, alterna-tively, provides a prepayment capability.
The system employs extremely low power solid state integrated circuits as wel.l as display devices which consume almost no power since they operate with low conductivity electro- statics and thereby consume signi-fi.cantly less power than prior art. devices presentl.y in use.
The ci.rcuit connections required to be made to the card reader unit serve as additional security means since specific knowledge of the machine construction would be required to have any reasonable chance of making the required connections.
OBJECTS OF THE INVENTION AND
BRIEF DESCRIPTION OF THE FIGURES
It is therefore one object of the present invention to provide a novel~ highly sim`p~lified solid state con-trol system for controlling access to a machine and the extent of such access by means of a preprogrammed card ~nit having a solid state counter selectively engageable with a card reader unit for displaying the present count in the card reader unit, for decrementing the count responsive to machine usage and for locking the machine against further usage when the count in the card unit reaches a predetermined count.
Another object of the present invention is to pro-vide a control system of the type described in which solid state programming means is provided for simply, rapidly and accurately entering a preprogrammed count into the solid state counter of a card unit and includ-ing display means for displaying the contents of the card unit counter to confirm entry of the preprogrammed count.
s~
Still another object of the present invention is to provide a control system of the type described in which system security is obtained through the provision of a card identity code which is examined by a key acceptor unit for validity in order to enable the device being controlled.
The above, as well as other objects of the present Lnvention, will become apparent when reading the accom-panying description and drawing in which:
Fig. 1 is a schematic diagram of a card reader unit embodying the principals of the present invention.
Fig. la shows a perspective view of the card unit exterior.
Fig. 2 is a schematic diagram showing the solid state card programmer employed for introducing a prepro-grammed count into a card unit of the type shown in Fig.
Fig. 3 is a schematic diagram of a card reader unit arranged for selective insertion of a card unit of the type shown in Fig. 1 for controlling the access and extent of access of a machine coupled thereto.
Fig. 4a shows a front view of the card reader unit.
Fig. 4b shows a sectional view of the card unit of Fig. 4a and an end view of the card unit of Fig. la.
DETAILED DESCRIPTION OF THE INVENTION
One preferred embodiment of the card unit 10 of the present invention is shown in Figs. 1 and la, Fig. la showing the outward physical appearance thereof, wherein it can be seen that the card unit 10 comprises a thin~
rectangular shaped body 12, preferably formed of plas-tic, and containing solid state circuits (to be more ~2~
g fully described) embedded therein. The body 12 generally resembles a conventional credit card but has a slightly greater thickness T. One end 12a, of a reduced thickness portion is provided with an edge connector assembly 13 for insertion into an edge connector socket to be more fully described, said socket 13 including individual end terminals 13a.
The card unit 10 comprises a solid state counter 14 oE the binary coded decimal type which, in ~he preferred embodiment of Fig. 1 is further comprised of four C~IOS
type 4510 integrated circuits or stages 14-1 through 14-4 electrically connected to form an up/down counter 14, each stage capable of storing a decimal number. A
battery 16 powers the counter 14. Battery 16 is shown schematically but may, for example, be comprised of a pair of 1.5 volt watch batteries of the type 393BP, and being connected in series. Diode 18 serves as a blocking circuit device to prevent charging o~ battery 16 by external connections.
20Each counter stage 14-1 through 14-4 has its clock input 14-la through 14-4a``connected in common to a count input terminal 20. The carry outputs 14-lb through 14-3b of stages 14-1 through 14-3 are electrically connected to the carry inputs 14-2c through 14-4c of counter 25stages 14-2 through 14-4.
The binary coded decimal output terminals 14-ld through 14-lg and 14-4d through 14-4g are selectively connected to respective inputs 22a through 22h and 24a through 24h of solid state multiplex circuits 22 and 24 which are preferably type 4052 integrated circuits which multiplex ~i.e. sequentially transfer) the digital data stored in counter 14 to the output terminals 22i and 22j s~
of circuit 22 and 24i and 24j of circuit 24. The multiplexed data output terminals being labelled A, B, C
and D respectively. Input lines labelled E and F are adapted to apply binary type control signals derived from an external source 30 or 90 to the control termin-als 22k and 221 of circuit 22 and 24k and 241 of circuit 24 to control the multiple~ing and demultiplexing opera-tion as will be more ully described.
Control inputs 14-lh through 14-4h of the counter stages comprising counter 14 are connected in common to a terminal 26 arranged to be electrically connected with either the card reader unit or the card programmer unit and to receive a binary level signal from the card reader unit causing the counter to be decremented when count pulses are applied to terminal 20 and alternative-ly arranged to receive an opposite level binary signal causing counter 14 to be incremented when count pulses are applied to input 20 by the card programming unit 30, which operations will be more fully described hereinbe-low.
The embodiment of thè card unit 10 shown in Fig. 1 is thus capable of storing any count from 0000 through 9999. Obviously, the count capacity may be increased by adding one or more additional counter stages, if desired.
The card programmer unit 30, as shown in Fig. 2, functions to generate an exact number of pulses equal to the count desired to be added to a card unit 10 inserted into the card programmer unit 30.
This is accomplished by means of thumbwheel switch-es 32 through 38 each having their binary coded outputs electrically connected to associated inputs of a counter 40 (comprised of solid state counter stages 40-1 through 3~2(~5~
40-4) which are preferably type 4510 counter stages arranged to operate as a decrementing counter.
A local power supply 42 provided in card programmer unit 30 converts a 115 VAC source through transformer Tl and full-wave bridge 44 to a DC signal. A type 7805 Cil^CUit 46 provides a stabilized +5 VDC output which is coupled through terminal 48 forming part oE a card programmer unit receptacle to terminal 50 forming part of the edge connector 12a of card unit 10 (shown in Fig.
1). Termina] 52 of card unit 10 is, in turn, coupled to terminal 54 of card programmer unit 30, shown in Fig. 2.
Thus, when a card unit 10 is inserted into the connector forming part of the card programmer unit 30, an electri-cal circuit is completed from the ~5V terminal 48 to terminal 50 of the card unit 10 and back to the card programmer unit 30 through lead 51 and terminal 54, which voltage is applied to the set input 56a of bista-ble flip-flop 56, causing its Q ouput 56b to go high.
This voltage appears at terminal 58a of programming switch 58 and, when switch button 58b is pressed, comple-tes an electrical circuit to stationary terminal 58c to apply a high signal to the set input 60a of bistable flip-flop 60 causing its Q output 60b to go high and causing its Q output 60c to go low.
The Q output of bistable flip-flop 60 is simultan-eously applied to each preset input 40-la through 40-4a of the counter stages of counter 40 causing the binary values, established by the settings of thumbwheel switch-es 32-38, to be preset into a respective one of the counter stages 40-1 through 40-4. Thumbwheel switches 32 through 38 are of a conventional type in which, by opera-tion of a control knob such as control knob 32e, any number from decimal "zero" through decimal "nine" may be set within window 32f thereby providing a four bit binary output which is coupled to the input of the associated counter stage.
S The Q output of bistable flip-flop 60 is further simultaneously applied to the reset terminal 62a of a type 555 timer which, by appropriate selection of the resistance va]ues of resistors Rl and R2, and the capaci-tance values of capacitors C1 and C2, is operated as an oscillator which, in the present application, generates pulses at a rate of the order of 2kHz at its output terminal 62b. The output of oscillator 62 is coupled to input 64a of NAND gate 64 whose input 64b is also coupled to the Q output 60b of bistable flip-flop 60.
The Q output of flip-flop 60 removes the reset level from inputs 40-lc through 40-4c of counter 40 enabling counter 40 to be preset.
The Q output of bistable flip-flop 60 also enables NAND gate 64 to pass clock pulses from clock source 62.
These pulses are simultaneously gated through NAND gates 66 and 68 which are wired to operate as inverters.
Output 66a of NAND gate 66 is coupled in common to the clock inputs 40-lb through 40-4b of the counter `stages of counter 40, which counter is operated as a decrement-ing counter whose count is reduced from the settingpreset into the counter 40 by thumbwheel switches 32 through 38, toward a zero count.
Output 68a of NAND gate 68 is coupled through terminal 70 of card programmer unit 30 to terminal 20 of card unit 10 shown in Fig. 1 causing the count in counter 14 to be incremented simultaneously with the J
~5~.~
decrementing of the count in counter 40.
Assuming that the counter 40 of card programmer unit 30 has been preset to introduce a decimal count of 1000 into the card unit counter 14, after clock source 62 has applied 1000 pulses to card unit counter 14 and to card programmer unit counter 40~ all four counter stages 40-1 through 40-4 will have been decremented to zero. A pair of eight-input NOR gates 74 and 76 have respective ones of their inputs electrically connected i0 to respective ones of the binary coded outputs of count-er stages 40-1 through 40-4. Gate 74 has its eight inputs respectively coupled to four outputs of stage 40-4 and stage 40-3, while gate 76 has its eight inputs respectively coupled to the four binary coded outputs of stages 40-2 and 40-1, respectively.
Diodes Dl and D2 electrically connect the outputs of gates 74 and 76 to common terminal 78 arranged between resistor R3 and capacitor C3.
When all si~teen outputs of counter stages 40-1 through 40-4 are low~ representing the decimal number 0000, the outputs of both gates 74 and 76 go high raising common terminals 78 to the +5V level, which level is simultaneously applied through conductor 80 to reset inputs 56c and 60d of bistable flip-flops 56 and 60, respectively. The Q output of bistable flip-flop 60 simultaneously disables gate 60 and terminates the opera-tion of clock source 62 preventing any noise from inad-vertently pulsing the card unit counter 14 and thereby adding a false count to the card unit. The Q output of flip-flop 60 goes high preventing counter 40 from being accidentally preset. The resetting of bistable flip-flop 56 causes its Q output to go low preventing the program-- 14 _ ming operation from being repeated in the event that program button 58 is accidentally operated before the card unit 10 which has just had a preprogrammed count added to it, has been removed from the card unit recep-tacle forming part of card programmer unit 30.
The card programmer unit 30 ls further provided with a solid state demultiplexer and control circuit 82, a display driver ci.rcuit 84 and a four di.git displ.ay 86 which are substantially identical to Like circuits provi-ded within card reader unit: 90 (to be more f~llly describ-ed hereinbelow). The inputs 82a through 82d of demultipl-exer 82 receive the A through D outputs of multiplexers 22 and 24 provided in card unit 10. The demultiplexer and control circuitry 82 transfers the binary coded count stored in the stages of card unit counter 14 through multiplexer circuits 22 and 24 and demultiplexer 82 to the display driver circuitry 84 for illuminating display 86, which is preferably provided with four deci-mal display units, each being of the seven segment decimal type. A detailed description of the transfer of data from the card unit counter 14 to the card reader unit visual display 86 will be set forth in detail hereinbelow, it being understood that the operation of the same circuitry within the card programmer unit 30 is substantially identical to that provided in card reader unit 90.
Card programmer unit 30 thus makes it possible to enter an exact preprogrammed count into the card unit counter 14 in a simple, rapid manner, the entire opera-tion taking, at most, a few seconds including set up,insertion and removal of the card unit 10. The display 86 provided within the card programmer unit 30 provides ~ 2~
direct visual confirmation that the preprogrammed number has been correctly introduced into the card unit lØ The display 86 also serves as a means to ascertain the count within the card unit 10 before initiating a programming operation and further enables a preprogrammed count to be added to a card unit counter 14 which has other than a æero count when first introduced into the card program-ming unit 30.
The card reader unit 90, shown ln detail in ~ig. 3, perEorms the functions of: displaying the four digit decimal number contained wlthin the memory of the card unit 10 inserted into the card reader unit receptacle and enabling the machine being controlled by the card reader unit 90 when the count in the card unit 10 is other than zero. However, when the count in the card unit 10 reaches zero, the card reader unit 90 causes the machine to be made inoperative.
Card reader unit 90 recovers the count in card reader unit 10 by demultiplexing the binary coded inform-ation on the four lines labelled A through D which arerespectively coupled to solid state demultiplexer cir-cuits 92 and 94 which are preferably type 4052 integrat-ed circuits. Input terminals 96 and 98, receiving data bits A and B, are coupled to inputs 92a and 92b of demultiplexer circuit 92 while terminals 101, 102 couple data bits C and D to inputs 94a and 94b of demultiplexer circuit 94.
Control signals for controlling the transfer of the count from card unit 10 to the card reader unit 90 are derived from solid state circuit 104 which is preferably a type 4029 circuit having a clock input 104a coupled to the output of a lOOHz oscillator 106 for developing ~2~)~5~
binary coded decimal control signals E and F at the outputs 104b and 104c, respectively.
The E and F signals are applied: through terminals 108 and 110 to the control inputs 22k, 221 and 24k, 24~
of multiplexer circuits 22 and 24 in card unit 10 (shown in Fig. l); and are simultaneously applied to the con-trol inputs 92c, 92d and 94c, 94d of demultiplexer circuits 92 and 94; and to the inputs 112a and 112b of a binary coded decimal to decimal decoder circuit 112 ; 10 which is preferably a type 4028 solid state circuit arranged to convert a two bit binary coded input into a radix four ("one of four") output.
Each of the multiplexers 22 and 24 of card unit 10 has four pairs of input terminals for a total of eight input terminals 22a through 22h and 24a through 24h. The binary coded multiplexer control signals E and F are simultaneously applied to the aforementioned control in-puts of multiplexers 22 and 24 to cause only one pair of the four pair of input signals to appear at output terminals 22i, 22j and 24i, 24j of the multiplexer units 22 and 24, in accordance with the binary code applied to the control inputs 22k, 22~ and 24k, 24~. For example, when control signals EF develop a binary code OjO, the binary levels at outputs 22i and 22j are respectively coupled to inputs 22a and 22b, while the binary levels at outputs 24i and 24j are respectively coupled to inputs 24a and 24b causing the four binary bits represen-ting the least significant decimal position, stored in counter stage 14-1, to appear at data output terminals A
through D respectively.
Simultaneously therewith, control signals E and F
control the demultiplexer circuits 92 and 94 so that the ~o~s~
~ 17 -input signals appearing at 92a, 92b are transferred to ouputs 92e and 92f and so that the inputs 94a and 94b are transferred to outputs 94e and 94f. These output pairs 92e-92f and 94e-94f are respectively coupled to inputs 116a through 116d of latched decoder driver cir-cuit 116 forming part of the driver array 114 which further includes latched decoder driver circuits 118, 120 and 122. Solid state circuits 116 through 122 are preferably type 4056 circuits capable of converting a binary coded decimal input into a group of signals which selectively appear on output lines 116f through 1161 for driving a seven-segment decimal display unit such as, for example, unit 124 coupled to the aforementioned seven output lines of the driver circuit, such as for example driver circuit 122, in order to selectively illuminate two or more of the display segments 124a through 124g which collectively cooperate to form the decimal digits "0" through "9".
The four binary signals representing the least sig-nificant decimal digits are loaded into driver circuit 116 by decoder 112 which decodes the two bit binary control signals E, F applied to inputs 112a, 112b to cause one of its four output lines 112c through 112f to develop a strobe signal, to the exclusion of the remain-ing three output lines. In the present instance, decod-er 112 decodes the control signals E and F causing its output line 112 to develop a strobe pulse for latching the four binary bits representing the least significant decimal digit into latched decoder driver circuit 116.
Circuit 116 decodes the four binary inputs and develops signal levels at the outputs 116f through 116~ represent-ative of the decimal digit to be displayed, which sig-` ~2G~
nals are applied to the display unit, such as unit 124 to display the appropriate decimal digit.
The outputs of control signal generating circuit 104 change at a rate controlled by oscillator 106 caus-ing the next significant decimal digit to be transferredthrough multiplexer circuits 22 and 24 of card unit 10 to the demultiplexer circuits 92 and 94 of card reader unit 90 thereby causing the binary coded signals repre-senting the next significant decimal digit to appear at outputs 92g and 92h of demultiplexer 92 and 94g and 94h of demultiplexer 94, which signals are applied to respec-tive inputs 118 through 118d of driver circuit 118. The control signals E and F are also applied to decoder 112 causing a strobe signal to be developed at output 112d to transfer and latch the next significant decimal digit into driver circuit 118 for display by its associated display unit (not shown for purposes of simplicity).
This operation is continued until all four decimal dig-its are transferred to the associated driver circuits 116 through 122 and displayed by their associated dis-play units, which are preferably of the liquid crystal display (LC~) type. The data transfer operation is also continuously repeated at the lOOHz rate.
Clock pulses from source 106 are further simultan-eously applied to the control inputs 116m through 122mof driver circuits 116 through 122 and to the input 124a of the display unit 124 for generating the liquid crys-tal display square wave signal which causes the display unit 24 to operate in an intermittent ~ashion as is conventional with such units, the pulsing of the display units in array 130 by clock source 106 being at a rate sufficiently rapid to cause the eye of the observer to perceive a "steadily illuminated" decimal digit. The remaining display units function in an identical fashion.
~, .
53 ~L
The transfer of the count in card reader unit 10 to the driver circuit array 114 is continuously updated since the count in the card reader unit 10 is being decremented at a rate determined by machine usage. Assum-ing that the machine controlled by card reader unit 90is a copier machine, the copier machine is enabled in the folLowing fashion:
The card unit 10 is inserted into the receptacle of the card reader unit 90 which automatically initiates transfer of the count in card unit 10 to the driver circuit array 114. In addition to the count being dis-played by the display array 130, logical gating circui-try 132 continuously monitors the driver array 114 to detect for the presence of a zero count condition. A
unique condition exists for digit zero since the segment of the display whose illumination is controlled by out-put 116k will have a voltage on it and the segment whose illumination is controlled by output 1161 will have no voltage on it. Outputs 116k, 118k, 120k and 122k are directly connected to diodes D2, D4, D6 and D8 whereas outputs 116~, 118~, 120~ and 122~ are connected to diodes D3, D5, D7 and D9 by inverter circuits Il through I4 respectively. Thus, when all digits displayed are decimal zero, a forward base drive is applied to the base electrode of transistor TRl causing its collector to go to ground and removing base drive from the base electrode of transistor TR2 thereby deenergizing relay Sl. Relay contact Sla is then opened thereby developing an open electrical circuit between terminals 134 and 136 which may, for e~ample, be utilized to decouple the machine from its local power source or to provide any other desired disabling function sufficient to prevent further use of the machine when the count in the card unit inserted into the card reader unit has been decre-mented to zero. The fact that the card reader unit contains a zero count is confirmed by the display array 130.
The copier machine, as is conventional, develops pulses which are applied to pulse inputs 13~ and 140 coupled through a full-wave diode bridge 142 to a signal stabili~ing circuit 144 comprisecl o resistors R6 thr-ough R8, zeneor diode ZDl and capacitors C4 and C5, theoutput of the signal stabilizing circuit being coupled to count pulse output terminal 146 through inverter IS.
Terminal 146 is coupled to terminal 20 of card reader unit 10 when the card unit 10 is inserted into the receptacle of the card reader unit 90. Terminal 150 applies a ground level to the terminal 26 of card unit causing counter 14 to operate as a down counter whereby pulses representative of machine use applied to card unit 10 to cause the count in counter 14 to be decremented.
Although the applicatio~ set forth hereinabove des-cribes the system of the present invention for use with a copier machine, it should be understood that the system is readily adaptable for use with other machines and/or devices. For e~ample, the system of the present invention may be utilized for dispensing items and mater-ials such as, for e~ample, fuel oil, wherein a fuel tank dispenser is enabled and signals are developed represent-ative of the amount of fluid dispensed to reduce the count in the card unit counter 14. The dispenser may also be a vending machine of the automatic type, wherein the vending machine is provided with processing means s~
for comparing the cost of the selection with the present contents of the card unit wherein the item is dispensed only when the counter contents equals or exceeds the cost of the selected unit. The system may also be employed with point of sale equipment wherein the operator at a register enters the cost of the item selected for purchase and the register is enabled only if the count in the card unit is at least equal to the cost of the selected item, in which case the register creates a record and receipt of the sale and substantial-ly simultaneously therewith reduces the count in the counter unit by an amount equal to the magnitude of the sale. An automatic vending machine may also be operated to vend an item upon receipt of a card unit containing a sufficient count.
For purposes of the present invention, it is suffic-ient to understand that the control unit serves as the interface for coupling the count in the card unit 10 to display means and possibly to other means for determin-ing the presence of a valid card unit, for example, andfor providing an enabling signal when the card reader unit 90 receives a card unit 10 of the proper electrical configuration and containing a non-zero count,` these capabilities being designed in a sufficiently universal fashion for use with a wide variety of different machin-es and/or devices.
The internal wiring arrangement of the card unit 10 relative to its edge connector may be designed so that precise knowledge of the circuit contents of the card unit would be required in order to enable either a card programming unit 30 or a card reader unit 90 thereby providing still further security for the system, in addition to controlling the access to the machine and the extent of said access as a function of the count within the card unit.
The front of acceptor unit 250 is shown in Fig. 4a while Fig. 4b shows a sectional view of its internal physical arrangement. The acceptor unit 250 is provided with an opening 272 for receiving the key unit 2Q0 whose physical arrangement is shown in Fig. la. The rear end of opening 272 is provided with receptacle means 274 in the form of a multi-terminal electrical socket assembly having individual terminals 274a arranged to elec-trically engage respective ones of the terminals 13a integrally formed within the edge connector assembly 13 of key unit 10.
When key unit 10 is inserted into slot 272 so that its edge connector assemb]y 13 is properly inserted within multi-terminal socket 274, an electrical circuit is established from the acceptor unit terminals 150 (Fig. 3) to a key unit terminal 51 (Fig. 1) for acti-vating the key unit 10.
In a similar fashion, the outputs of multiplexers 24, 26 of key unit 10 (Fig. 1) each electrically connect with a respective one of the inputs of demultiplexers 92, 94 connected to the multi-socket 274 arranged at the rear of key slot 272.
s~
Although the preferred embodiment described herein is designed to increment the count in a card unit 10 when a count is to be added and to decrement the count when the count is to be removed, the reverse arrangement is also possible. For example, the count in the card unit counter 90 may be exhausted when the count reaches the equivalent of decimal 9999, a count of less than decimal 9999 representing an unexhausted incard unit l0.
In such an example, the card unit 10 would be decrement-ed from 9999 to a smaller number under control of thecard programming unit and would be incremented from the lower decimal number toward the decimal count 9999, at which time the machine being controlled would then be turned off. By rearranging the wiring of the driver circuits of array 114 the signals may be decoded so that a decimal count of 9999 would be displayed as a decimal count of 0000 thereby adding still further security to the system and rendering a defeat of the system more difficult to unauthorized users who also lack knowledge of the system design.
A latitude of modification, change and substitution is intended in the foregoing disclosure, and in some instances, some features of the invention will be employ-ed without a corresponding use of other features.
Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the spirit and scope of the invention herein.
FIELD OF THE INVENTION
The present invention relates to control devices and, more particularly, to a controL device for limiting access to a machine or other equipment or device to authorized personnel possessin~g a card unit which furth-er contains stored data controlling the e~tent of access to the machine permitted to the holder of the card unit.
BACKGROUND OF THE INVENTION
A number of applications e~ist wherein it is desir-able to limit access to machines to only those personshaving proper authorization and further to limit the extent of such access. As one example, it is sometimes desirable to limit the use of copier machines to select-ed personnel. The copier machine is often provided with a substantially tamper proof counter for maintaining a cumulative count of the number of copies which have been produced to date. One standard technique for authoriz-ing use of the copier machine is to provlde selected personnel with a conventional key arranged to release a 2Q cooperating mechanical lock which, when opened, may be arranged to provide for the completion of an electrical circuit to provide power to the machine. Since keys of this type may be simply, readily and ine~pensively repro-duced, one standard prior art approach to avoid simple reproduction of keys is described in ~.S. Patent No.
3,436,j30, issued April 1, 1969 and assigned to the assignee of the present application, and which discloses a control unit forming a part of the copier machine and arranged to releaseably receive a portable plug-in unit containing an electromechanical counter and an electri-cal or electronic circuit element or elements which, when the portable unit is plugged into the control unit, 5~
serve to operate a relay which couples the machine to a local power source. The control unit is also preferably provided with an electromechanical counter.
The machine or device whose access is being control-led generates pulses representative of machine usage. Inthe copier machine example, each pulse preferably repre-sents the reproduction oE a single copy. Each pulse is simultaneously applied to the electromagnetic counters oE the portable, plug-in unit and the control unit.
Ideally, the counter of the control unit should contain a count equal to the grand total of the individual counts in each of the portable plug-in units used in conjunction with that copier machine.
The above mentioned accountability system, although reasonably satisfactory for cost allocation purposes, fails to provide any means for limiting the e~tent of access which any authorized holder of a portable, plug-in unit.
This limitation led to the development of the sys-tem described in U.S. Patent No. 3,921,875, issued Novem-ber 25, 1975 to the assignee of the present application.
The apparatus described in the last mentioned patent also comprises a control unit forming part of the mach-ine and a portable, plug-in unit. The portable unit contains an electromechanical counter which may be pre-set to any desired count from 0 to a count of up to 99999, for e~ample. The portable unit is also provided with an electrical circuit for operating a relay to couple the machine whose usage is being regulated to a local power source. Pulses generated by the machine and representative of machine usage are applied to the elec-tromagnetic counter of the control unit and to the ~2~
electromagnetic counter of the portable unit to respec-tively increment the control unit counter and decrement the portable unit counter. When the count in the port-able unit counter has been decremented to a predetermin-5 ed value (preferably 0) a switch is opened to deenergizethe aforementioned relay and thereby decouple the mach-ine from its source of power.
The count itl the electromechanical counter of the plug-in unit may be reset by opening the plug-in unit through the use of a mechanical key. Alternatively, the count may be advanced through the use o a pulsing device which applies the number of pulses to the electro-mechanical counter equal to the desired count to be stored therein. This is a sluggish and tedious operation due to the electromechanical nature of the counter which is further subject to wearing over a period of continu-ous use. The portable plug-in units and control unit are also unnecessarily large and subject to wearing and breakdown due to the large number of mechanical moving parts utilized in these units.
In addition to the above disadvantages, the port-able unit housing may be broken into rather easily and the electromagnetic counter mechanism may easily be tam-pered with to create a non-zero count condition, thereby destroying system security. The electromechanical nature of the device also lends itself readily to evaluation of the contents to further aid unauthorized personnel in their quest to defeat the security measures and thereby permit unauthorized use of the machine or device being protected against unauthorized use.
.1 , . . .
BRIEF DESCRIPTION OF THE INVENTION
The present invention avoids all of the disadvantag-es of prior art systems and is characterized by compris-ing three basic subassemblies, each utilizing solid state circuits to totally avoid the disadvantages of large size and weight and wearing of components normally encountered in the prior art devices, such as those des-cribed, for example, in the above mentioned U.S. pat-ents, and which present invention yields additional ad-vantageous features as will be more fully described.
The three basic units employed in the solid statesystem of the present invention are a card unit, card reader unit and card programmer unit. The card unit is comprised of miniaturized solid state circuitry includ-ing an up/down counter, a multiplexer and a battery, allof which are arranged within a housing whose overall dimensions are of the order of a conventional credit card.
The card programming unit is substantia]ly compris~
ed of all solid state components including a display and driver circuit. When a card unit is inserted into the card programmer unit, a control circuit sequentially transfers the count in the card unit counter through the card unit multiplexer and the card programmer unit demul-tiplexer to a driver circuit for displaying the contentsof the card unit counter.
The count desired to be added to the card unit is set into manually settable switches.
Depression of a program start button in the pres-ence of a card unit sets the count of the settableswitches into the card programmer unit counter and enab-les a normally disabled clock in the card programmerunit counter. Pulses from the local oscillator increment the count of the card unit counter and simultaneously decrement the count of the card programmer counter.
I.ogical gates, which continuously monitor the card prog-rammer counter, deactivate the local oscillator and sim-ultaneously disable a previously enabled gate preventing spurious oscillator pulses from reaching the card unit counter. The card programmer display displays the count in the card unit counter to provide positive confirma-tion that the correct count has been added to the card unit, as well as displaying the count in the card unit prior to and during insertion of the desired count.
A card reader unit, which is interconnected with the machine whose use and extent of use is to be controlled, is provided with solid state decoder drivers for driving a visual display.
A control unit controls the card unit multiplexer in synchronism with a card reader unit solid state demultiplexer for sequentially transferring the count in the card unit counter to the dècoder driver circuit.
The card reader unit further incorporates a local oscillator which operates the control unit for operating the multiplexer and demultiplexer circuits in synchron-ism and provides time division pulses to the visualdisplay.
The display driver circuits convert the data trans-ferred thereto from the card unit counter into signals appropriate for illuminating the display device which is preferably of the seven segment LCD (liquid crystal display) type. Selected ones of the signals of each decimal digit position of the display are coupled with i, $~5~
logical gating circuitry which operates to energize a relay for providing a machine enabling signal and for deenergizing a relay to disable the machine when the count in the card unit counter is decremented to zero by pulses derived from the machine, which zero count is also displayed by the card reader unit display.
Pulses representative of machine usage are applied to the card unit counter through the card reader unit to decrement the contents of the card reader unit counter upon the occurrence of each count pulse.
The simplified, miniaturized, solid state design eliminates the need for a card reader unit display and its attendant cost and weight, reducing the card reader unit, for example to a weight of no greater than one ounce, as compared with key counter units which, in addition to being relatively large and bulky, are more than five times the weight of the card unit.
The solid~state multiplexer and demultiplexer units si&nificantly reduce the electrical connections required between the card programmer unit and the card unit and between the card reader unit and the card unit. The small battery employed in the card unit is capable of a significantly long, useful operating life due to the elimination of a display in the card unit and the provision of single, visual display means in only the card reader and card programming units~ yielding a signi-ficant reduction in cost and which is a direct function of the number of card units employed within a single system. As an alternative arrangement, the card unit may employ a rechargeable battery which is designed to be recharged either during the time that the card unit is being programmed to receive a new count or at the time ;
the card unit is inserted into a card reader unit.
The system enhances centralized control or, alterna-tively, provides a prepayment capability.
The system employs extremely low power solid state integrated circuits as wel.l as display devices which consume almost no power since they operate with low conductivity electro- statics and thereby consume signi-fi.cantly less power than prior art. devices presentl.y in use.
The ci.rcuit connections required to be made to the card reader unit serve as additional security means since specific knowledge of the machine construction would be required to have any reasonable chance of making the required connections.
OBJECTS OF THE INVENTION AND
BRIEF DESCRIPTION OF THE FIGURES
It is therefore one object of the present invention to provide a novel~ highly sim`p~lified solid state con-trol system for controlling access to a machine and the extent of such access by means of a preprogrammed card ~nit having a solid state counter selectively engageable with a card reader unit for displaying the present count in the card reader unit, for decrementing the count responsive to machine usage and for locking the machine against further usage when the count in the card unit reaches a predetermined count.
Another object of the present invention is to pro-vide a control system of the type described in which solid state programming means is provided for simply, rapidly and accurately entering a preprogrammed count into the solid state counter of a card unit and includ-ing display means for displaying the contents of the card unit counter to confirm entry of the preprogrammed count.
s~
Still another object of the present invention is to provide a control system of the type described in which system security is obtained through the provision of a card identity code which is examined by a key acceptor unit for validity in order to enable the device being controlled.
The above, as well as other objects of the present Lnvention, will become apparent when reading the accom-panying description and drawing in which:
Fig. 1 is a schematic diagram of a card reader unit embodying the principals of the present invention.
Fig. la shows a perspective view of the card unit exterior.
Fig. 2 is a schematic diagram showing the solid state card programmer employed for introducing a prepro-grammed count into a card unit of the type shown in Fig.
Fig. 3 is a schematic diagram of a card reader unit arranged for selective insertion of a card unit of the type shown in Fig. 1 for controlling the access and extent of access of a machine coupled thereto.
Fig. 4a shows a front view of the card reader unit.
Fig. 4b shows a sectional view of the card unit of Fig. 4a and an end view of the card unit of Fig. la.
DETAILED DESCRIPTION OF THE INVENTION
One preferred embodiment of the card unit 10 of the present invention is shown in Figs. 1 and la, Fig. la showing the outward physical appearance thereof, wherein it can be seen that the card unit 10 comprises a thin~
rectangular shaped body 12, preferably formed of plas-tic, and containing solid state circuits (to be more ~2~
g fully described) embedded therein. The body 12 generally resembles a conventional credit card but has a slightly greater thickness T. One end 12a, of a reduced thickness portion is provided with an edge connector assembly 13 for insertion into an edge connector socket to be more fully described, said socket 13 including individual end terminals 13a.
The card unit 10 comprises a solid state counter 14 oE the binary coded decimal type which, in ~he preferred embodiment of Fig. 1 is further comprised of four C~IOS
type 4510 integrated circuits or stages 14-1 through 14-4 electrically connected to form an up/down counter 14, each stage capable of storing a decimal number. A
battery 16 powers the counter 14. Battery 16 is shown schematically but may, for example, be comprised of a pair of 1.5 volt watch batteries of the type 393BP, and being connected in series. Diode 18 serves as a blocking circuit device to prevent charging o~ battery 16 by external connections.
20Each counter stage 14-1 through 14-4 has its clock input 14-la through 14-4a``connected in common to a count input terminal 20. The carry outputs 14-lb through 14-3b of stages 14-1 through 14-3 are electrically connected to the carry inputs 14-2c through 14-4c of counter 25stages 14-2 through 14-4.
The binary coded decimal output terminals 14-ld through 14-lg and 14-4d through 14-4g are selectively connected to respective inputs 22a through 22h and 24a through 24h of solid state multiplex circuits 22 and 24 which are preferably type 4052 integrated circuits which multiplex ~i.e. sequentially transfer) the digital data stored in counter 14 to the output terminals 22i and 22j s~
of circuit 22 and 24i and 24j of circuit 24. The multiplexed data output terminals being labelled A, B, C
and D respectively. Input lines labelled E and F are adapted to apply binary type control signals derived from an external source 30 or 90 to the control termin-als 22k and 221 of circuit 22 and 24k and 241 of circuit 24 to control the multiple~ing and demultiplexing opera-tion as will be more ully described.
Control inputs 14-lh through 14-4h of the counter stages comprising counter 14 are connected in common to a terminal 26 arranged to be electrically connected with either the card reader unit or the card programmer unit and to receive a binary level signal from the card reader unit causing the counter to be decremented when count pulses are applied to terminal 20 and alternative-ly arranged to receive an opposite level binary signal causing counter 14 to be incremented when count pulses are applied to input 20 by the card programming unit 30, which operations will be more fully described hereinbe-low.
The embodiment of thè card unit 10 shown in Fig. 1 is thus capable of storing any count from 0000 through 9999. Obviously, the count capacity may be increased by adding one or more additional counter stages, if desired.
The card programmer unit 30, as shown in Fig. 2, functions to generate an exact number of pulses equal to the count desired to be added to a card unit 10 inserted into the card programmer unit 30.
This is accomplished by means of thumbwheel switch-es 32 through 38 each having their binary coded outputs electrically connected to associated inputs of a counter 40 (comprised of solid state counter stages 40-1 through 3~2(~5~
40-4) which are preferably type 4510 counter stages arranged to operate as a decrementing counter.
A local power supply 42 provided in card programmer unit 30 converts a 115 VAC source through transformer Tl and full-wave bridge 44 to a DC signal. A type 7805 Cil^CUit 46 provides a stabilized +5 VDC output which is coupled through terminal 48 forming part oE a card programmer unit receptacle to terminal 50 forming part of the edge connector 12a of card unit 10 (shown in Fig.
1). Termina] 52 of card unit 10 is, in turn, coupled to terminal 54 of card programmer unit 30, shown in Fig. 2.
Thus, when a card unit 10 is inserted into the connector forming part of the card programmer unit 30, an electri-cal circuit is completed from the ~5V terminal 48 to terminal 50 of the card unit 10 and back to the card programmer unit 30 through lead 51 and terminal 54, which voltage is applied to the set input 56a of bista-ble flip-flop 56, causing its Q ouput 56b to go high.
This voltage appears at terminal 58a of programming switch 58 and, when switch button 58b is pressed, comple-tes an electrical circuit to stationary terminal 58c to apply a high signal to the set input 60a of bistable flip-flop 60 causing its Q output 60b to go high and causing its Q output 60c to go low.
The Q output of bistable flip-flop 60 is simultan-eously applied to each preset input 40-la through 40-4a of the counter stages of counter 40 causing the binary values, established by the settings of thumbwheel switch-es 32-38, to be preset into a respective one of the counter stages 40-1 through 40-4. Thumbwheel switches 32 through 38 are of a conventional type in which, by opera-tion of a control knob such as control knob 32e, any number from decimal "zero" through decimal "nine" may be set within window 32f thereby providing a four bit binary output which is coupled to the input of the associated counter stage.
S The Q output of bistable flip-flop 60 is further simultaneously applied to the reset terminal 62a of a type 555 timer which, by appropriate selection of the resistance va]ues of resistors Rl and R2, and the capaci-tance values of capacitors C1 and C2, is operated as an oscillator which, in the present application, generates pulses at a rate of the order of 2kHz at its output terminal 62b. The output of oscillator 62 is coupled to input 64a of NAND gate 64 whose input 64b is also coupled to the Q output 60b of bistable flip-flop 60.
The Q output of flip-flop 60 removes the reset level from inputs 40-lc through 40-4c of counter 40 enabling counter 40 to be preset.
The Q output of bistable flip-flop 60 also enables NAND gate 64 to pass clock pulses from clock source 62.
These pulses are simultaneously gated through NAND gates 66 and 68 which are wired to operate as inverters.
Output 66a of NAND gate 66 is coupled in common to the clock inputs 40-lb through 40-4b of the counter `stages of counter 40, which counter is operated as a decrement-ing counter whose count is reduced from the settingpreset into the counter 40 by thumbwheel switches 32 through 38, toward a zero count.
Output 68a of NAND gate 68 is coupled through terminal 70 of card programmer unit 30 to terminal 20 of card unit 10 shown in Fig. 1 causing the count in counter 14 to be incremented simultaneously with the J
~5~.~
decrementing of the count in counter 40.
Assuming that the counter 40 of card programmer unit 30 has been preset to introduce a decimal count of 1000 into the card unit counter 14, after clock source 62 has applied 1000 pulses to card unit counter 14 and to card programmer unit counter 40~ all four counter stages 40-1 through 40-4 will have been decremented to zero. A pair of eight-input NOR gates 74 and 76 have respective ones of their inputs electrically connected i0 to respective ones of the binary coded outputs of count-er stages 40-1 through 40-4. Gate 74 has its eight inputs respectively coupled to four outputs of stage 40-4 and stage 40-3, while gate 76 has its eight inputs respectively coupled to the four binary coded outputs of stages 40-2 and 40-1, respectively.
Diodes Dl and D2 electrically connect the outputs of gates 74 and 76 to common terminal 78 arranged between resistor R3 and capacitor C3.
When all si~teen outputs of counter stages 40-1 through 40-4 are low~ representing the decimal number 0000, the outputs of both gates 74 and 76 go high raising common terminals 78 to the +5V level, which level is simultaneously applied through conductor 80 to reset inputs 56c and 60d of bistable flip-flops 56 and 60, respectively. The Q output of bistable flip-flop 60 simultaneously disables gate 60 and terminates the opera-tion of clock source 62 preventing any noise from inad-vertently pulsing the card unit counter 14 and thereby adding a false count to the card unit. The Q output of flip-flop 60 goes high preventing counter 40 from being accidentally preset. The resetting of bistable flip-flop 56 causes its Q output to go low preventing the program-- 14 _ ming operation from being repeated in the event that program button 58 is accidentally operated before the card unit 10 which has just had a preprogrammed count added to it, has been removed from the card unit recep-tacle forming part of card programmer unit 30.
The card programmer unit 30 ls further provided with a solid state demultiplexer and control circuit 82, a display driver ci.rcuit 84 and a four di.git displ.ay 86 which are substantially identical to Like circuits provi-ded within card reader unit: 90 (to be more f~llly describ-ed hereinbelow). The inputs 82a through 82d of demultipl-exer 82 receive the A through D outputs of multiplexers 22 and 24 provided in card unit 10. The demultiplexer and control circuitry 82 transfers the binary coded count stored in the stages of card unit counter 14 through multiplexer circuits 22 and 24 and demultiplexer 82 to the display driver circuitry 84 for illuminating display 86, which is preferably provided with four deci-mal display units, each being of the seven segment decimal type. A detailed description of the transfer of data from the card unit counter 14 to the card reader unit visual display 86 will be set forth in detail hereinbelow, it being understood that the operation of the same circuitry within the card programmer unit 30 is substantially identical to that provided in card reader unit 90.
Card programmer unit 30 thus makes it possible to enter an exact preprogrammed count into the card unit counter 14 in a simple, rapid manner, the entire opera-tion taking, at most, a few seconds including set up,insertion and removal of the card unit 10. The display 86 provided within the card programmer unit 30 provides ~ 2~
direct visual confirmation that the preprogrammed number has been correctly introduced into the card unit lØ The display 86 also serves as a means to ascertain the count within the card unit 10 before initiating a programming operation and further enables a preprogrammed count to be added to a card unit counter 14 which has other than a æero count when first introduced into the card program-ming unit 30.
The card reader unit 90, shown ln detail in ~ig. 3, perEorms the functions of: displaying the four digit decimal number contained wlthin the memory of the card unit 10 inserted into the card reader unit receptacle and enabling the machine being controlled by the card reader unit 90 when the count in the card unit 10 is other than zero. However, when the count in the card unit 10 reaches zero, the card reader unit 90 causes the machine to be made inoperative.
Card reader unit 90 recovers the count in card reader unit 10 by demultiplexing the binary coded inform-ation on the four lines labelled A through D which arerespectively coupled to solid state demultiplexer cir-cuits 92 and 94 which are preferably type 4052 integrat-ed circuits. Input terminals 96 and 98, receiving data bits A and B, are coupled to inputs 92a and 92b of demultiplexer circuit 92 while terminals 101, 102 couple data bits C and D to inputs 94a and 94b of demultiplexer circuit 94.
Control signals for controlling the transfer of the count from card unit 10 to the card reader unit 90 are derived from solid state circuit 104 which is preferably a type 4029 circuit having a clock input 104a coupled to the output of a lOOHz oscillator 106 for developing ~2~)~5~
binary coded decimal control signals E and F at the outputs 104b and 104c, respectively.
The E and F signals are applied: through terminals 108 and 110 to the control inputs 22k, 221 and 24k, 24~
of multiplexer circuits 22 and 24 in card unit 10 (shown in Fig. l); and are simultaneously applied to the con-trol inputs 92c, 92d and 94c, 94d of demultiplexer circuits 92 and 94; and to the inputs 112a and 112b of a binary coded decimal to decimal decoder circuit 112 ; 10 which is preferably a type 4028 solid state circuit arranged to convert a two bit binary coded input into a radix four ("one of four") output.
Each of the multiplexers 22 and 24 of card unit 10 has four pairs of input terminals for a total of eight input terminals 22a through 22h and 24a through 24h. The binary coded multiplexer control signals E and F are simultaneously applied to the aforementioned control in-puts of multiplexers 22 and 24 to cause only one pair of the four pair of input signals to appear at output terminals 22i, 22j and 24i, 24j of the multiplexer units 22 and 24, in accordance with the binary code applied to the control inputs 22k, 22~ and 24k, 24~. For example, when control signals EF develop a binary code OjO, the binary levels at outputs 22i and 22j are respectively coupled to inputs 22a and 22b, while the binary levels at outputs 24i and 24j are respectively coupled to inputs 24a and 24b causing the four binary bits represen-ting the least significant decimal position, stored in counter stage 14-1, to appear at data output terminals A
through D respectively.
Simultaneously therewith, control signals E and F
control the demultiplexer circuits 92 and 94 so that the ~o~s~
~ 17 -input signals appearing at 92a, 92b are transferred to ouputs 92e and 92f and so that the inputs 94a and 94b are transferred to outputs 94e and 94f. These output pairs 92e-92f and 94e-94f are respectively coupled to inputs 116a through 116d of latched decoder driver cir-cuit 116 forming part of the driver array 114 which further includes latched decoder driver circuits 118, 120 and 122. Solid state circuits 116 through 122 are preferably type 4056 circuits capable of converting a binary coded decimal input into a group of signals which selectively appear on output lines 116f through 1161 for driving a seven-segment decimal display unit such as, for example, unit 124 coupled to the aforementioned seven output lines of the driver circuit, such as for example driver circuit 122, in order to selectively illuminate two or more of the display segments 124a through 124g which collectively cooperate to form the decimal digits "0" through "9".
The four binary signals representing the least sig-nificant decimal digits are loaded into driver circuit 116 by decoder 112 which decodes the two bit binary control signals E, F applied to inputs 112a, 112b to cause one of its four output lines 112c through 112f to develop a strobe signal, to the exclusion of the remain-ing three output lines. In the present instance, decod-er 112 decodes the control signals E and F causing its output line 112 to develop a strobe pulse for latching the four binary bits representing the least significant decimal digit into latched decoder driver circuit 116.
Circuit 116 decodes the four binary inputs and develops signal levels at the outputs 116f through 116~ represent-ative of the decimal digit to be displayed, which sig-` ~2G~
nals are applied to the display unit, such as unit 124 to display the appropriate decimal digit.
The outputs of control signal generating circuit 104 change at a rate controlled by oscillator 106 caus-ing the next significant decimal digit to be transferredthrough multiplexer circuits 22 and 24 of card unit 10 to the demultiplexer circuits 92 and 94 of card reader unit 90 thereby causing the binary coded signals repre-senting the next significant decimal digit to appear at outputs 92g and 92h of demultiplexer 92 and 94g and 94h of demultiplexer 94, which signals are applied to respec-tive inputs 118 through 118d of driver circuit 118. The control signals E and F are also applied to decoder 112 causing a strobe signal to be developed at output 112d to transfer and latch the next significant decimal digit into driver circuit 118 for display by its associated display unit (not shown for purposes of simplicity).
This operation is continued until all four decimal dig-its are transferred to the associated driver circuits 116 through 122 and displayed by their associated dis-play units, which are preferably of the liquid crystal display (LC~) type. The data transfer operation is also continuously repeated at the lOOHz rate.
Clock pulses from source 106 are further simultan-eously applied to the control inputs 116m through 122mof driver circuits 116 through 122 and to the input 124a of the display unit 124 for generating the liquid crys-tal display square wave signal which causes the display unit 24 to operate in an intermittent ~ashion as is conventional with such units, the pulsing of the display units in array 130 by clock source 106 being at a rate sufficiently rapid to cause the eye of the observer to perceive a "steadily illuminated" decimal digit. The remaining display units function in an identical fashion.
~, .
53 ~L
The transfer of the count in card reader unit 10 to the driver circuit array 114 is continuously updated since the count in the card reader unit 10 is being decremented at a rate determined by machine usage. Assum-ing that the machine controlled by card reader unit 90is a copier machine, the copier machine is enabled in the folLowing fashion:
The card unit 10 is inserted into the receptacle of the card reader unit 90 which automatically initiates transfer of the count in card unit 10 to the driver circuit array 114. In addition to the count being dis-played by the display array 130, logical gating circui-try 132 continuously monitors the driver array 114 to detect for the presence of a zero count condition. A
unique condition exists for digit zero since the segment of the display whose illumination is controlled by out-put 116k will have a voltage on it and the segment whose illumination is controlled by output 1161 will have no voltage on it. Outputs 116k, 118k, 120k and 122k are directly connected to diodes D2, D4, D6 and D8 whereas outputs 116~, 118~, 120~ and 122~ are connected to diodes D3, D5, D7 and D9 by inverter circuits Il through I4 respectively. Thus, when all digits displayed are decimal zero, a forward base drive is applied to the base electrode of transistor TRl causing its collector to go to ground and removing base drive from the base electrode of transistor TR2 thereby deenergizing relay Sl. Relay contact Sla is then opened thereby developing an open electrical circuit between terminals 134 and 136 which may, for e~ample, be utilized to decouple the machine from its local power source or to provide any other desired disabling function sufficient to prevent further use of the machine when the count in the card unit inserted into the card reader unit has been decre-mented to zero. The fact that the card reader unit contains a zero count is confirmed by the display array 130.
The copier machine, as is conventional, develops pulses which are applied to pulse inputs 13~ and 140 coupled through a full-wave diode bridge 142 to a signal stabili~ing circuit 144 comprisecl o resistors R6 thr-ough R8, zeneor diode ZDl and capacitors C4 and C5, theoutput of the signal stabilizing circuit being coupled to count pulse output terminal 146 through inverter IS.
Terminal 146 is coupled to terminal 20 of card reader unit 10 when the card unit 10 is inserted into the receptacle of the card reader unit 90. Terminal 150 applies a ground level to the terminal 26 of card unit causing counter 14 to operate as a down counter whereby pulses representative of machine use applied to card unit 10 to cause the count in counter 14 to be decremented.
Although the applicatio~ set forth hereinabove des-cribes the system of the present invention for use with a copier machine, it should be understood that the system is readily adaptable for use with other machines and/or devices. For e~ample, the system of the present invention may be utilized for dispensing items and mater-ials such as, for e~ample, fuel oil, wherein a fuel tank dispenser is enabled and signals are developed represent-ative of the amount of fluid dispensed to reduce the count in the card unit counter 14. The dispenser may also be a vending machine of the automatic type, wherein the vending machine is provided with processing means s~
for comparing the cost of the selection with the present contents of the card unit wherein the item is dispensed only when the counter contents equals or exceeds the cost of the selected unit. The system may also be employed with point of sale equipment wherein the operator at a register enters the cost of the item selected for purchase and the register is enabled only if the count in the card unit is at least equal to the cost of the selected item, in which case the register creates a record and receipt of the sale and substantial-ly simultaneously therewith reduces the count in the counter unit by an amount equal to the magnitude of the sale. An automatic vending machine may also be operated to vend an item upon receipt of a card unit containing a sufficient count.
For purposes of the present invention, it is suffic-ient to understand that the control unit serves as the interface for coupling the count in the card unit 10 to display means and possibly to other means for determin-ing the presence of a valid card unit, for example, andfor providing an enabling signal when the card reader unit 90 receives a card unit 10 of the proper electrical configuration and containing a non-zero count,` these capabilities being designed in a sufficiently universal fashion for use with a wide variety of different machin-es and/or devices.
The internal wiring arrangement of the card unit 10 relative to its edge connector may be designed so that precise knowledge of the circuit contents of the card unit would be required in order to enable either a card programming unit 30 or a card reader unit 90 thereby providing still further security for the system, in addition to controlling the access to the machine and the extent of said access as a function of the count within the card unit.
The front of acceptor unit 250 is shown in Fig. 4a while Fig. 4b shows a sectional view of its internal physical arrangement. The acceptor unit 250 is provided with an opening 272 for receiving the key unit 2Q0 whose physical arrangement is shown in Fig. la. The rear end of opening 272 is provided with receptacle means 274 in the form of a multi-terminal electrical socket assembly having individual terminals 274a arranged to elec-trically engage respective ones of the terminals 13a integrally formed within the edge connector assembly 13 of key unit 10.
When key unit 10 is inserted into slot 272 so that its edge connector assemb]y 13 is properly inserted within multi-terminal socket 274, an electrical circuit is established from the acceptor unit terminals 150 (Fig. 3) to a key unit terminal 51 (Fig. 1) for acti-vating the key unit 10.
In a similar fashion, the outputs of multiplexers 24, 26 of key unit 10 (Fig. 1) each electrically connect with a respective one of the inputs of demultiplexers 92, 94 connected to the multi-socket 274 arranged at the rear of key slot 272.
s~
Although the preferred embodiment described herein is designed to increment the count in a card unit 10 when a count is to be added and to decrement the count when the count is to be removed, the reverse arrangement is also possible. For example, the count in the card unit counter 90 may be exhausted when the count reaches the equivalent of decimal 9999, a count of less than decimal 9999 representing an unexhausted incard unit l0.
In such an example, the card unit 10 would be decrement-ed from 9999 to a smaller number under control of thecard programming unit and would be incremented from the lower decimal number toward the decimal count 9999, at which time the machine being controlled would then be turned off. By rearranging the wiring of the driver circuits of array 114 the signals may be decoded so that a decimal count of 9999 would be displayed as a decimal count of 0000 thereby adding still further security to the system and rendering a defeat of the system more difficult to unauthorized users who also lack knowledge of the system design.
A latitude of modification, change and substitution is intended in the foregoing disclosure, and in some instances, some features of the invention will be employ-ed without a corresponding use of other features.
Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the spirit and scope of the invention herein.
Claims (28)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. Control means for preventing unauthorized use of a device and for controlling the extent of such authorized use comprising:
means operative between a first state for disabling said device and a second state for enabling said device;
a thin, pocket-sized card unit having a mini-aturized solid state counter;
a card reader unit having means for receiving said card unit;
electronic display means having a plurality of display portions for displaying a count in a decimal format;
transfer means for transferring the count in said card unit to said display means;
said device including means for generating usage signals representative of a predetermined usage quality;
said card reader unit further including means for coupling said usage signals to the card unit counter to alter the count contained therein;
means responsive to the count displayed by said display means for operating the control device to its first state when the count displayed is other than said predetermined count and for operating said control device to its second state when the count displayed is said predetermined count.
means operative between a first state for disabling said device and a second state for enabling said device;
a thin, pocket-sized card unit having a mini-aturized solid state counter;
a card reader unit having means for receiving said card unit;
electronic display means having a plurality of display portions for displaying a count in a decimal format;
transfer means for transferring the count in said card unit to said display means;
said device including means for generating usage signals representative of a predetermined usage quality;
said card reader unit further including means for coupling said usage signals to the card unit counter to alter the count contained therein;
means responsive to the count displayed by said display means for operating the control device to its first state when the count displayed is other than said predetermined count and for operating said control device to its second state when the count displayed is said predetermined count.
2. The apparatus of Claim 1, in that said counter in said card unit is an up/down counter of the solid state type, having a plurality of counter stages each adapted to represent a decimal digit in binary coded form.
3. The apparatus of Claim 3, wherein said card reader unit comprising means for generating a plurality of binary coded control signals occurring in a pre-determined sequence;
said card unit transfer means further including means responsive to said control signals for trans-ferring the binary coded count signals to said card reader unit in a sequential fashion, said card reader transfer means comprising solid state multiplexer means.
said card unit transfer means further including means responsive to said control signals for trans-ferring the binary coded count signals to said card reader unit in a sequential fashion, said card reader transfer means comprising solid state multiplexer means.
4. The apparatus of Claim 3, wherein said card reader unit transfer means transfers each binary coded group representing a decimal digit of said count to an associated decimal display position of said display means responsive to said control signals, said card reader unit transfer means comprising solid state demultiplexer means.
5. The apparatus of Claim 4, wherein each display position of said display meanscomprises a solid state decimal display means of the segmented type and latched decoder driver means for storing a binary coded decimal digit transferred thereto, each of said latched decoder driver means converts the binary coded decimal signals stored therein to signals for activating the respective segments of the segmented type display coupled thereto to create a visually observable decimal number representative of the binary coded decimal number stored in said latched decoder driver means.
6. The apparatus of Claim 5, wherein said logical gating means couples selected ones of said decimal display units of the segmented type for operating said control device to said second state when the decimal quantity displayed is zero.
7. The apparatus of Claim 3, wherein said card reader unit transfer means further comprises means responsive to said control signals for strobing only that latched decoder driver means whose binary coded decimal signal has been transferred to the card reader unit transfer means, said strobing means comprising solid state binary coded decimal to decimal decoder means.
8. The apparatus of Claim 1, further comprising a miniature battery in said card unit being coupled to said counter means for enabling the contents of the counter means to be stored for an indefinite period.
9. The apparatus of claim 8, wherein said battery is a rechargeable battery arranged to be recharged by the card reader unit when the card unit is coupled to the card reader unit.
10. Means for introducing a preprogrammed count into a card unit, said card unit comprising a solid state counter;
said card programming unit being comprising settable switch means;
a receptacle for receiving a card unit;
counter means and means responsive to insertion of a card unit into said receptacle for transferring the count represented by said settable switch means into said counter means and for simultaneously altering the counts in said programming unit counter means and said card unit counter means in reverse directions under the control of clock pulse means; and means for de-energizing said clock pulse means when said card programming unit count means reaches a predetermined count.
said card programming unit being comprising settable switch means;
a receptacle for receiving a card unit;
counter means and means responsive to insertion of a card unit into said receptacle for transferring the count represented by said settable switch means into said counter means and for simultaneously altering the counts in said programming unit counter means and said card unit counter means in reverse directions under the control of clock pulse means; and means for de-energizing said clock pulse means when said card programming unit count means reaches a predetermined count.
11. The apparatus of Claim 10, wherein said card programming unit further includes display means for displaying the count of the card unit counter means in a decimal fashion.
12. The apparatus of Claim 10, wherein said card programming unit further comprises a power source terminal and a power return terminal;
said card unit comprising jumper means for coupling said power source terminal to said power return terminal when the card unit is inserted into said receptacle means;
normally reset bistable means being operated to the set state upon insertion of a card unit into said receptacle means;
second normally reset bistable means being set then said first bistable means is set and a switch means coupled therebetween is closed to enable transfer of the decimal number set in said mechanical selective switching means into said programming unit counter means.
said card unit comprising jumper means for coupling said power source terminal to said power return terminal when the card unit is inserted into said receptacle means;
normally reset bistable means being operated to the set state upon insertion of a card unit into said receptacle means;
second normally reset bistable means being set then said first bistable means is set and a switch means coupled therebetween is closed to enable transfer of the decimal number set in said mechanical selective switching means into said programming unit counter means.
13. The apparatus of Claim 11, further comprising gating means responsive to transfer of the desired count to be entered into said card unit counter means for simultaneously passing clock pulses from said clock pulse means to the counter means of said card unit and said programming unit.
14. The apparatus of Claim 13, further comprising means in said card programming unit for operating the card unit counter means, which is an up/down counter, to count in a predetermined direction when the card unit is inserted into the receptacle means of the card programming unit.
15. The apparatus of Claim 14, further comprising logical gating means responsive to said card program-ming unit counter means reaching a predetermined count for preventing said logical gating means from passing further pulses to the counter means of said card unit and said programming unit.
16. The apparatus of Claim 15 further comprising means coupling the output of said logical gating means to said first and second bistable means to simul-taneously reset said first and second bistable means when the programming unit counter means reaches a predetermined count to clear the card programming unit counter, disable said clock source and prevent said card input from being programmed again due to accidental operation of said programming switch.
17. A method for controlling access and extent of access of machine and employing a card unit, card programing unit and card reading unit said card unit comprising solid state counter means, said card program-ming unit comprising means for introducing a pre-programmed count into said card unit and said card reader unit including means for displaying said count, means for decrementing said count responsive to machine use and means for controlling the operating state of the machine in accordance with the count stored in the card unit, said method comprising the steps of:
inserting a card unit into said programming unit;
incrementing the count in said card unit counter means in accordance with a preselected quantity and displaying the count in said card unit to confirm the transfer of the desired count;
inserting the preprogrammed card unit into the card reader unit;
enabling the machine coupled to said card reader unit only when said count is other than a predetermined quantity;
generating a visual display of said count;
altering the count in said card unit counter means as the machine is being used, said count being decre-mented by an amount commensurate with the use of said machine;
disabling said machine when said count reaches said predetermined quantity; and updating the visual display to reflect changes in said count.
inserting a card unit into said programming unit;
incrementing the count in said card unit counter means in accordance with a preselected quantity and displaying the count in said card unit to confirm the transfer of the desired count;
inserting the preprogrammed card unit into the card reader unit;
enabling the machine coupled to said card reader unit only when said count is other than a predetermined quantity;
generating a visual display of said count;
altering the count in said card unit counter means as the machine is being used, said count being decre-mented by an amount commensurate with the use of said machine;
disabling said machine when said count reaches said predetermined quantity; and updating the visual display to reflect changes in said count.
18. The method of Claim 17 further comprising the steps of transferring each decimal digit of the count from said card unit to said card reader unit In a predetermined sequence and continually repeating said sequence.
19. A control system for preventing unauthorized use of a device comprising:
a card unit having solid state counter means;
a control unit including means for receiving said card unit;
security means in said card unit for providing an enabling condition;
detector means in said control unit responsive to said enabling condition for generating a device enabling signal;
device enabling means responsive to device usage for coupling decrementing pulses to said counter means;
means in said card reader unit responsive to a predetermined count in said counter means for perman-ently disabling said enabling conditiona generating means; and said device enabling means being deactivated in the absence of said enabling condition.
a card unit having solid state counter means;
a control unit including means for receiving said card unit;
security means in said card unit for providing an enabling condition;
detector means in said control unit responsive to said enabling condition for generating a device enabling signal;
device enabling means responsive to device usage for coupling decrementing pulses to said counter means;
means in said card reader unit responsive to a predetermined count in said counter means for perman-ently disabling said enabling conditiona generating means; and said device enabling means being deactivated in the absence of said enabling condition.
20. The control system of Claim 19, wherein said logic means comprises zero count detector means.
21. A miniaturized portable card unit for use with a control. unit, arranged to enable a device coupled thereto when a valid card unit is inserted into the control unit, said card unit comprising:
solid state counter means for storing a prepro-grammed count;
means for decrementing said preprogrammed count responsive to device usage signals received from the control means when said device is operated;
zero detection means;
identifying means for generating an identifying code when the card unit is coupled to the control unit;
coupling means having a first condition for normally coupling said identifying means to the control unit and a second condition for decoupling said identi-fying means from said control unit; and count detecting means responsive to a prede-termined count in said counter means for operating said coupling means to said second state.
solid state counter means for storing a prepro-grammed count;
means for decrementing said preprogrammed count responsive to device usage signals received from the control means when said device is operated;
zero detection means;
identifying means for generating an identifying code when the card unit is coupled to the control unit;
coupling means having a first condition for normally coupling said identifying means to the control unit and a second condition for decoupling said identi-fying means from said control unit; and count detecting means responsive to a prede-termined count in said counter means for operating said coupling means to said second state.
22. The card unit of Claim 21, wherein said iden-tifying means comprises means for generating a mult-bit binary identifying code.
23. The card unit of Claim 22, wherein the coupling means is inaccessible from the exterior of said card unit.
24. The card unit of Claim 22,including housing means for completely enclosing all of the electronic components of said card unit;
connector means including electrical terminals arranged along the exterior of housing means for elec-trically connecting the electronic components in said housing means with the control unit.
connector means including electrical terminals arranged along the exterior of housing means for elec-trically connecting the electronic components in said housing means with the control unit.
25. The card unit of Claim 24, wherein said coupl-ing means includes a reset terminal for receiving a reset signal for resetting said coupling means to said first condition; and said reset terminal being inacces-sible from the exterior of said housing means.
26. A method for operating a card unit having a counter and arranged for use with a device the access of which is controlled by a control unit designed to enable said device only upon receipt of a valid card unit, said method comprising the steps of:
detecting the presence of a power signal when the card unit is inserted into the control unit;
examining said predetermined count;
generating an identity signal and applying the identity signal to the control unit when said count Is non-zero;
reducing the count in said counter in the presence of a device usage signal derived from the control unit;
and terminating generation of said identity signal when said count reaches zero.
detecting the presence of a power signal when the card unit is inserted into the control unit;
examining said predetermined count;
generating an identity signal and applying the identity signal to the control unit when said count Is non-zero;
reducing the count in said counter in the presence of a device usage signal derived from the control unit;
and terminating generation of said identity signal when said count reaches zero.
27. The method of Claim 26, wherein the step of generating an identity signal comprises the step of generating a binary coded identity signal.
28. The method of Claim 26, further comprising the step of increasing the count in said counter in the presence of count setting signals applied to the card unit from an external source; and preventing any further increase of said count upon the receipt of count setting signal.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB8,130,276 | 1981-10-07 | ||
| GB8130276 | 1981-10-07 | ||
| US06/371,140 US4458142A (en) | 1981-10-07 | 1982-04-23 | Programmed electronic keycorder unit |
| US371,140 | 1982-04-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1201514A true CA1201514A (en) | 1986-03-04 |
Family
ID=26280912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000412628A Expired CA1201514A (en) | 1981-10-07 | 1982-10-01 | Programmed electronic keycorder unit |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS62201881U (en) |
| CA (1) | CA1201514A (en) |
| DE (1) | DE3237063A1 (en) |
| FR (1) | FR2514174B1 (en) |
| GB (1) | GB2107500B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0658670B2 (en) * | 1983-08-01 | 1994-08-03 | 沖電気工業株式会社 | Automatic trading system |
| US4709137A (en) * | 1984-04-16 | 1987-11-24 | Omron Tateisi Electronics Co. | IC card and financial transaction processing system using IC card |
| CH664226A5 (en) * | 1984-12-20 | 1988-02-15 | Landis & Gyr Ag | CASH PAYER FOR CASH-FREE PURCHASE OF ELECTRICAL ENERGY BY PRE-PAID VALUE CARDS. |
| DE3782565T2 (en) * | 1986-06-16 | 1993-05-13 | Schlumberger Ind Ltd | ELECTRONIC KEY. |
| NO881248L (en) * | 1988-03-22 | 1989-09-25 | Jon Lie | SYSTEM FOR REGISTRATION AND TAX TAXATION OF TRAVELERS O.L |
| GB9925227D0 (en) | 1999-10-25 | 1999-12-22 | Internet Limited | Data storage retrieval and access system |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2386080A1 (en) * | 1977-03-31 | 1978-10-27 | Cii Honeywell Bull | ACCOUNTING SYSTEM FOR PREDETERMINED HOMOGENEOUS UNITS |
-
1982
- 1982-10-01 CA CA000412628A patent/CA1201514A/en not_active Expired
- 1982-10-05 GB GB08228365A patent/GB2107500B/en not_active Expired
- 1982-10-06 DE DE19823237063 patent/DE3237063A1/en not_active Withdrawn
- 1982-10-07 FR FR8216815A patent/FR2514174B1/en not_active Expired
-
1987
- 1987-05-25 JP JP7868487U patent/JPS62201881U/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE3237063A1 (en) | 1983-04-21 |
| FR2514174A1 (en) | 1983-04-08 |
| GB2107500A (en) | 1983-04-27 |
| FR2514174B1 (en) | 1986-03-21 |
| GB2107500B (en) | 1985-09-11 |
| JPS62201881U (en) | 1987-12-23 |
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| MKEX | Expiry |