CA1182545A - Anti-lock device for vehicle brakes - Google Patents
Anti-lock device for vehicle brakesInfo
- Publication number
- CA1182545A CA1182545A CA000385825A CA385825A CA1182545A CA 1182545 A CA1182545 A CA 1182545A CA 000385825 A CA000385825 A CA 000385825A CA 385825 A CA385825 A CA 385825A CA 1182545 A CA1182545 A CA 1182545A
- Authority
- CA
- Canada
- Prior art keywords
- counter
- memory
- output
- wheel speed
- lock device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
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- Regulating Braking Force (AREA)
Abstract
ANTI-LOCK DEVICE FOR VEHICLE BRAKES
Abstract of the Disclosure An anti-lock device for vehicle brakes has a wheel gen-erator which emits pulse-type signals whose frequency is pro-portional to the rotary speed of the wheel. A counter counts the pulses emitted during each of successive time intervals and these pulses are connected to a first memory which stores the count of the immediate preceding time interval and to a second memory which stores the count of the time interval next preceding the intermediate time interval. A logic circuit then produces a wheel speed value which is based on the wheel speed counts of the immediate preceding and next preceding time intervals.
Abstract of the Disclosure An anti-lock device for vehicle brakes has a wheel gen-erator which emits pulse-type signals whose frequency is pro-portional to the rotary speed of the wheel. A counter counts the pulses emitted during each of successive time intervals and these pulses are connected to a first memory which stores the count of the immediate preceding time interval and to a second memory which stores the count of the time interval next preceding the intermediate time interval. A logic circuit then produces a wheel speed value which is based on the wheel speed counts of the immediate preceding and next preceding time intervals.
Description
The present invention relates to an anti-lock device for vehicle brakes in whi h a w~e7 ~enerator produces signal pulses whose frequency is proporti~nal to ~he wheel sp~ed, more particularly, to such a device which produces a wheel speed signal which more closely corresponds to the actual wheel speed at the end of a measurement time interval.
~ t has been known to protect vehicle brake systems against locking or slipping with a device which senses the rotary speed of at least one wheel and utilizes an evaluation circuit which controls the actuation of the vehicle brakes in response to the sens~ wheel speedsignals. The wheel speed is generally sensed by a generator coupled to the wheel and the frequency of the output signals of the generator is proportional to the wheel speed~ There are generally further provided a digital counter connected to the generator and a control circuit connected to the control input of the counter which alternately, during predetermined measurement intervals, sets the counter in readiness to count, resets the counter and/or stops the counter at the end of a time interval. A memory is provided to which i9 introduced the count of the counter at those times predetermined by the control circuit.
Such a device fox a vehicle brake system is known in general and usua]ly uses a pulse generator with rectangular output signals.
If a generator is used with sine-output signals, a pulse shaper stage (sine/rectangular converter) is also connected with the generator so as to produce rectangular siynals. A significant disadvantage of such vehicle brake systems is that the value obtained at the end of a measurement time interval is only correct when the wheel speed of the wheel has not changed and has remained constant during the time interval of measurement. In those
~ t has been known to protect vehicle brake systems against locking or slipping with a device which senses the rotary speed of at least one wheel and utilizes an evaluation circuit which controls the actuation of the vehicle brakes in response to the sens~ wheel speedsignals. The wheel speed is generally sensed by a generator coupled to the wheel and the frequency of the output signals of the generator is proportional to the wheel speed~ There are generally further provided a digital counter connected to the generator and a control circuit connected to the control input of the counter which alternately, during predetermined measurement intervals, sets the counter in readiness to count, resets the counter and/or stops the counter at the end of a time interval. A memory is provided to which i9 introduced the count of the counter at those times predetermined by the control circuit.
Such a device fox a vehicle brake system is known in general and usua]ly uses a pulse generator with rectangular output signals.
If a generator is used with sine-output signals, a pulse shaper stage (sine/rectangular converter) is also connected with the generator so as to produce rectangular siynals. A significant disadvantage of such vehicle brake systems is that the value obtained at the end of a measurement time interval is only correct when the wheel speed of the wheel has not changed and has remained constant during the time interval of measurement. In those
-2-1 ~825~5 situations where the wheel speed varies during the time interval the measuxed value obtai~ed represents only an avera~e ~ the wheel speed during the measurement interval.
It is pre~erred and it is most advantageous if the vehicle brake system could be protected against locking with respect to the actual wheel speed of the vehicle and not some value of wheel speed which is lagging behind ~he actual wheel speed, particularly when there are relatively rapid variations in wheel speed such as would occur during a control cycle involving ei~her acceleration or deceleration of the vehicle.
It is therefore the principal object of the present invention to provide a novel and improved anti-lock device for vehicle brakes of the type as generally disclosed herein.
It is another objec~ of the present invention to provide such an anti lock device for vehicle brakes wherein the measured value of the wheel speed more closely corresponds to the actual wheel speed occurring at the end of a measurement time interval~
It is a further object of the present invention to provide a device for preventing locking in a vehicle brake system wherein the wheel speed value used for actuating the d~vice is based upon the wheel speed counts for two successive time intervals, According to one aspect of the present invention there is provided an anti-lock device for vehicle brakes wherein means connected to a vehicle wheel generates an output signal indicative of the wheel speed. This output signal is transmitted to a digital counter which is also connected to a control circuit for setting the c~unter to count during a predetermined time interval, locking the counter after the time interval and xesetting the counter for a further time interval. A irst memory connected to the counter ~ores the count ~rom the countex of the immediate ~ ~2~4~
preceding time in~erval and a second memory connected to the contro] circuit and to either ~he ~ounter o~ first memory stores the COUll't of the counter of the next preceding time interval.
An evaluating circuit connected to both first and second memories then produces a wheel speed value based upon the two stored wheel speed counts of the immedia~e preceding and next preceding time intervals.
The anti-lock device for the vehicle brakes thus is actuated by corrected wheel speed value obtained by extrapolation of the measured wheel speed values of the immediate and next preceding time intervals. This extrapolation may be linear or quadratic.
Other objects and advantages of the present invention will be apparent upon reference to the accompanying description when taken in conjunction with the following drawings, which are exemplary, wherein;
Fig. 1 is a block circuit diagram of the anti-lock device of the present invention;
Fig. 2 is a graph showing changes of wheel speed with respect to measurement time intervals in accordance with the anti-lock device of the present invention;
Fig. 3 is a block diagram of a modification of Fig. 1 and showing wiring connections between the several components of the anti-lock device; and Fig. 4 is a chart showing a single control pulse with respect to time~
Proceeding next to the drawings wherein like reference symbols indicate the same parts throughout the various views a specific embodiment and modi~i~ation~ of the present invention will be described in detail.
1 ~2~4~
As may be seen in Fig~ 1, a pulse generator 1 which is coupled to a wheel ~f the vehicle so as to be drive~ thereby produces a pulse-form output signal the frequency of which is proportional to the rotary speed of the wheel. The pulse generator could be connected together with a pulse shaper stage, if nec-essary, in order to produce a rectangular signal.
The output of the pulse generator 1 is connected to one input of a gate circuit 2 which i5 preferably an AN~ ga~e ~he output of which is supplied to the counter input of a digital counter 3. A control circuit 4 is connected to a second input of the gate circuit 2 and also to a control input of the counter
It is pre~erred and it is most advantageous if the vehicle brake system could be protected against locking with respect to the actual wheel speed of the vehicle and not some value of wheel speed which is lagging behind ~he actual wheel speed, particularly when there are relatively rapid variations in wheel speed such as would occur during a control cycle involving ei~her acceleration or deceleration of the vehicle.
It is therefore the principal object of the present invention to provide a novel and improved anti-lock device for vehicle brakes of the type as generally disclosed herein.
It is another objec~ of the present invention to provide such an anti lock device for vehicle brakes wherein the measured value of the wheel speed more closely corresponds to the actual wheel speed occurring at the end of a measurement time interval~
It is a further object of the present invention to provide a device for preventing locking in a vehicle brake system wherein the wheel speed value used for actuating the d~vice is based upon the wheel speed counts for two successive time intervals, According to one aspect of the present invention there is provided an anti-lock device for vehicle brakes wherein means connected to a vehicle wheel generates an output signal indicative of the wheel speed. This output signal is transmitted to a digital counter which is also connected to a control circuit for setting the c~unter to count during a predetermined time interval, locking the counter after the time interval and xesetting the counter for a further time interval. A irst memory connected to the counter ~ores the count ~rom the countex of the immediate ~ ~2~4~
preceding time in~erval and a second memory connected to the contro] circuit and to either ~he ~ounter o~ first memory stores the COUll't of the counter of the next preceding time interval.
An evaluating circuit connected to both first and second memories then produces a wheel speed value based upon the two stored wheel speed counts of the immedia~e preceding and next preceding time intervals.
The anti-lock device for the vehicle brakes thus is actuated by corrected wheel speed value obtained by extrapolation of the measured wheel speed values of the immediate and next preceding time intervals. This extrapolation may be linear or quadratic.
Other objects and advantages of the present invention will be apparent upon reference to the accompanying description when taken in conjunction with the following drawings, which are exemplary, wherein;
Fig. 1 is a block circuit diagram of the anti-lock device of the present invention;
Fig. 2 is a graph showing changes of wheel speed with respect to measurement time intervals in accordance with the anti-lock device of the present invention;
Fig. 3 is a block diagram of a modification of Fig. 1 and showing wiring connections between the several components of the anti-lock device; and Fig. 4 is a chart showing a single control pulse with respect to time~
Proceeding next to the drawings wherein like reference symbols indicate the same parts throughout the various views a specific embodiment and modi~i~ation~ of the present invention will be described in detail.
1 ~2~4~
As may be seen in Fig~ 1, a pulse generator 1 which is coupled to a wheel ~f the vehicle so as to be drive~ thereby produces a pulse-form output signal the frequency of which is proportional to the rotary speed of the wheel. The pulse generator could be connected together with a pulse shaper stage, if nec-essary, in order to produce a rectangular signal.
The output of the pulse generator 1 is connected to one input of a gate circuit 2 which i5 preferably an AN~ ga~e ~he output of which is supplied to the counter input of a digital counter 3. A control circuit 4 is connected to a second input of the gate circuit 2 and also to a control input of the counter
3. The output of the counter 3 is connected to an input of a first memory 5. The output of the memory 5 is connected to the input of a second memory 6.
The outputs of memory 5 are also connected to an input of a factor multiplier 7 and to the input of an adder 8. The other input of the actor multiplier 7 is connected to a factor source 7'~ while the output of the factor multiplier 7 is connected to the other input of the adder B.
The outputs of the second memory 6 are connected to an input of a further factor multiplier 9 which has a second input connected to a further factor source 9'.
The output of the adder B is connected to one input of a subtrac~or 10. Another input of the subtractor 10 is connected to the output of the factor multiplier 9.
The output of the subtractor 10 is a value corresponding to the rotary speed of the wheel at the end of the last or immed-iate preceding time measurement interval~ This wheel speed value is a corrected value of the wheel speed of the immediate preceding ~ ~2~
tirne interval~ ~efer~nce to Fig. 2 will illustrate that the value of the wheel speed ~or ~he immediate preceding time measuremen~ interval T i5 N~Tn) which is the average of the wheel speed during ~he time interva~, assuming a linear variation în speed. The wheel speed value of the next immedia~e preceding time interval Tn lis shown as N(tn 1) The value of the outp~t of the subtractor 10 is 1~5 x N(tn~ ~-0r5. x N(tn 1) And this value corresponds with the value of the wheel speed at the end of the last or immediate preceding time interval T~. Again, as illustrated in Fig. 2, this corrected value is based upon the assumption of a linear change of wheel speed as illustrated in Fig. 2.
This corrected wheel speed value is ~hen introduced into an evaluation circuit which detects from the wheel speed signals any locking or slipping of thP wheel. The correct signals are then supplied from an evaluation circuit to the brakes to overcome any locking of the wheel as measured by the circuit shown in Fig. 1.
The circui~ in Fig. 3 corresponds basically to the circuit of Fig. 1 and the components in Fig. 3 corresponding to components Fig. 1 have the same reference symbols. However, in Fig. 3, the factor multipliers have been replaced by fixed wire connections between the memories 5 or 6 and the adder 8 or the sub~ractor lOo If the outputs of the memories 5 and 6 are binary coded, a multiplication by the factor 0.5 is simply obtained by shifting ~he individual binary position one place to the right, i~e., in the direction of smaller values. This thus means that the inputs of the adder 8 are x~spectiYely connected in the correct alloca~i~ns to ~h~ ou~pu~s Df th~ memory 50 For example~
~ ~825~5 the bit p~sition of the mem~ry 5 w~h the value ~ is connected to the corresponding bit positi~n 2 ~f the adder 8. However, the other inputs of ~he adder 8 are connected to the output of the memory 5 such that the output with the value 2n of the memory is connected to the input with the va]ue 2n 1 of the adder. The connections are continued in this manner until the output with the value 21 is connected to the input with the value 2. The input of the adder with the value 2n hence leads to the value 0.
In a similar manner, the outputs of the memory 6 are connected, shifted by one bit position, to the inputs of the subtractor 10. In addition, it can also be provided that the outputs of the subtractor 10 are connected to inputs of a further memory 11.
The time sequence of the individual control pulses is illustrated in Fig. 4. The control pulses A represent the gate pulses while the gate circuit 2 passes the pulses from the pulse generator 1. At the end of each individual pulse A there appears a short pulse B which controls the memory 6 such that the memory 6 accepts the memory content of the memory 5. After the disappear-ance of the respective pulses N, there also appears a short pulse C which controls the memory 5 such that it accepts the count value of the counter 3. After disappearance of the respective pulse C, there then appears a reset pulse D which resets the counter 3 to 0. Upon this resetting step, the next gate control pulse A appears and a new measurement cycle commences.
It is therefore apparent that the circuit as described -herein will always supply the exact value of the ~PM or wheel speed at the end of the respective l~st or immediately preceding 5 ~ 5 measurem~nt interv~l both wi~h incr~asing and decreasing wheel speeds ~en the wheel speed varies linearly during a time measurement interval.
It is to be understood that instead of a linear extra-polation as disclosed and described above, a quadratic or cubic extrapolation can also be use~. It is also possible to use an exponential ~r hyperbolic extrapolation when it is raason-ably expected ~hat the wheel speeds will vary according to such a function and when a much higher deyree of measurement accuracy is desired. The logic circuit of components 7 - 10 must then be constructed such that this circuit determines the corresponding function from the two counter values.
The accuracy of wheel speed measurement can be even further increased by providing a third memory which is connected after ~he memory 6 and which then contains the count value of the counter of the second next immediate preceding time interval tTn 2).
Thus it can be seen that the present invention has provided an improved anti-lock device for vehicle brakes wherein the wheel speed value is based upon the actual wheel speed at the 2~ end of a time measurement interval. This value is based upon a linear variation o~ speed during time measurement intervals, but can also be based on the variation of the wheel speed based upon other functions such as hyperbolic or quadratic. The signals thus transmitted by the evaluating circult are based upon wheel speed of the immediately preceding time measurement interval and not upon a lagging wheel speed value, such a~ for exampl~, the average wheel speed of a time measurement interval.
It will be understood that this invention is sueceptible to modification in order ~o a~ap~ i to different usages and ~8-1 ~2.~
conditions, and acco~dingly, it i5 designç~d to comprehend such 3nodifications within this inventiorl as they fall within the scope of the apended claims.
The outputs of memory 5 are also connected to an input of a factor multiplier 7 and to the input of an adder 8. The other input of the actor multiplier 7 is connected to a factor source 7'~ while the output of the factor multiplier 7 is connected to the other input of the adder B.
The outputs of the second memory 6 are connected to an input of a further factor multiplier 9 which has a second input connected to a further factor source 9'.
The output of the adder B is connected to one input of a subtrac~or 10. Another input of the subtractor 10 is connected to the output of the factor multiplier 9.
The output of the subtractor 10 is a value corresponding to the rotary speed of the wheel at the end of the last or immed-iate preceding time measurement interval~ This wheel speed value is a corrected value of the wheel speed of the immediate preceding ~ ~2~
tirne interval~ ~efer~nce to Fig. 2 will illustrate that the value of the wheel speed ~or ~he immediate preceding time measuremen~ interval T i5 N~Tn) which is the average of the wheel speed during ~he time interva~, assuming a linear variation în speed. The wheel speed value of the next immedia~e preceding time interval Tn lis shown as N(tn 1) The value of the outp~t of the subtractor 10 is 1~5 x N(tn~ ~-0r5. x N(tn 1) And this value corresponds with the value of the wheel speed at the end of the last or immediate preceding time interval T~. Again, as illustrated in Fig. 2, this corrected value is based upon the assumption of a linear change of wheel speed as illustrated in Fig. 2.
This corrected wheel speed value is ~hen introduced into an evaluation circuit which detects from the wheel speed signals any locking or slipping of thP wheel. The correct signals are then supplied from an evaluation circuit to the brakes to overcome any locking of the wheel as measured by the circuit shown in Fig. 1.
The circui~ in Fig. 3 corresponds basically to the circuit of Fig. 1 and the components in Fig. 3 corresponding to components Fig. 1 have the same reference symbols. However, in Fig. 3, the factor multipliers have been replaced by fixed wire connections between the memories 5 or 6 and the adder 8 or the sub~ractor lOo If the outputs of the memories 5 and 6 are binary coded, a multiplication by the factor 0.5 is simply obtained by shifting ~he individual binary position one place to the right, i~e., in the direction of smaller values. This thus means that the inputs of the adder 8 are x~spectiYely connected in the correct alloca~i~ns to ~h~ ou~pu~s Df th~ memory 50 For example~
~ ~825~5 the bit p~sition of the mem~ry 5 w~h the value ~ is connected to the corresponding bit positi~n 2 ~f the adder 8. However, the other inputs of ~he adder 8 are connected to the output of the memory 5 such that the output with the value 2n of the memory is connected to the input with the va]ue 2n 1 of the adder. The connections are continued in this manner until the output with the value 21 is connected to the input with the value 2. The input of the adder with the value 2n hence leads to the value 0.
In a similar manner, the outputs of the memory 6 are connected, shifted by one bit position, to the inputs of the subtractor 10. In addition, it can also be provided that the outputs of the subtractor 10 are connected to inputs of a further memory 11.
The time sequence of the individual control pulses is illustrated in Fig. 4. The control pulses A represent the gate pulses while the gate circuit 2 passes the pulses from the pulse generator 1. At the end of each individual pulse A there appears a short pulse B which controls the memory 6 such that the memory 6 accepts the memory content of the memory 5. After the disappear-ance of the respective pulses N, there also appears a short pulse C which controls the memory 5 such that it accepts the count value of the counter 3. After disappearance of the respective pulse C, there then appears a reset pulse D which resets the counter 3 to 0. Upon this resetting step, the next gate control pulse A appears and a new measurement cycle commences.
It is therefore apparent that the circuit as described -herein will always supply the exact value of the ~PM or wheel speed at the end of the respective l~st or immediately preceding 5 ~ 5 measurem~nt interv~l both wi~h incr~asing and decreasing wheel speeds ~en the wheel speed varies linearly during a time measurement interval.
It is to be understood that instead of a linear extra-polation as disclosed and described above, a quadratic or cubic extrapolation can also be use~. It is also possible to use an exponential ~r hyperbolic extrapolation when it is raason-ably expected ~hat the wheel speeds will vary according to such a function and when a much higher deyree of measurement accuracy is desired. The logic circuit of components 7 - 10 must then be constructed such that this circuit determines the corresponding function from the two counter values.
The accuracy of wheel speed measurement can be even further increased by providing a third memory which is connected after ~he memory 6 and which then contains the count value of the counter of the second next immediate preceding time interval tTn 2).
Thus it can be seen that the present invention has provided an improved anti-lock device for vehicle brakes wherein the wheel speed value is based upon the actual wheel speed at the 2~ end of a time measurement interval. This value is based upon a linear variation o~ speed during time measurement intervals, but can also be based on the variation of the wheel speed based upon other functions such as hyperbolic or quadratic. The signals thus transmitted by the evaluating circult are based upon wheel speed of the immediately preceding time measurement interval and not upon a lagging wheel speed value, such a~ for exampl~, the average wheel speed of a time measurement interval.
It will be understood that this invention is sueceptible to modification in order ~o a~ap~ i to different usages and ~8-1 ~2.~
conditions, and acco~dingly, it i5 designç~d to comprehend such 3nodifications within this inventiorl as they fall within the scope of the apended claims.
Claims (6)
1. In an anti-lock device for vehicle brakes, the com-bination of means connected to a wheel of a vehicle for gener-ating an output signal indicative of the wheel speed, a digital counter having a counter input connected to the output of said signal generating means, control circuit means connected to a control input of said counter for setting the counter to count during a predetermined time interval and locking the counter after the time interval and resetting the counter for a further time interval, a first memory connected to an output of said counter and to said control circuit means to store the count of the counter at times set by said control circuit means, a second memory connected to said control circuit means and to one of said counter and said first memory to store the count of the counter of the next preceding time interval while said first memory stores the count of the immediate preceding time interval, and evaluating circuit means connected to both said first and second memories for producing a wheel speed value based on the two stored wheel speed counts of the immediate preceding and next preceding time intervals.
2. In an anti-lock device as claimed in claim 1 wherein said evaluating circuit means performs a linear extrapolation between said wheel speed counts.
3. In an anti-lock device as claimed in claim 1 wherein said evaluating circuit means comprises a first factor multiplier connected to the output of said first memory, an adder having first input connected to the output of said first memory and a second input connected to an output of said first multiplier, a second factor multiplier connected to the output of said second memory, a subtractor having a first input connected to an output of said adder and a second input connected to an output of said second factor multiplier, said subtractor pro-ducing said wheel speed value.
4. In an anti-lock device as claimed in claim 3 wherein said first and said second factor multipliers each multiply their input values by the factor 0.5.
5. In an anti-lock device as claimed in claim 4 wherein said factor multipliers comprise fixed wire connections displaced by one bit position between the components being connected.
6. In an anti-lock device as claimed in claim 1 and further comprising a third memory connected to an input of said evaluating circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000385825A CA1182545A (en) | 1981-09-14 | 1981-09-14 | Anti-lock device for vehicle brakes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000385825A CA1182545A (en) | 1981-09-14 | 1981-09-14 | Anti-lock device for vehicle brakes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1182545A true CA1182545A (en) | 1985-02-12 |
Family
ID=4120942
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000385825A Expired CA1182545A (en) | 1981-09-14 | 1981-09-14 | Anti-lock device for vehicle brakes |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1182545A (en) |
-
1981
- 1981-09-14 CA CA000385825A patent/CA1182545A/en not_active Expired
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| MKEX | Expiry |