'l~itlc of the Invention UNIVERSAL DOCUMENT VA~IDATOR
nack~round of the Invention Many systems are known in the prior art for validating documents, and particularly for validating pieces of currency either to permit changc to be given or to establish a crcdit for the sale of goods or services.
These systcms of the prior art operate generally on either one of or a combination of two different principles.
First, light fron- a source may be directed toward the document to be validated and either reflected or trans-mitted light may be sensed to determine an optical char-acteristic of thc document under test. Alternatively and particularly with United States currency, magnetic prop-erties of the ink wiLh which the bill is printed may besensed in the coursc of the validating operation. Combina-tions of the optical and magnetic arrangements may be employed.
While thc arrangements of the prior art for validating documcnts operate more or less successfully, they suffer from a number of defects. First, they are ~.
not as vcrsati~e as i5 desirable, in that most of them are limitcd to t~le validation of one particular type of document, suC]l for example as a United States one dollar bill, or a United States fivc dollar bLll. Secondly, they are not as reliable as is desirable, in that many of them will reject what is a genuine document, while at the same time acccpting a bogus document. A further defect of document validators of the prior art is that, once they are sct up for validation of a document of a partiçular type, they cannot readily be altered to accept a document of a different type.
Slmmarv of the Invention One object of my invention is to provide a universal document validator which overcomes the defects of document validators of the prior art.
Another object of my invention is to provid*
a document validator which i9 capable of validating a document of more than a single type.
A further object of my invention i5 to provide a universal document validator which i5 more reliable than are validators of the prior art.
Still another object of my invention is to
provide a documcnt validator whic11 can readily be changed to validate a document of a different type from that for which the va1iaator was initially set.
Other and further objects of my invention will appear from the following description.
In general my invention contemplates the provision of a universal document validator, in which a document is transported along a path from an entrance towarq an exit past an array of a plurality of photore-sponsive elcments posi.tioned at a predetermined locationalong the path. In response to the arrival of the docu-ment at one or more predetermi.ned positions along the path, an area or areas thereof are llluminated and light from the illuminated area is directed over the array of lS photosensitive elcments. ~ microT)rocessor unit extracts from the illuminatcd array pictures of the areas in terms of the number of clemcnts thereof activated to a pre-determined level and, for each picture, compares this element with a first storcd number, corresponding to the minimum number of elements which must be illuminated for an acceptable document and with a second number corres-ponding to the Maximum number of elements which should be illuminated for an acceptable document to produce a validating signal when the number of activated elements
-3-for each picture falls within the limits determined by ~~
the first an-l second numbers and for rejecting the docu-ment when the activated number of elements is outside the limits. The mi.croprocessor uni.t of my document validator is adapted to be set up to feed information to the memories carryincJ the first and second numbers in response to the documents past through the system to cause the validator to learn to validate a different type of document. My universal document validator is readily adapt~d to be sct up selectively to validatc a plurality of documents of di~ferent types.
Br.ief Descri~ion of the Drawinqs In the accompanying drawings to which reference is made in the instant specification and which are to be read in conjunction therewith and in which like reference characters are used to indicate like parts in the various views:
FIGURE 1 is a sectional view of one form of my universal document validator.
FIGU~E 2 is a block diagram illustrating the various components of my universal document validator.
FIGURE 3 is a schematic view illustrating a ~ ~L6a~
portion of the microprOCesSOr circuitry of my universal document validator.
FIGURE 4 is a schematic view of a further portion of the microprocessor circuitry of my universal documcnt validator.
FIGURE 5 is a schematic view of a still further portion of the microprocessor circuitry of my universal document validator.
' FIGURE G is a schematic view of the photo-sensitive array and associated circuitry of my universal document validator.
FIGURE 7 is a schematic view of the keyboard and selection s~itch system of my universal document validator.
lS FIGURE 8 is a flow chArt illustrating the initial portion of the general program of my universal document validator.
FIGIJRE 9 is a flow chart ill~strating the final part of the initial portion of the general program routine of my univQrsal document validator.
FIGURE 10 is a flow chart illustrating the subroutine of rcstoring the previous limits in my universal document validator.
FIGUÇ~E 11 is a flow chart illustrating the learning subroutine of my universal document validator.
PIGURE 12 is a flow chart illustrating the validatlng subroutine of my universal document validator.
D~ e~on of the Preferrcd Embodiment Referring now to FIGURE 1 of the drawings, my universal document validator includes a housing lO having an inlet mouth 12 leading into the space between an upper guide 14 and a lower guide 16. The base 18 of the housing lO supports a reversible motor 20, the shaft of which carries a sprocket wheel 22 adapted to drive a pitch chain 24. Chain 24 engages a first sprocket wheel 26 adapted to drive the lower roller 28 of a first pair of rollers including a pressure roller 30 urged into engagement with roller 28. Thc chain 24 extends around an idler sprocket 32 supported on the housing lO in such a manner as to permit adjustment of the tension in the chain in a manner known to the art to a sprocket wheel 34 adapted to drive an intermediate roller 36 having associated therewith another roller 38, resiliently urged into engagement with the roller 36. From sprocket wheel 34 a chain 24 passes .fi4~
to a sprocket wheel 40 adaptcd to drive a lower roller 42 as.sociated with an upper rollcr 44 resiliently urged into engagement with the lower roller 42. From sprocket wheel 42, chain 2~ extends around sprocket wheel 46 and back to the wheel 22. ~heel 48 is adapted to drive a roller 48 having an upper roller 50 associated therewith.
In one form of my universal document validator the leadir.g edge of a docum~nt to be validated is inserted into the mouth 12, so as to interrupt the passage of light from a source 52 toward a detector 54. In response to this action, motor 20 is energized in the forward direction to cause roller 28 to advance the bill along the passage formed by the upper guide 1~ and the lower guide 16. When the bill arrives at a predetermined location along the transport path, light from a source 56 is prevented from energizing a photocell 58 to a level sufficient to initiate further operation of the machine. Stated otherwise, in-terruption of this light beam either by the leading edge of the bill itself over by the leading edge of printing 20 initiates further operation of my universal bill acceptor.
I so arrange my system as to cause this bill position sensing system to .start the validating operation, for example, when a predetërmined area of the bill is over a window 60 formed in the lower guide 16. Window 60 is normally closed by a shutter 62 adapted to be opened upon ~fi~
the onergi~.ation of a solcnoid 63, for example. Pref- ~-orably tlle side of thc shutter 62 which is exposed to light when the shutter is clo3ed is provided with a reflective pattern for calibration purposes.
Whcn the window 60 is open and the validation operation is to take place, light from a source 64 is adapted to illuminate the area of the document above the window 60. Li~3ht reflected from thc document is focused by a lens 66 on an imaging chip 68 having an array 70 of 128 individual photosensitive elements, for example. The microprocessor circuitry which is responsive to the various input sigllal3 of the system may be housed in a~y suitable subhousing, such for example as the subhousing 72 indicated schematically in FIGURE 1. ~s will more fully be explained liereinbelow, the elements of the array 70 may be polled a number of times in the course of passage of a document through the valid~tor to provide as many "pictures" of predetermined areas of the document as desirable or as roquired.
Referring now to the block diagram of FIGURE
2, my validator includes a power supply 74 adapted to provide the proper po~entials for operating the drive motor and for thc logic units of the system from a source of alternating current at tho installation at which my ~ ~6~
validator is used. More specifically, the supply 74 provides power for t:he transport drive 20, for the docu-ment position scllsor including the elements 52, 54, 56 and 5~, for the light source 64, for the image sensor unit 68, for the cloclc pulse generator 76, for the transport device controller 109ic 78, ~or the temporary data storage unit 80, for the data manipulation unit 82, for the validation decision unit 84, for the synchroniæ-ing unit 86, for the image sensor drive logic 88, and for the buffcr memory 90. Clock pulsc generator 76 provides input clock pulses for the transport device controller 78, for the temporary data storage unit 80, for the data manipulation unit 82, for the validation decision unit 84, for the synchroniæing unit 86, for the image sensor drive logic 88, and for the buffer memory 90. When a bill enters the transport system, the docu-ment position sensors 52, S~ put out a signal which actuates the transport device con~roller 78 through a channel 92 to provide a transport drive 20 with a forward drive signal on a channel 94. When the leading edge of thc bill, or the leading edge of the printing reaches the sensing system 56,VS8 an input signal is provided on a channel 96 to the synchronizing system, which at the propcr point in time provides a synchronizing signal to the image sensor drive logic 88, on a channel 9S, and to _g_ the buffer memory 90, on a channel 97. This doeument .:
position sic~nal call al~so be used to energize solenoid 63 to open the shuttc!r 62. When an area of the bill or document from which the "picture" is to be taken arrives at the window 60, the image sensor 68 is polled to feed output data to the buffer memory 90 on a ehannel 98.
Each "picture" coMprises 128 output signals, which are compared with a threshold voltage to produce logical output "l's" which may, for example, be 5 volt DC pulses, or "O's" which may, for example, he O volts DC. In re-sponse to synchronizing signal on channel 96, the in-formation is fed from the buffer memory 90 to the temporary data storage unit 80 along a channel 99. In addition to the synchronizing signals already identified, the unit 86 provides a synchronizing signal to the units 80, 82 and 84 on channels 100, 102 and 104. Respective channels 106 and 108 provide two-way eommunication between units 80 and 82 and betw~en units 82 and 84. Channel 110 provides two-way communication between 80 and 84.
Once the picture has l~een .~ed to the cont.rol system in the manner described, the data manipulation circuitry adds up the number of high level bits contained in the picture ~lncl stores the sum in the temporary storage register 80. The value of the picture is dependent upon the amount of light being reflected from the document 6~
which, in turn, is a function of the type and condition of the paper and ink used, as well as of the image imprinted on the document at the location at which the picture is takcn. The summing of bits in this manner reduces the effcct of the image being out of position as when the document is not precisely registered.
It is contemplated that as many pictures as desired may be taken, so that after the desired number of pictures has bcell taken, each of the pictures is in its own temporary storage register. At this point, the validation process takes place by considering thc value of each picture individually, or by arithmetically combining two or more of the picture values. The re-sultant values are then checked to determine whether or not they fall within predetermined limits for a valid document of the type undcr consideration. As will be pointed out more fully hereinbelow, the validator may contain acceptable limits for several different documents, in which case the picture data is checked to see if it falls within the acceptable limits of any of the documents.
Should the documcnts be determined to be valid the con-troller puts out a "valid" pulse on a channel 112 and the docwnent continues to travel through the validator until it leaves the e~it, at which point it may be stacked, in .. ... r ~ ~64100 a manner known 1:o the art. If it is detcrmined that the the bill is not valid, the circuit 8~ puts out a signal on channel 114 indicating that the bill does not fall within the acceptable limits, so that circuit 78 puts S out a signal on channel 94 causing the transport drive 20 to reverse to return the bill to the customer.
Referring now to ~IGURES 3 to 5, there is shown the schematic diagram of thc computer portion of the system alony with some of the circuits for controlling the image sensor, lhe transport motor, and so 'corth. For purposes of clarity the interconnections between EICURES
3 and 4 have been (iesignated by the respective reference characters a to mm in the two figures. In an analogous manner the interconnections between ~IGURES 4 and 5 have been designated by reference characters nn to eee in the two figures. In the arrangement shown in these figures, Zl is the central processing unit, which may, for example, be an Intel 8085A microprocessor. æ2 is an Intel 8355 chip providing a combinatlon of program memory (ROM) and 16 lines of input or output. Z3 is an Intel 8155 chip affordin~ a combination of worlcing memory (RAM) a timer, and 22 lines of input or output. Thesc three chips along with Z8, which selects the chip with which the central proeessing unit Z1 co~nunicates, form the brain of the system. The C~U s~lclres the low~r 8 bits of address with 8 bits of data z3 is provided with a "learn" switch and Wit]l switchei SWl and SW2 which determines the ~ode of operation thercof in a manncr known to the art.
z4 which may, for cxample, be an Intel 8212, 8 bit input-output port holds constant the address bits, so that z5 and z6 may operate properly. Each of Z5 and Z6 may, for examplc, be an Intel S101 chip providing a 256 x4 bit static MOS RAM. Both Z5 and z6 are powered by a plus 5 volt DC potential when power is on, and with a 2~4 volt battery when the power fails. Chips Z5 and Z6 contain tl;e "learned" limits from a document and they may be cleared and new limits learned from a different document, if and when this is desired. It is to be understood that where two or more documents or bill types are provided, pairs of similar chips to Z5 and Z6 must be added. These additional pairs would be wired in precisely the ~same manner as Z5 and Z6, except that the first extra pair would have their CEl pir~s (pin 19) tied to pin 11 of Z8 and the second pair would have the corresponding pins tied to pin lO of Z8. By way of exarnple and to avoid repetition, such~extra types have been indicated by B in a circle adjacent to pin 11 nf %8 and C in a circle adjacent to pin 10 of Z8.
1~ power is lost it is necessary that Z5 and æ6 be disable(3. Z7 functions to detect such a power los3 and to disable Z5 and Z6 in that manner.
This chip also provides the proper sequencing for power down and power up thus protectin~ the limits which must not be altercd as a result of power failure.
Z9 is a divide by 16 counter which divides the central processing unit s clock to provide clock pulse for the said sensor and which also provides the clock ilipUt to the timer Z3.
Z10 and Zll make up a digital to analogue converter which is controlled by thc port line Z2 to permit the central processing unit continually to correct for video variations by adjusting the threshold voltage to the video comparator. Z12 and æl6 count the number of video pulses which exceed the threshold and the re-sultant 8--bit picture is availablc to Zl through 8 lines of Z3.
Z14 is a seven segmellt display driven by seven lines of Z3 througll a Darlington array Z13 which adds current to thc input. This display device Z14 provides an indication to the service man of the status of the validator.
~.~64~00 Z15 is a package of four opcrational ampli-ficrs, which may l)e uscd to croatc a pulse on the edge Or printing in rcs!ponse to the sensor 58. This circuit includes a swi~ch ~hich may bc thrown, so that timing would begin on the edgc of the bill, rather than at the e(3ge of printing. Preferably, thc edgc of printing signal is uscd, ra1thcr than the edgc of the document to Minimi~e the effects of misrcgistration of the edge of printing with the ~dge of the document.
Z18 is the video comparator, the output of which will bc a logic "1" if thc vidco lcvel from an clcment on the chip exceeds the threshold, which is the output of the digital to analogue converter formed by Z10 and Zll. The ~utput of Z18 is buffered through a transistor, so tha~t it will have the necessary drive capabilities and is used as the input to the video counters Z12 and ~16.
Referring now to FIGURE 6, as has been ex-plained hereinbefore, the image sensor Z19 is a linear array of 128 individual photoresponsive elements. It will rcadily bc appr~ciated that a planar rather than a linear arra~ mi~ht be employed. The sensor is provided with plus 5 volt and minus 10 volt supply potentials, together with a clock input and a start signal. The 1~64~
clock is providcd by Z9 of FIGURE 3, which clock is the CPV clock divided by 2, 4, a, or 16. By way of example, we have shown tllc clock signal as being divided by 4 in the drawing. The start pulse signal is generated by the use of 3 up counters Z20, Z21 and Z22, which count clock pulses from a preloaded number set at a loadiny time with a number determined by 12 connections indicated as Wl to W12 in FIGURE 6. These up counters operate until z22 produces a carry, which reloads the preset number again and the process repeats itself. The number set by the ~umpers Wl to W12 then, detcrmines the time between video readouts from the chip Zl9. As is indicated in FIGURE ~" a portion of thc start siynal is controlled from two places. That is, it is controlled from Z22 and lS from a transistor illustrated in FIGURE 4, witll the two places being OR wired. The carry signal from Z22 is a free running signal which is repetitive without any supervision from the central processing unit. The other ~signal coming into this circuit labeled "start" in FIGURE
6 is generated by a combination of the edge of printing detector Z17 and the CPU. Its purpose is to reload the counters, so that the count is in synchronism with the bill position. As a bill is inserted into the mechanism, it is transported eventually to the location of the edge detector 58, whioh provides a pulse to the flip-flop of ~16410~ .
Z17 and to the central process unit. The flip-flop out- `~
put is driven high, which pulls the start signal down to cause the coun~:crs Z20 to Z22 to reload, regardless of their present count. The CPU takes action and cléars the flip-flop, which in turn "releases" the start signal and the count is resumed. Thus the array is in synchro-nism with the position of the document. This start signal is also shown in FIGURE 4 as returning to the other flip-flop of Z17 through a transistor, effectively to prpvide thc CPU with a latched start pulse, which norMally lasts only one clock period, thereby allowing some time for tne CPU to recognize that the pulse has occurred.
The video information from the i.mage sensor is available as a difference in voltage at 2 pins. Thus, a differential amplifier, such for example as Z23 may be used to create a video signal to useflll amplitude. The output of amplifier Z23 provides the input to the micro-processor circuitry illustrated in FIGURES 3 to 5.
Referring now to FIGURE 7, a support 116 carries the usual push-button array, indicated generally by th2 reference character 118 providing the keyboard input to the microprocessor illustrated in FIGU~ES 3 to 5. This support llG likewise includes a readout display ~64~0~
indicated gencrally by the reference character 120. I
also provide an assembly of three-positions switches indicated gencrally by the reference character 122 for setting up the microprocessor to provide particular operations in my application of the microprocessor. More specifically, a "mode" switch 12~ is adapted to be moved among three positions. The first position labeled "RES"
indicates a condition or mode in which the microprocessor will reset previous limits. The second position of the switch int1icated by the legend "LR~" indicates a "learn"
mode, in which one set of the memory units of the micro-processor are provided with a set of limits against which future documents of a particular type are to be judged.
In the third mode indicated by the legend "VAL", the system is set to "validate" or to determine whether or not the video output provided by a particular document falls within the limits theretofore set for that particular type of bill. ~ second three-position switch 126 in-dicates the "type" of document A, B, or C for which the unit is set to learnr A third three-position switch 128 is provided for special functions, which can, for example, be "read" indicatt-~d by the legend "RD", "CLEAR" indicated by the ~egend "CLR", or a special function in which the present limits are modified, which position is indicated by the legend "NLIM" in the fiqure.
I'he operation of my universal bill or docu- -:
ment validator can best be understood by reference to the flow charts of FIG~RES ~ to 12. At the start of the program the condition is such that the transport motor is off, the shutter 62 is closed, and the calibration image on the back of the shutter is in place. In a first step of operation, lamp 10 may be illuminated and potential applied to the control system. The resultant picture which is focused on the array 70 is compared with a, stored calibration value and, if the value is correct, the program proceeds. If not, the threshold voltage is adjusted and the comparison again made until the correct value is reached. At this point, a decision is made of whether or not there is a special function re-lS quired. If so, the particular function is detected andis performed and the system returns to the start. If there is no special function required, the next deci~sion is whether or not there has been document or bill in-serted into the validator. If not, the program r~turns to the start. If so, the motor is started and the solenoid 63 is ellergized and the shutter 62 is withdrawn.
I may, if desired, provide my validator with a bacXside test for making a simple test on the backside of the docwnent in question. Since such a test, E~ se, ~64~
forms no part of my invcntion, the detai:Ls thereof have not been shown. I such a test is provided, the backside circuitry is cna]>led iat this ti~e.
Next, thc unit waits fol the detection of S tlle leading edge of printing in the prefe~red form. If no edgc is dctected within a rcasonable length of time, the motor is rev~rsed to return whatever has been inserted and the system r~urns to the start of the program. If the edge has been deteted, my arrangement automatically synchr~nizes the array with the ed~e, so that the proper arca on the bill is examined. This may require an optional step of w~itin~ for the area to reach the window 60.
When the area docs reach the ~indow, the array is polled and the required picture or pictures are acquired and stored. If the system is to operate to create arithmetic picture data other than the si~,ple pictures obtained, this is the next step in the ro~ltine. When that has been done, the function switches are polled to determine what operation is next to be performed. If the arrange-mcnt is sct merely to examine the document as in the case in which it is desired to know what data is at a particu- -lar location on the document, once this information has been read out, the document can bc cleared and stacked and the pro~ram rcturned to start.
If the function switch is so set as to cause ~64~
the previous limits to ~e restored, the program continues as indicated in FIGURE 10, in which the limits first are put in the propar place. Next, the pointer i5 set to the temporary limits atld a pointer is set to the proper limit area as determincd by the document type switch. Next, the data at the tcmporary pointer is moved to the limit pointer. A determination is made of whether or not all limits have been transferred. If not, both pointers are moved to the next address, until all limits have been transferred, at which time the document is pulled through and stacked and the program returns to start.
If, following the preliminary portion of the program illustrated in FIGURES 8 and 9, the system has been set to a "learn" routine, the program continues as indicated in FIGURE 11. Referring to FIGURE 11, in the learn mode the first step is to put the limits in the proper place. Next, the limits are put in the temporary storage register. The pointer is set to the first data picture, then a pointer is set to the first limit of the proper type. This first limit will be the low limit of particular type. A comparison is made of the picture data with the set limit. If the data is less than the set limit, the data is then put into the lower limit register and the program continues. If the data is equal to or ~169~0() ~reater than tlle scL limit, the program continues with-out putting thc d.~ta in lower lin,it register. In con-tlnuing thc pro~ram, a pointer i5 set to the next or upper limit of the picture and a cornparison of the data S to the limit i9 made. If the data is greater than the set uppcr ~imit, it is placed in thc upper limit register and thc program continues. If the data is less than or equal to thc uppcr ]imit, a decision is made as to whether or not all pictures have been tcsted. If so, the document is cleared and stac~ed and the program returns to the start. If not, the pointer is sct to the next picture data for comparison with the lower limit and the program continues. Thi.s opcration continues until sufficient information has been fed to the system to afford a basis for validation.
Ignoring, for purposes of simplicity, arith-metic picture data which could involve negative numbers, it will be clear Chat the minimum possible lower limit is 0, wherein all elements of the array are dark and the maximum possible upper limit would be equal to the numb~r of elemcnts in the array, wherein all elements were illumi-nated. Before a learn process is started, the special func-tion "CLEAR LIMITS" is carried out, which routine sets all lowcr limits at thc maximum po~;sible values and the upper limits at thc minimum possible value. After ~1~;4~00 the data has been taken from the document to he "learned", the proccss begins. In the routine, the type switches are polled, if more than one type of document is to be handled by the system, 50 that the new ]imits can be put S in the propcr memory area. ~irst, the data of the first picture is compared to the first or lower limit in the ~imit memory and if it is less than that limit, the data is placed in the limit location. Next, the data picture number onc is conpared to the next or upper limit, and if it is greater than that limit, then the data is placed in the limit location. This is carried out until all picture data has been learned. More specifically, assuming that the clear limit's function has been executed and that there are 100 elements in the array, the first and second limit mcmory registers wouldcontain 100 and 0, respec-tively, Ass,ume that thc first picture of an inserted document has a value of 55. The learn routirle would see that 55 is less than 100 and that 55 is greater than 0, so thatr as a result, the first and second limit memory registers would be set to 55, 55. If the first picture of the next document produced the number 50, the registers would be set to 50, 55. If the next was 57, the registers would bc set to 50, 57. If a document with a value of 52 wcre then passed through, the limits would remain un-changed.
Outlined below is a specific example carried out on a type "3" document, using the "output limits"
routine to producc the print-o-lt. A four picture system for each document is uscd in this examplc with a max;mum picture value o~ 127. The first print-out was carried out after "CI.EAR LIMITS" was exccuted. The second print-out follo~cd passa~c of the first "learned document", which obviously produced pictures having values of 49, 53, 56 and 60. As can be seen, the second document produced "learned data" which was lower at all locations, while the third document was higher than the two preceding documents at the locations tested. Aqain, when a representative number of documents of the type in question have been learned, the system is set for validation of documents of this type.
LEARNING TYPE B
READOUT AFTER "CLEAR LIMITS"
L001= 127: O00 L002= 127; O00 L003= 127: 000 L004= 127: 000 00 OF THIS TYPE BILL I~VE BEEN LEARNED
READOUT AE`TER FIRST DOCUMENT
L001= 049: 049 L002= 053: 053 L003= 056: 056 L004= 060: 060 01 OF T}IIS TYPE BILL ~IAVE BEEN LEARNED
RE~DOUT AFTER SECOND DOCUMENT
L001= 022: 049 1.002= 023: 053 L003= 028: 056 L004= 027: 060 ~i64~00 I~E~DOUT AFTER 'I'III RD DOCUMENT
L00l= 022: 05G L002= 023: 059 1,003= 028: 061 L004= 027: 062 03 OF ~r~ rYPE sIJ,L l~v~. BE~N LE~RNE~
~ere my validator i.9 to perform the validating function, it follows the routine set forth in FIGURE 12.
First, the limit p~inter is set at the first and lower limit of the first t:ype The data pointer is set at the first picture and a comparison is made of thc data to the limit. If the data is less than the limit, a decision is made as to whether or not this is a reject of the last type of document to be tested by the validator. If not, the limit pointer is set at the first or lower limit of the next type and a comparison is made between the data and this limit. If the decision is that it is a reject of the last type of document to be testcd by the machine, the motor is reversed, the document is returned to the customer and the program returns to the start. If the data is equal to or greater than the lower limit, the limit pointer is set to the next or upper limit and the data is compared to this limit. If the data is greater than this limit, a decision is again made as to whether or not this is a reject of the last type of document to be tested by the validator. The results of this decision are the same as where the lower limit comparison indicated that ~164~00 thc data was less thall the lower limit. If the comparis~n betwecn the da~a and the upper limit indicates that the data is equal ~o or less tllan the upper limit, a decision is made as to whethcr or not this is thc last picture to be tested. If not, the pointer is set at the next or lower limit and at the ne~t picture. If the last picture has been testcd and in the event that a backside SenSor is employed, a decision is made as to whether or not the backside sensor produced the correct indication. If not, the motor reverses to return the document to the customer and the program rcturns to start. If the backside sensors produces a correct test, a valid document signal for that particular type is generated, the document is cleared and stacked and the program returns to the start.
It will be seen that I have accomplished the objects of my invention. I have provided a universal document validator, which is more accurate and more reliable than arc validators of the prior art. My validator may validate more than one type of document. My validator may readily be altered, so as to change the type of types of documents to be validated.
It will be understood that certain features and subcombinations are of utility and may be employed without referenc. to other features and subcombinations.
~164100 This is contemplated by and is within the scope of my claims. It is furthcr obvious that various changes may be made in details within the scope of my claims without departing from thc spirit of my invention. It is, there-fore, to be understood that my invention is not to belimited to the spccific details shown and described.
Havin(~ thus described my invention, what I